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2009-10-28 Till Straumann <strauman@slac.stanford.edu>

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* shared/irq/irq_asm.S: Make sure stack is aligned to
	CPU_STACK_ALIGNMENT before invoking C-code.
This commit is contained in:
Till Straumann
2009-10-29 03:20:21 +00:00
parent b80e8572ca
commit abf41fdf99
2 changed files with 23 additions and 4 deletions
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5
c/src/lib/libbsp/i386/ChangeLog
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@@ -1,3 +1,8 @@
2009-10-28 Till Straumann <strauman@slac.stanford.edu>
* shared/irq/irq_asm.S: Make sure stack is aligned to
CPU_STACK_ALIGNMENT before invoking C-code.
2009-10-17 Chris Johns <chrisj@rtems.org>
* shared/irq/idt.c: Check is the irq handlers are present before

22
c/src/lib/libbsp/i386/shared/irq/irq_asm.S
View File

@@ -13,6 +13,11 @@
#include <rtems/asm.h>
#include <bsp/irq_asm.h>
#include <rtems/score/cpu.h>
#ifndef CPU_STACK_ALIGNMENT
#error "Missing header? CPU_STACK_ALIGNMENT is not defined here"
#endif
BEGIN_CODE
@@ -95,26 +100,35 @@ SYM (_ISR_Handler):
nested:
incl SYM (_ISR_Nest_level) /* one nest level deeper */
incl SYM (_Thread_Dispatch_disable_level) /* disable multitasking */
/*
* Ensure CPU_STACK_ALIGNMENT for C-code.
* esp = (esp - 4) & ~(CPU_STACK_ALIGNMENT - 1)
* makes sure 'esp' is aligned AND there is enough space
* for the vector argument on the stack!
*/
subl $4, esp
andl $ - CPU_STACK_ALIGNMENT, esp
/*
* re-enable interrupts at processor level as the current
* interrupt source is now masked via i8259
*/
sti
/*
/*
* ECX is preloaded with the vector number but it is a scratch register
* so we must save it again.
*/
pushl ecx /* push vector number */
movl ecx, (esp) /* store vector arg in stack */
call C_dispatch_isr
addl $4, esp
/*
* disable interrupts_again
*/
cli
popl ecx /* ecx = vector number */
/*
* restore stack
*/