forked from Imagelibrary/rtems
bsps/arm: L2C 310 simplify and remove white space
This commit is contained in:
@@ -478,16 +478,12 @@ rtems_interrupt_lock l2c_310_cache_lock = RTEMS_INTERRUPT_LOCK_INITIALIZER(
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* http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/BABJFIBA.html
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* http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/BABJFIBA.html
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* Please see this document for more information on these erratas */
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* Please see this document for more information on these erratas */
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static bool l2c_310_cache_errata_is_applicable_753970(
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static bool l2c_310_cache_errata_is_applicable_753970(
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void
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cache_l2c_310_rtl_release rtl_release
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)
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)
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{
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{
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volatile L2CC *l2cc =
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bool is_applicable = false;
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(volatile L2CC *) BSP_ARM_L2C_310_BASE;
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const cache_l2c_310_rtl_release RTL_RELEASE =
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l2cc->cache_id & CACHE_L2C_310_L2CC_ID_RTL_MASK;
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bool is_applicable = false;
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switch( RTL_RELEASE ) {
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switch ( rtl_release ) {
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case CACHE_L2C_310_RTL_RELEASE_R3_P3:
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case CACHE_L2C_310_RTL_RELEASE_R3_P3:
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case CACHE_L2C_310_RTL_RELEASE_R3_P2:
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case CACHE_L2C_310_RTL_RELEASE_R3_P2:
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case CACHE_L2C_310_RTL_RELEASE_R3_P1:
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case CACHE_L2C_310_RTL_RELEASE_R3_P1:
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@@ -495,18 +491,12 @@ static bool l2c_310_cache_errata_is_applicable_753970(
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case CACHE_L2C_310_RTL_RELEASE_R1_P0:
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case CACHE_L2C_310_RTL_RELEASE_R1_P0:
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case CACHE_L2C_310_RTL_RELEASE_R0_P0:
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case CACHE_L2C_310_RTL_RELEASE_R0_P0:
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is_applicable = false;
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is_applicable = false;
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break;
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break;
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case CACHE_L2C_310_RTL_RELEASE_R3_P0:
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case CACHE_L2C_310_RTL_RELEASE_R3_P0:
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is_applicable = true;
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is_applicable = true;
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break;
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break;
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default:
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default:
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assert( RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P3
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assert( 0 );
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P2
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P1
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P0
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R2_P0
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R1_P0
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R0_P0 );
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break;
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break;
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}
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}
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@@ -514,16 +504,12 @@ static bool l2c_310_cache_errata_is_applicable_753970(
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}
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}
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static bool l2c_310_cache_errata_is_applicable_727913(
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static bool l2c_310_cache_errata_is_applicable_727913(
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void
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cache_l2c_310_rtl_release rtl_release
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)
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)
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{
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{
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volatile L2CC *l2cc =
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bool is_applicable = false;
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(volatile L2CC *) BSP_ARM_L2C_310_BASE;
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const cache_l2c_310_rtl_release RTL_RELEASE =
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l2cc->cache_id & CACHE_L2C_310_L2CC_ID_RTL_MASK;
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bool is_applicable = false;
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switch( RTL_RELEASE ) {
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switch ( rtl_release ) {
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case CACHE_L2C_310_RTL_RELEASE_R3_P3:
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case CACHE_L2C_310_RTL_RELEASE_R3_P3:
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case CACHE_L2C_310_RTL_RELEASE_R3_P2:
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case CACHE_L2C_310_RTL_RELEASE_R3_P2:
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case CACHE_L2C_310_RTL_RELEASE_R3_P1:
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case CACHE_L2C_310_RTL_RELEASE_R3_P1:
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@@ -531,35 +517,25 @@ static bool l2c_310_cache_errata_is_applicable_727913(
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case CACHE_L2C_310_RTL_RELEASE_R1_P0:
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case CACHE_L2C_310_RTL_RELEASE_R1_P0:
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case CACHE_L2C_310_RTL_RELEASE_R0_P0:
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case CACHE_L2C_310_RTL_RELEASE_R0_P0:
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is_applicable = false;
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is_applicable = false;
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break;
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break;
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case CACHE_L2C_310_RTL_RELEASE_R3_P0:
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case CACHE_L2C_310_RTL_RELEASE_R3_P0:
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is_applicable = true;
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is_applicable = true;
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break;
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break;
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default:
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default:
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assert( RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P3
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assert( 0 );
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P2
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break;
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P1
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P0
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R2_P0
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R1_P0
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R0_P0 );
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break;
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}
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}
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return is_applicable;
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return is_applicable;
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}
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}
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static bool l2c_310_cache_errata_is_applicable_727914(
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static bool l2c_310_cache_errata_is_applicable_727914(
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void
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cache_l2c_310_rtl_release rtl_release
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)
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)
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{
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{
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volatile L2CC *l2cc =
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bool is_applicable = false;
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(volatile L2CC *) BSP_ARM_L2C_310_BASE;
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const cache_l2c_310_rtl_release RTL_RELEASE =
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l2cc->cache_id & CACHE_L2C_310_L2CC_ID_RTL_MASK;
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bool is_applicable = false;
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switch( RTL_RELEASE ) {
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switch ( rtl_release ) {
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case CACHE_L2C_310_RTL_RELEASE_R3_P3:
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case CACHE_L2C_310_RTL_RELEASE_R3_P3:
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case CACHE_L2C_310_RTL_RELEASE_R3_P2:
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case CACHE_L2C_310_RTL_RELEASE_R3_P2:
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case CACHE_L2C_310_RTL_RELEASE_R3_P1:
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case CACHE_L2C_310_RTL_RELEASE_R3_P1:
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@@ -567,143 +543,103 @@ static bool l2c_310_cache_errata_is_applicable_727914(
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case CACHE_L2C_310_RTL_RELEASE_R1_P0:
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case CACHE_L2C_310_RTL_RELEASE_R1_P0:
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case CACHE_L2C_310_RTL_RELEASE_R0_P0:
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case CACHE_L2C_310_RTL_RELEASE_R0_P0:
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is_applicable = false;
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is_applicable = false;
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break;
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break;
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case CACHE_L2C_310_RTL_RELEASE_R3_P0:
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case CACHE_L2C_310_RTL_RELEASE_R3_P0:
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is_applicable = true;
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is_applicable = true;
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break;
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break;
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default:
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default:
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assert( RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P3
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assert( 0 );
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P2
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break;
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P1
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P0
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R2_P0
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R1_P0
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R0_P0 );
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break;
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}
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}
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return is_applicable;
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return is_applicable;
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}
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}
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static bool l2c_310_cache_errata_is_applicable_727915(
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static bool l2c_310_cache_errata_is_applicable_727915(
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void
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cache_l2c_310_rtl_release rtl_release
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)
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)
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{
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{
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volatile L2CC *l2cc =
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bool is_applicable = false;
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(volatile L2CC *) BSP_ARM_L2C_310_BASE;
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const cache_l2c_310_rtl_release RTL_RELEASE =
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l2cc->cache_id & CACHE_L2C_310_L2CC_ID_RTL_MASK;
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bool is_applicable = false;
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switch( RTL_RELEASE ) {
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switch ( rtl_release ) {
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case CACHE_L2C_310_RTL_RELEASE_R3_P3:
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case CACHE_L2C_310_RTL_RELEASE_R3_P3:
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case CACHE_L2C_310_RTL_RELEASE_R3_P2:
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case CACHE_L2C_310_RTL_RELEASE_R3_P2:
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case CACHE_L2C_310_RTL_RELEASE_R3_P1:
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case CACHE_L2C_310_RTL_RELEASE_R3_P1:
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case CACHE_L2C_310_RTL_RELEASE_R1_P0:
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case CACHE_L2C_310_RTL_RELEASE_R1_P0:
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case CACHE_L2C_310_RTL_RELEASE_R0_P0:
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case CACHE_L2C_310_RTL_RELEASE_R0_P0:
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is_applicable = false;
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is_applicable = false;
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break;
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break;
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case CACHE_L2C_310_RTL_RELEASE_R3_P0:
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case CACHE_L2C_310_RTL_RELEASE_R3_P0:
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case CACHE_L2C_310_RTL_RELEASE_R2_P0:
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case CACHE_L2C_310_RTL_RELEASE_R2_P0:
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is_applicable = true;
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is_applicable = true;
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break;
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break;
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default:
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default:
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assert( RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P3
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assert( 0 );
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P2
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break;
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P1
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P0
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R2_P0
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R1_P0
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R0_P0 );
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break;
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}
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}
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return is_applicable;
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return is_applicable;
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}
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}
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static bool l2c_310_cache_errata_is_applicable_729806(
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static bool l2c_310_cache_errata_is_applicable_729806(
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void
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cache_l2c_310_rtl_release rtl_release
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)
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)
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{
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{
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volatile L2CC *l2cc =
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bool is_applicable = false;
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(volatile L2CC *) BSP_ARM_L2C_310_BASE;
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const cache_l2c_310_rtl_release RTL_RELEASE =
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l2cc->cache_id & CACHE_L2C_310_L2CC_ID_RTL_MASK;
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bool is_applicable = false;
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switch( RTL_RELEASE ) {
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switch ( rtl_release ) {
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case CACHE_L2C_310_RTL_RELEASE_R3_P3:
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case CACHE_L2C_310_RTL_RELEASE_R3_P3:
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case CACHE_L2C_310_RTL_RELEASE_R3_P2:
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case CACHE_L2C_310_RTL_RELEASE_R3_P2:
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case CACHE_L2C_310_RTL_RELEASE_R2_P0:
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case CACHE_L2C_310_RTL_RELEASE_R2_P0:
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case CACHE_L2C_310_RTL_RELEASE_R1_P0:
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case CACHE_L2C_310_RTL_RELEASE_R1_P0:
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case CACHE_L2C_310_RTL_RELEASE_R0_P0:
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case CACHE_L2C_310_RTL_RELEASE_R0_P0:
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is_applicable = false;
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is_applicable = false;
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break;
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break;
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case CACHE_L2C_310_RTL_RELEASE_R3_P1:
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case CACHE_L2C_310_RTL_RELEASE_R3_P1:
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case CACHE_L2C_310_RTL_RELEASE_R3_P0:
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case CACHE_L2C_310_RTL_RELEASE_R3_P0:
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is_applicable = true;
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is_applicable = true;
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break;
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break;
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default:
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default:
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assert( RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P3
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assert( 0 );
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P2
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break;
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P1
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P0
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R2_P0
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R1_P0
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R0_P0 );
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break;
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}
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}
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return is_applicable;
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return is_applicable;
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}
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}
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static bool l2c_310_cache_errata_is_applicable_729815(
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static bool l2c_310_cache_errata_is_applicable_729815(
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void
|
cache_l2c_310_rtl_release rtl_release
|
||||||
)
|
)
|
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{
|
{
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volatile L2CC *l2cc =
|
bool is_applicable = false;
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(volatile L2CC *) BSP_ARM_L2C_310_BASE;
|
|
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const cache_l2c_310_rtl_release RTL_RELEASE =
|
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l2cc->cache_id & CACHE_L2C_310_L2CC_ID_RTL_MASK;
|
|
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bool is_applicable = false;
|
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||||||
|
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switch( RTL_RELEASE ) {
|
switch ( rtl_release ) {
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case CACHE_L2C_310_RTL_RELEASE_R3_P3:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P3:
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case CACHE_L2C_310_RTL_RELEASE_R1_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R1_P0:
|
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case CACHE_L2C_310_RTL_RELEASE_R0_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R0_P0:
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is_applicable = false;
|
is_applicable = false;
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break;
|
break;
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case CACHE_L2C_310_RTL_RELEASE_R3_P2:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P2:
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case CACHE_L2C_310_RTL_RELEASE_R3_P1:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P1:
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case CACHE_L2C_310_RTL_RELEASE_R3_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P0:
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case CACHE_L2C_310_RTL_RELEASE_R2_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R2_P0:
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is_applicable = true;
|
is_applicable = true;
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break;
|
break;
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default:
|
default:
|
||||||
assert( RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P3
|
assert( 0 );
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P2
|
break;
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P1
|
|
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P0
|
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R2_P0
|
|
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R1_P0
|
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|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R0_P0 );
|
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break;
|
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}
|
}
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|
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return is_applicable;
|
return is_applicable;
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}
|
}
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|
|
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static bool l2c_310_cache_errata_is_applicable_742884(
|
static bool l2c_310_cache_errata_is_applicable_742884(
|
||||||
void
|
cache_l2c_310_rtl_release rtl_release
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
volatile L2CC *l2cc =
|
bool is_applicable = false;
|
||||||
(volatile L2CC *) BSP_ARM_L2C_310_BASE;
|
|
||||||
const cache_l2c_310_rtl_release RTL_RELEASE =
|
|
||||||
l2cc->cache_id & CACHE_L2C_310_L2CC_ID_RTL_MASK;
|
|
||||||
bool is_applicable = false;
|
|
||||||
|
|
||||||
switch( RTL_RELEASE ) {
|
switch ( rtl_release ) {
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P3:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P3:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P2:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P2:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P0:
|
||||||
@@ -711,71 +647,51 @@ static bool l2c_310_cache_errata_is_applicable_742884(
|
|||||||
case CACHE_L2C_310_RTL_RELEASE_R1_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R1_P0:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R0_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R0_P0:
|
||||||
is_applicable = false;
|
is_applicable = false;
|
||||||
break;
|
break;
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P1:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P1:
|
||||||
is_applicable = true;
|
is_applicable = true;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
assert( RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P3
|
assert( 0 );
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P2
|
break;
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P1
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R2_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R1_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R0_P0 );
|
|
||||||
break;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return is_applicable;
|
return is_applicable;
|
||||||
}
|
}
|
||||||
|
|
||||||
static bool l2c_310_cache_errata_is_applicable_752271(
|
static bool l2c_310_cache_errata_is_applicable_752271(
|
||||||
void
|
cache_l2c_310_rtl_release rtl_release
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
volatile L2CC *l2cc =
|
bool is_applicable = false;
|
||||||
(volatile L2CC *) BSP_ARM_L2C_310_BASE;
|
|
||||||
const cache_l2c_310_rtl_release RTL_RELEASE =
|
|
||||||
l2cc->cache_id & CACHE_L2C_310_L2CC_ID_RTL_MASK;
|
|
||||||
bool is_applicable = false;
|
|
||||||
|
|
||||||
switch( RTL_RELEASE ) {
|
switch ( rtl_release ) {
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P3:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P3:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P2:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P2:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R2_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R2_P0:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R1_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R1_P0:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R0_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R0_P0:
|
||||||
is_applicable = false;
|
is_applicable = false;
|
||||||
break;
|
break;
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P1:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P1:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P0:
|
||||||
is_applicable = true;
|
is_applicable = true;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
assert( RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P3
|
assert( 0 );
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P2
|
break;
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P1
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R2_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R1_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R0_P0 );
|
|
||||||
break;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return is_applicable;
|
return is_applicable;
|
||||||
}
|
}
|
||||||
|
|
||||||
static bool l2c_310_cache_errata_is_applicable_765569(
|
static bool l2c_310_cache_errata_is_applicable_765569(
|
||||||
void
|
cache_l2c_310_rtl_release rtl_release
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
volatile L2CC *l2cc =
|
bool is_applicable = false;
|
||||||
(volatile L2CC *) BSP_ARM_L2C_310_BASE;
|
|
||||||
const cache_l2c_310_rtl_release RTL_RELEASE =
|
|
||||||
l2cc->cache_id & CACHE_L2C_310_L2CC_ID_RTL_MASK;
|
|
||||||
bool is_applicable = false;
|
|
||||||
|
|
||||||
switch( RTL_RELEASE ) {
|
switch ( rtl_release ) {
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P3:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P3:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P2:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P2:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P1:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P1:
|
||||||
@@ -784,88 +700,62 @@ static bool l2c_310_cache_errata_is_applicable_765569(
|
|||||||
case CACHE_L2C_310_RTL_RELEASE_R1_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R1_P0:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R0_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R0_P0:
|
||||||
is_applicable = true;
|
is_applicable = true;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
assert( RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P3
|
assert( 0 );
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P2
|
break;
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P1
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R2_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R1_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R0_P0 );
|
|
||||||
break;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return is_applicable;
|
return is_applicable;
|
||||||
}
|
}
|
||||||
|
|
||||||
static bool l2c_310_cache_errata_is_applicable_769419(
|
static bool l2c_310_cache_errata_is_applicable_769419(
|
||||||
void
|
cache_l2c_310_rtl_release rtl_release
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
volatile L2CC *l2cc =
|
bool is_applicable = false;
|
||||||
(volatile L2CC *) BSP_ARM_L2C_310_BASE;
|
|
||||||
const cache_l2c_310_rtl_release RTL_RELEASE =
|
|
||||||
l2cc->cache_id & CACHE_L2C_310_L2CC_ID_RTL_MASK;
|
|
||||||
bool is_applicable = false;
|
|
||||||
|
|
||||||
switch( RTL_RELEASE ) {
|
switch ( rtl_release ) {
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P3:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P3:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P2:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P2:
|
||||||
is_applicable = false;
|
is_applicable = false;
|
||||||
break;
|
break;
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P1:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P1:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P0:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R2_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R2_P0:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R1_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R1_P0:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R0_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R0_P0:
|
||||||
is_applicable = true;
|
is_applicable = true;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
assert( RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P3
|
assert( 0 );
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P2
|
break;
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P1
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R2_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R1_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R0_P0 );
|
|
||||||
break;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return is_applicable;
|
return is_applicable;
|
||||||
}
|
}
|
||||||
|
|
||||||
static bool l2c_310_cache_errata_is_applicable_588369(
|
static bool l2c_310_cache_errata_is_applicable_588369(
|
||||||
void
|
cache_l2c_310_rtl_release rtl_release
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
volatile L2CC *l2cc =
|
bool is_applicable = false;
|
||||||
(volatile L2CC *) BSP_ARM_L2C_310_BASE;
|
|
||||||
const cache_l2c_310_rtl_release RTL_RELEASE =
|
|
||||||
l2cc->cache_id & CACHE_L2C_310_L2CC_ID_RTL_MASK;
|
|
||||||
bool is_applicable = false;
|
|
||||||
|
|
||||||
switch( RTL_RELEASE ) {
|
switch ( rtl_release ) {
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P3:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P3:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P2:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P2:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P1:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P1:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P0:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R2_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R2_P0:
|
||||||
is_applicable = false;
|
is_applicable = false;
|
||||||
break;
|
break;
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R1_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R1_P0:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R0_P0:
|
case CACHE_L2C_310_RTL_RELEASE_R0_P0:
|
||||||
is_applicable = true;
|
is_applicable = true;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
assert( RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P3
|
assert( 0 );
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P2
|
break;
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P1
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R2_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R1_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R0_P0 );
|
|
||||||
break;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return is_applicable;
|
return is_applicable;
|
||||||
@@ -873,16 +763,12 @@ static bool l2c_310_cache_errata_is_applicable_588369(
|
|||||||
|
|
||||||
#ifdef CACHE_ERRATA_CHECKS_FOR_IMPLEMENTED_ERRATAS
|
#ifdef CACHE_ERRATA_CHECKS_FOR_IMPLEMENTED_ERRATAS
|
||||||
static bool l2c_310_cache_errata_is_applicable_754670(
|
static bool l2c_310_cache_errata_is_applicable_754670(
|
||||||
void
|
cache_l2c_310_rtl_release rtl_release
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
volatile L2CC *l2cc =
|
bool is_applicable = false;
|
||||||
(volatile L2CC *) BSP_ARM_L2C_310_BASE;
|
|
||||||
const cache_l2c_310_rtl_release RTL_RELEASE =
|
|
||||||
l2cc->cache_id & CACHE_L2C_310_L2CC_ID_RTL_MASK;
|
|
||||||
bool is_applicable = false;
|
|
||||||
|
|
||||||
switch( RTL_RELEASE ) {
|
switch ( rtl_release ) {
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P3:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P3:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P2:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P2:
|
||||||
case CACHE_L2C_310_RTL_RELEASE_R3_P1:
|
case CACHE_L2C_310_RTL_RELEASE_R3_P1:
|
||||||
@@ -893,14 +779,8 @@ static bool l2c_310_cache_errata_is_applicable_754670(
|
|||||||
is_applicable = true;
|
is_applicable = true;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
assert( RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P3
|
assert( 0 );
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P2
|
break;
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P1
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R2_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R1_P0
|
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R0_P0 );
|
|
||||||
break;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return is_applicable;
|
return is_applicable;
|
||||||
@@ -915,32 +795,32 @@ static bool l2c_310_cache_errata_is_applicable_754670(
|
|||||||
if( arm_errata_is_applicable_processor_errata_775420 ) { \
|
if( arm_errata_is_applicable_processor_errata_775420 ) { \
|
||||||
} \
|
} \
|
||||||
|
|
||||||
static void l2c_310_cache_check_errata( void )
|
static void l2c_310_cache_check_errata( cache_l2c_310_rtl_release rtl_release )
|
||||||
{
|
{
|
||||||
/* This erratum gets handled within the sources */
|
/* This erratum gets handled within the sources */
|
||||||
/* Unhandled erratum present: 588369 Errata 588369 says that clean + inv may
|
/* Unhandled erratum present: 588369 Errata 588369 says that clean + inv may
|
||||||
* keep the cache line if it was clean. See ARMs documentation on the erratum
|
* keep the cache line if it was clean. See ARMs documentation on the erratum
|
||||||
* for a workaround */
|
* for a workaround */
|
||||||
/* assert( ! l2c_310_cache_errata_is_applicable_588369() ); */
|
/* assert( ! l2c_310_cache_errata_is_applicable_588369( rtl_release ) ); */
|
||||||
|
|
||||||
/* Unhandled erratum present: 727913 Prefetch dropping feature can cause
|
/* Unhandled erratum present: 727913 Prefetch dropping feature can cause
|
||||||
* incorrect behavior when PL310 handles reads that cross cache line
|
* incorrect behavior when PL310 handles reads that cross cache line
|
||||||
* boundary */
|
* boundary */
|
||||||
assert( ! l2c_310_cache_errata_is_applicable_727913() );
|
assert( ! l2c_310_cache_errata_is_applicable_727913( rtl_release ) );
|
||||||
|
|
||||||
/* Unhandled erratum present: 727914 Double linefill feature can cause
|
/* Unhandled erratum present: 727914 Double linefill feature can cause
|
||||||
* deadlock */
|
* deadlock */
|
||||||
assert( ! l2c_310_cache_errata_is_applicable_727914() );
|
assert( ! l2c_310_cache_errata_is_applicable_727914( rtl_release ) );
|
||||||
|
|
||||||
/* Unhandled erratum present: 727915 Background Clean and Invalidate by Way
|
/* Unhandled erratum present: 727915 Background Clean and Invalidate by Way
|
||||||
* operation can cause data corruption */
|
* operation can cause data corruption */
|
||||||
assert( ! l2c_310_cache_errata_is_applicable_727915() );
|
assert( ! l2c_310_cache_errata_is_applicable_727915( rtl_release ) );
|
||||||
|
|
||||||
/* Unhandled erratum present: 729806 Speculative reads from the Cortex-A9
|
/* Unhandled erratum present: 729806 Speculative reads from the Cortex-A9
|
||||||
* MPCore processor can cause deadlock */
|
* MPCore processor can cause deadlock */
|
||||||
assert( ! l2c_310_cache_errata_is_applicable_729806() );
|
assert( ! l2c_310_cache_errata_is_applicable_729806( rtl_release ) );
|
||||||
|
|
||||||
if( l2c_310_cache_errata_is_applicable_729815() )
|
if( l2c_310_cache_errata_is_applicable_729815( rtl_release ) )
|
||||||
{
|
{
|
||||||
volatile L2CC *l2cc = (volatile L2CC *) BSP_ARM_L2C_310_BASE;
|
volatile L2CC *l2cc = (volatile L2CC *) BSP_ARM_L2C_310_BASE;
|
||||||
|
|
||||||
@@ -965,18 +845,18 @@ static void l2c_310_cache_check_errata( void )
|
|||||||
|
|
||||||
/* Unhandled erratum present: 742884 Double linefill feature might introduce
|
/* Unhandled erratum present: 742884 Double linefill feature might introduce
|
||||||
* circular dependency and deadlock */
|
* circular dependency and deadlock */
|
||||||
assert( ! l2c_310_cache_errata_is_applicable_742884() );
|
assert( ! l2c_310_cache_errata_is_applicable_742884( rtl_release ) );
|
||||||
|
|
||||||
/* Unhandled erratum present: 752271 Double linefill feature can cause data
|
/* Unhandled erratum present: 752271 Double linefill feature can cause data
|
||||||
* corruption */
|
* corruption */
|
||||||
assert( ! l2c_310_cache_errata_is_applicable_752271() );
|
assert( ! l2c_310_cache_errata_is_applicable_752271( rtl_release ) );
|
||||||
|
|
||||||
/* This erratum can not be worked around: 754670 A continuous write flow can
|
/* This erratum can not be worked around: 754670 A continuous write flow can
|
||||||
* stall a read targeting the same memory area
|
* stall a read targeting the same memory area
|
||||||
* But this erratum does not lead to any data corruption */
|
* But this erratum does not lead to any data corruption */
|
||||||
/* assert( ! l2c_310_cache_errata_is_applicable_754670() ); */
|
/* assert( ! l2c_310_cache_errata_is_applicable_754670() ); */
|
||||||
|
|
||||||
if( l2c_310_cache_errata_is_applicable_765569() )
|
if( l2c_310_cache_errata_is_applicable_765569( rtl_release ) )
|
||||||
{
|
{
|
||||||
volatile L2CC *l2cc = (volatile L2CC *) BSP_ARM_L2C_310_BASE;
|
volatile L2CC *l2cc = (volatile L2CC *) BSP_ARM_L2C_310_BASE;
|
||||||
|
|
||||||
@@ -1000,15 +880,17 @@ static void l2c_310_cache_check_errata( void )
|
|||||||
|
|
||||||
/* Unhandled erratum present: 769419 No automatic Store Buffer drain,
|
/* Unhandled erratum present: 769419 No automatic Store Buffer drain,
|
||||||
* visibility of written data requires an explicit Cache */
|
* visibility of written data requires an explicit Cache */
|
||||||
assert( ! l2c_310_cache_errata_is_applicable_769419() );
|
assert( ! l2c_310_cache_errata_is_applicable_769419( rtl_release ) );
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void
|
static inline void
|
||||||
cache_l2c_310_sync( void )
|
cache_l2c_310_sync( void )
|
||||||
{
|
{
|
||||||
volatile L2CC *l2cc = (volatile L2CC *) BSP_ARM_L2C_310_BASE;
|
volatile L2CC *l2cc = (volatile L2CC *) BSP_ARM_L2C_310_BASE;
|
||||||
|
cache_l2c_310_rtl_release rtl_release =
|
||||||
|
l2cc->cache_id & CACHE_L2C_310_L2CC_ID_RTL_MASK;
|
||||||
|
|
||||||
if( l2c_310_cache_errata_is_applicable_753970() ) {
|
if( l2c_310_cache_errata_is_applicable_753970( rtl_release ) ) {
|
||||||
l2cc->dummy_cache_sync_reg = 0;
|
l2cc->dummy_cache_sync_reg = 0;
|
||||||
} else {
|
} else {
|
||||||
l2cc->cache_sync = 0;
|
l2cc->cache_sync = 0;
|
||||||
@@ -1049,8 +931,11 @@ cache_l2c_310_flush_range( const void* d_addr, const size_t n_bytes )
|
|||||||
(uint32_t)( (size_t)d_addr + n_bytes - 1 );
|
(uint32_t)( (size_t)d_addr + n_bytes - 1 );
|
||||||
uint32_t block_end =
|
uint32_t block_end =
|
||||||
CACHE_MIN( ADDR_LAST, adx + CACHE_MAX_LOCKING_BYTES );
|
CACHE_MIN( ADDR_LAST, adx + CACHE_MAX_LOCKING_BYTES );
|
||||||
|
volatile L2CC *l2cc = (volatile L2CC *) BSP_ARM_L2C_310_BASE;
|
||||||
|
cache_l2c_310_rtl_release rtl_release =
|
||||||
|
l2cc->cache_id & CACHE_L2C_310_L2CC_ID_RTL_MASK;
|
||||||
bool is_errata_588369_applicable =
|
bool is_errata_588369_applicable =
|
||||||
l2c_310_cache_errata_is_applicable_588369();
|
l2c_310_cache_errata_is_applicable_588369( rtl_release );
|
||||||
|
|
||||||
rtems_interrupt_lock_acquire( &l2c_310_cache_lock, &lock_context );
|
rtems_interrupt_lock_acquire( &l2c_310_cache_lock, &lock_context );
|
||||||
|
|
||||||
@@ -1244,6 +1129,8 @@ static inline void
|
|||||||
cache_l2c_310_enable( void )
|
cache_l2c_310_enable( void )
|
||||||
{
|
{
|
||||||
volatile L2CC *l2cc = (volatile L2CC *) BSP_ARM_L2C_310_BASE;
|
volatile L2CC *l2cc = (volatile L2CC *) BSP_ARM_L2C_310_BASE;
|
||||||
|
cache_l2c_310_rtl_release rtl_release =
|
||||||
|
l2cc->cache_id & CACHE_L2C_310_L2CC_ID_RTL_MASK;
|
||||||
|
|
||||||
/* Only enable if L2CC is currently disabled */
|
/* Only enable if L2CC is currently disabled */
|
||||||
if( ( l2cc->ctrl & CACHE_L2C_310_L2CC_ENABLE_MASK ) == 0 ) {
|
if( ( l2cc->ctrl & CACHE_L2C_310_L2CC_ENABLE_MASK ) == 0 ) {
|
||||||
@@ -1256,19 +1143,17 @@ cache_l2c_310_enable( void )
|
|||||||
switch ( cache_id ) {
|
switch ( cache_id ) {
|
||||||
case CACHE_L2C_310_L2CC_ID_PART_L310:
|
case CACHE_L2C_310_L2CC_ID_PART_L310:
|
||||||
{
|
{
|
||||||
const cache_l2c_310_rtl_release RTL_RELEASE =
|
|
||||||
l2cc->cache_id & CACHE_L2C_310_L2CC_ID_RTL_MASK;
|
|
||||||
/* If this assertion fails, you have a release of the
|
/* If this assertion fails, you have a release of the
|
||||||
* L2C-310 cache for which the l2c_310_cache_errata_is_applicable_ ...
|
* L2C-310 cache for which the l2c_310_cache_errata_is_applicable_ ...
|
||||||
* methods are not yet implemented. This means you will get incorrect
|
* methods are not yet implemented. This means you will get incorrect
|
||||||
* errata handling */
|
* errata handling */
|
||||||
assert( RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P3
|
assert( rtl_release == CACHE_L2C_310_RTL_RELEASE_R3_P3
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P2
|
|| rtl_release == CACHE_L2C_310_RTL_RELEASE_R3_P2
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P1
|
|| rtl_release == CACHE_L2C_310_RTL_RELEASE_R3_P1
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R3_P0
|
|| rtl_release == CACHE_L2C_310_RTL_RELEASE_R3_P0
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R2_P0
|
|| rtl_release == CACHE_L2C_310_RTL_RELEASE_R2_P0
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R1_P0
|
|| rtl_release == CACHE_L2C_310_RTL_RELEASE_R1_P0
|
||||||
|| RTL_RELEASE == CACHE_L2C_310_RTL_RELEASE_R0_P0 );
|
|| rtl_release == CACHE_L2C_310_RTL_RELEASE_R0_P0 );
|
||||||
if ( l2cc->aux_ctrl & ( 1 << 16 ) ) {
|
if ( l2cc->aux_ctrl & ( 1 << 16 ) ) {
|
||||||
ways = 16;
|
ways = 16;
|
||||||
} else {
|
} else {
|
||||||
@@ -1324,7 +1209,7 @@ cache_l2c_310_enable( void )
|
|||||||
/* Clear the pending interrupts */
|
/* Clear the pending interrupts */
|
||||||
l2cc->int_clr = l2cc->int_raw_status;
|
l2cc->int_clr = l2cc->int_raw_status;
|
||||||
|
|
||||||
l2c_310_cache_check_errata();
|
l2c_310_cache_check_errata( rtl_release );
|
||||||
|
|
||||||
/* Enable the L2CC */
|
/* Enable the L2CC */
|
||||||
l2cc->ctrl |= CACHE_L2C_310_L2CC_ENABLE_MASK;
|
l2cc->ctrl |= CACHE_L2C_310_L2CC_ENABLE_MASK;
|
||||||
|
|||||||
Reference in New Issue
Block a user