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doc: Clarify SPARC floating point ABI

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Alexander Krutwig
2015-05-05 15:32:03 +02:00
committed by Sebastian Huber
parent 75acd9e69f
commit a9c4f15dbe
1 changed files with 6 additions and 1 deletions
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doc/cpu_supplement/sparc.t
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@@ -425,10 +425,15 @@ f4, ... f30)
f8, ... f28) f8, ... f28)
@end itemize @end itemize
The floating point status register (fpsr) specifies The floating point status register (FSR) specifies
the behavior of the floating point unit for rounding, contains the behavior of the floating point unit for rounding, contains
its condition codes, version specification, and trap information. its condition codes, version specification, and trap information.
According to the ABI all floating point registers and the floating point status
register (FSR) are volatile. Thus the floating point context of a thread is the
empty set. The rounding direction is a system global state and must not be
modified by threads.
A queue of the floating point instructions which have A queue of the floating point instructions which have
started execution but not yet completed is maintained. This started execution but not yet completed is maintained. This
queue is needed to support the multiple cycle nature of floating queue is needed to support the multiple cycle nature of floating