forked from Imagelibrary/rtems
mcf5206 libcpu and mcf5206elite: Fix warnings
This commit is contained in:
@@ -1,6 +1,8 @@
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/*
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/*
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* Console driver for Motorola MCF5206E UART modules
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* Console driver for Motorola MCF5206E UART modules
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*
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*/
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/*
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* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
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* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
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* Author: Victor V. Vengerov <vvv@oktet.ru>
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* Author: Victor V. Vengerov <vvv@oktet.ru>
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*
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*
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@@ -151,20 +153,19 @@ console_first_open(int major, int minor, void *arg)
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rtems_status_code sc;
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rtems_status_code sc;
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uint8_t intvec;
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uint8_t intvec;
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switch (minor)
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switch (minor) {
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{
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case 0: intvec = BSP_INTVEC_UART1; break;
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case 0: intvec = BSP_INTVEC_UART1; break;
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case 1: intvec = BSP_INTVEC_UART2; break;
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case 1: intvec = BSP_INTVEC_UART2; break;
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default:
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default:
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return RTEMS_INVALID_NUMBER;
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return RTEMS_INVALID_NUMBER;
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}
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}
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if (console_mode != CONSOLE_MODE_INT)
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if (console_mode != CONSOLE_MODE_INT) {
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{
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intvec = 0;
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intvec = 0;
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}
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}
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sc = mcfuart_init(&uart[minor], /* uart */
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sc = mcfuart_init(
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&uart[minor], /* uart */
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args->iop->data1, /* tty */
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args->iop->data1, /* tty */
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intvec, /* interrupt vector number */
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intvec, /* interrupt vector number */
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minor+1);
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minor+1);
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@@ -204,8 +205,8 @@ console_last_close(int major, int minor, void *arg)
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* RETURNS:
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* RETURNS:
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* RTEMS error code (RTEMS_SUCCESSFUL if device initialized successfuly)
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* RTEMS error code (RTEMS_SUCCESSFUL if device initialized successfuly)
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*/
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*/
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rtems_device_driver
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rtems_device_driver console_initialize(
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console_initialize(rtems_device_major_number major,
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rtems_device_major_number major,
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rtems_device_minor_number minor,
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rtems_device_minor_number minor,
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void *arg)
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void *arg)
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{
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{
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@@ -223,12 +224,12 @@ console_initialize(rtems_device_major_number major,
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status = rtems_io_register_name ("/dev/console", major, 0);
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status = rtems_io_register_name ("/dev/console", major, 0);
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if (status != RTEMS_SUCCESSFUL)
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if (status != RTEMS_SUCCESSFUL)
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rtems_fatal_error_occurred (status);
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rtems_fatal_error_occurred (status);
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status = rtems_io_register_name ("/dev/aux", major, 1);
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status = rtems_io_register_name ("/dev/aux", major, 1);
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if (status != RTEMS_SUCCESSFUL)
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if (status != RTEMS_SUCCESSFUL)
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rtems_fatal_error_occurred (status);
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rtems_fatal_error_occurred (status);
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if (console_mode == CONSOLE_MODE_RAW)
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if (console_mode == CONSOLE_MODE_RAW) {
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{
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rtems_status_code sc;
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rtems_status_code sc;
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sc = mcfuart_init(&uart[0], /* uart */
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sc = mcfuart_init(&uart[0], /* uart */
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NULL, /* tty */
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NULL, /* tty */
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@@ -289,8 +290,7 @@ console_open(rtems_device_major_number major,
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0 /* outputUsesInterrupts */
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0 /* outputUsesInterrupts */
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};
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};
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switch (console_mode)
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switch (console_mode) {
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{
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case CONSOLE_MODE_RAW:
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case CONSOLE_MODE_RAW:
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return RTEMS_SUCCESSFUL;
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return RTEMS_SUCCESSFUL;
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@@ -344,19 +344,16 @@ console_read(rtems_device_major_number major,
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rtems_device_minor_number minor,
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rtems_device_minor_number minor,
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void *arg)
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void *arg)
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{
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{
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if (console_mode != CONSOLE_MODE_RAW)
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if (console_mode != CONSOLE_MODE_RAW) {
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{
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return rtems_termios_read (arg);
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return rtems_termios_read (arg);
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}
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} else {
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else
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{
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rtems_libio_rw_args_t *argp = arg;
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rtems_libio_rw_args_t *argp = arg;
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char *buf = argp->buffer;
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char *buf = argp->buffer;
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int count = argp->count;
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int count = argp->count;
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int n = 0;
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int n = 0;
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int c;
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int c;
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while (n < count)
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{
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while (n < count) {
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do {
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do {
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c = mcfuart_poll_read(&uart[minor]);
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c = mcfuart_poll_read(&uart[minor]);
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} while (c == -1);
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} while (c == -1);
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@@ -389,19 +386,16 @@ console_write(rtems_device_major_number major,
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void *arg
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void *arg
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)
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)
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{
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{
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if (console_mode != CONSOLE_MODE_RAW)
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if (console_mode != CONSOLE_MODE_RAW) {
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{
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return rtems_termios_write (arg);
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return rtems_termios_write (arg);
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}
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} else {
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else
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{
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rtems_libio_rw_args_t *argp = arg;
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rtems_libio_rw_args_t *argp = arg;
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char cr = '\r';
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char cr = '\r';
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char *buf = argp->buffer;
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char *buf = argp->buffer;
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int count = argp->count;
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int count = argp->count;
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int i;
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int i;
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for (i = 0; i < count; i++)
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{
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for (i = 0; i < count; i++) {
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if (*buf == '\n')
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if (*buf == '\n')
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mcfuart_poll_write(&uart[minor], &cr, 1);
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mcfuart_poll_write(&uart[minor], &cr, 1);
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mcfuart_poll_write(&uart[minor], buf, 1);
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mcfuart_poll_write(&uart[minor], buf, 1);
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@@ -428,12 +422,9 @@ console_control(rtems_device_major_number major,
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rtems_device_minor_number minor,
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rtems_device_minor_number minor,
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void *arg)
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void *arg)
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{
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{
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if (console_mode != CONSOLE_MODE_RAW)
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if (console_mode != CONSOLE_MODE_RAW) {
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{
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return rtems_termios_ioctl (arg);
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return rtems_termios_ioctl (arg);
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}
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} else {
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else
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{
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return RTEMS_SUCCESSFUL;
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return RTEMS_SUCCESSFUL;
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}
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}
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}
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}
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@@ -173,6 +173,11 @@ rtems_isr_entry set_vector(
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int type
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int type
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);
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);
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/*
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* Prototypes for BSP methods that cross file boundaries
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*/
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void Init5206e(void);
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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@@ -5,7 +5,9 @@
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* The name of this entry point is compiler dependent.
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* The name of this entry point is compiler dependent.
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* It jumps to the BSP which is responsible for performing
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* It jumps to the BSP which is responsible for performing
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* all initialization.
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* all initialization.
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*
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*/
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/*
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* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
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* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
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* Author: Victor V. Vengerov <vvv@oktet.ru>
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* Author: Victor V. Vengerov <vvv@oktet.ru>
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*
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*
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@@ -8,7 +8,9 @@
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* This initialization code based on hardware settings of dBUG
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* This initialization code based on hardware settings of dBUG
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* monitor. This must be changed if you like to run it immediately
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* monitor. This must be changed if you like to run it immediately
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* after reset.
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* after reset.
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*
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*/
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/*
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* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
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* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
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* Author: Victor V. Vengerov <vvv@oktet.ru>
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* Author: Victor V. Vengerov <vvv@oktet.ru>
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*
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*
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@@ -53,19 +55,11 @@ extern void INTERRUPT_VECTOR(void);
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"nop\n\t" \
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"nop\n\t" \
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: : "d" (MCF5206E_CACR_CINV) )
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: : "d" (MCF5206E_CACR_CINV) )
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/* Init5206e --
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/*
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* Initialize MCF5206e on-chip modules
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* Initialize MCF5206e on-chip modules
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*
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* PARAMETERS:
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* none
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*
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* RETURNS:
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* none
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*/
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*/
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void
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void Init5206e(void)
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Init5206e(void)
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{
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{
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/* Set Module Base Address register */
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/* Set Module Base Address register */
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m68k_set_mbar((MBAR & MCF5206E_MBAR_BA) | MCF5206E_MBAR_V);
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m68k_set_mbar((MBAR & MCF5206E_MBAR_BA) | MCF5206E_MBAR_V);
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@@ -187,8 +181,8 @@ Init5206e(void)
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uint32_t *inttab = (uint32_t*)&INTERRUPT_VECTOR;
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uint32_t *inttab = (uint32_t*)&INTERRUPT_VECTOR;
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uint32_t *intvec = (uint32_t*)BSP_MEM_ADDR_ESRAM;
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uint32_t *intvec = (uint32_t*)BSP_MEM_ADDR_ESRAM;
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register int i;
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register int i;
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for (i = 0; i < 256; i++)
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{
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for (i = 0; i < 256; i++) {
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*(intvec++) = *(inttab++);
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*(intvec++) = *(inttab++);
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}
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}
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}
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}
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@@ -16,13 +16,14 @@
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*
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*
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* + two digit years 00-87 are mapped to 2000-2087
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* + two digit years 00-87 are mapped to 2000-2087
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* + two digit years 88-99 are mapped to 1988-1999
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* + two digit years 88-99 are mapped to 1988-1999
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*
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*/
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/*
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* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
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* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
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* Author: Victor V. Vengerov <vvv@oktet.ru>
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* Author: Victor V. Vengerov <vvv@oktet.ru>
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*
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*
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* The license and distribution terms for this file may be
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* found in the file LICENSE in this distribution or at
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*
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* http://www.rtems.org/license/LICENSE.
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* http://www.rtems.org/license/LICENSE.
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*/
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*/
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@@ -43,8 +44,7 @@
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* PARAMETERS:
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* PARAMETERS:
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* minor -- minor RTC device number
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* minor -- minor RTC device number
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*/
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*/
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void
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static void ds1307_initialize(int minor)
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ds1307_initialize(int minor)
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{
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{
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i2c_message_status status;
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i2c_message_status status;
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int try;
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int try;
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@@ -63,8 +63,7 @@ ds1307_initialize(int minor)
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} while ((status != I2C_SUCCESSFUL) && (try < 15));
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} while ((status != I2C_SUCCESSFUL) && (try < 15));
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/* If clock is halted, reset and start the clock */
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/* If clock is halted, reset and start the clock */
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if ((sec & DS1307_SECOND_HALT) != 0)
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if ((sec & DS1307_SECOND_HALT) != 0) {
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{
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uint8_t start[8];
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uint8_t start[8];
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memset(start, 0, sizeof(start));
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memset(start, 0, sizeof(start));
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start[0] = DS1307_SECOND;
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start[0] = DS1307_SECOND;
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@@ -87,8 +86,7 @@ ds1307_initialize(int minor)
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* 0, if time obtained successfully
|
* 0, if time obtained successfully
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* -1, if error occured
|
* -1, if error occured
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*/
|
*/
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int
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static int ds1307_get_time(int minor, rtems_time_of_day *time)
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ds1307_get_time(int minor, rtems_time_of_day *time)
|
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{
|
{
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i2c_bus_number bus;
|
i2c_bus_number bus;
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i2c_address addr;
|
i2c_address addr;
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@@ -110,8 +108,7 @@ ds1307_get_time(int minor, rtems_time_of_day *time)
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try++;
|
try++;
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} while ((status != I2C_SUCCESSFUL) && (try < 10));
|
} while ((status != I2C_SUCCESSFUL) && (try < 10));
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|
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if (status != I2C_SUCCESSFUL)
|
if (status != I2C_SUCCESSFUL) {
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{
|
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return -1;
|
return -1;
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}
|
}
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|
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@@ -129,20 +126,14 @@ ds1307_get_time(int minor, rtems_time_of_day *time)
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time->day = From_BCD(v1);
|
time->day = From_BCD(v1);
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|
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v1 = info[DS1307_HOUR];
|
v1 = info[DS1307_HOUR];
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if (v1 & DS1307_HOUR_12)
|
if (v1 & DS1307_HOUR_12) {
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{
|
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v2 = v1 & ~0xE0;
|
v2 = v1 & ~0xE0;
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if (v1 & DS1307_HOUR_PM)
|
if (v1 & DS1307_HOUR_PM) {
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||||||
{
|
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time->hour = From_BCD(v2) + 12;
|
time->hour = From_BCD(v2) + 12;
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}
|
} else {
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||||||
else
|
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{
|
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time->hour = From_BCD(v2);
|
time->hour = From_BCD(v2);
|
||||||
}
|
}
|
||||||
}
|
} else {
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||||||
else
|
|
||||||
{
|
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||||||
v2 = v1 & ~0xC0;
|
v2 = v1 & ~0xC0;
|
||||||
time->hour = From_BCD(v2);
|
time->hour = From_BCD(v2);
|
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}
|
}
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||||||
@@ -168,8 +159,7 @@ ds1307_get_time(int minor, rtems_time_of_day *time)
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|||||||
* 0, if time obtained successfully
|
* 0, if time obtained successfully
|
||||||
* -1, if error occured
|
* -1, if error occured
|
||||||
*/
|
*/
|
||||||
int
|
static int ds1307_set_time(int minor, const rtems_time_of_day *time)
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||||||
ds1307_set_time(int minor, const rtems_time_of_day *time)
|
|
||||||
{
|
{
|
||||||
i2c_bus_number bus;
|
i2c_bus_number bus;
|
||||||
i2c_address addr;
|
i2c_address addr;
|
||||||
|
|||||||
@@ -1,6 +1,8 @@
|
|||||||
/*
|
/*
|
||||||
* Generic UART Serial driver for Motorola Coldfire processors
|
* Generic UART Serial driver for Motorola Coldfire processors
|
||||||
*
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russian Fed.
|
* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russian Fed.
|
||||||
* Author: Victor V. Vengerov <vvv@oktet.ru>
|
* Author: Victor V. Vengerov <vvv@oktet.ru>
|
||||||
*
|
*
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||||||
@@ -10,7 +12,6 @@
|
|||||||
* The license and distribution terms for this file may be
|
* The license and distribution terms for this file may be
|
||||||
* found in the file LICENSE in this distribution or at
|
* found in the file LICENSE in this distribution or at
|
||||||
* http://www.rtems.org/license/LICENSE.
|
* http://www.rtems.org/license/LICENSE.
|
||||||
*
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <rtems.h>
|
#include <rtems.h>
|
||||||
@@ -48,8 +49,12 @@ mcfuart_interrupt_handler(rtems_vector_number vec);
|
|||||||
* RTEMS_SUCCESSFUL if all parameters are valid, or error code
|
* RTEMS_SUCCESSFUL if all parameters are valid, or error code
|
||||||
*/
|
*/
|
||||||
rtems_status_code
|
rtems_status_code
|
||||||
mcfuart_init(mcfuart *uart, void *tty, uint8_t intvec,
|
mcfuart_init(
|
||||||
uint32_t chn)
|
mcfuart *uart,
|
||||||
|
void *tty,
|
||||||
|
uint8_t intvec,
|
||||||
|
uint32_t chn
|
||||||
|
)
|
||||||
{
|
{
|
||||||
if (uart == NULL)
|
if (uart == NULL)
|
||||||
return RTEMS_INVALID_ADDRESS;
|
return RTEMS_INVALID_ADDRESS;
|
||||||
@@ -79,8 +84,8 @@ mcfuart_set_baudrate(mcfuart *uart, speed_t baud)
|
|||||||
{
|
{
|
||||||
uint32_t div;
|
uint32_t div;
|
||||||
uint32_t rate;
|
uint32_t rate;
|
||||||
switch (baud)
|
|
||||||
{
|
switch (baud) {
|
||||||
case B50: rate = 50; break;
|
case B50: rate = 50; break;
|
||||||
case B75: rate = 75; break;
|
case B75: rate = 75; break;
|
||||||
case B110: rate = 110; break;
|
case B110: rate = 110; break;
|
||||||
@@ -128,8 +133,7 @@ mcfuart_set_baudrate(mcfuart *uart, speed_t baud)
|
|||||||
* This function in general follows to algorith described in MCF5206e
|
* This function in general follows to algorith described in MCF5206e
|
||||||
* User's Manual, 12.5 UART Module Initialization Sequence
|
* User's Manual, 12.5 UART Module Initialization Sequence
|
||||||
*/
|
*/
|
||||||
rtems_status_code
|
rtems_status_code mcfuart_reset(mcfuart *uart)
|
||||||
mcfuart_reset(mcfuart *uart)
|
|
||||||
{
|
{
|
||||||
register uint32_t chn;
|
register uint32_t chn;
|
||||||
rtems_status_code rc;
|
rtems_status_code rc;
|
||||||
@@ -148,8 +152,7 @@ mcfuart_reset(mcfuart *uart)
|
|||||||
* disable UART interrupts if polled I/O. Enable the desired
|
* disable UART interrupts if polled I/O. Enable the desired
|
||||||
* interrupt sources.
|
* interrupt sources.
|
||||||
*/
|
*/
|
||||||
if (uart->intvec != 0)
|
if (uart->intvec != 0) {
|
||||||
{
|
|
||||||
int_driven_uart[chn - 1].uart = uart;
|
int_driven_uart[chn - 1].uart = uart;
|
||||||
int_driven_uart[chn - 1].vec = uart->intvec;
|
int_driven_uart[chn - 1].vec = uart->intvec;
|
||||||
rc = rtems_interrupt_catch(mcfuart_interrupt_handler, uart->intvec,
|
rc = rtems_interrupt_catch(mcfuart_interrupt_handler, uart->intvec,
|
||||||
@@ -162,17 +165,14 @@ mcfuart_reset(mcfuart *uart)
|
|||||||
*MCF5206E_IMR(MBAR) &= ~MCF5206E_INTR_BIT(uart->chn == 1 ?
|
*MCF5206E_IMR(MBAR) &= ~MCF5206E_INTR_BIT(uart->chn == 1 ?
|
||||||
MCF5206E_INTR_UART_1 :
|
MCF5206E_INTR_UART_1 :
|
||||||
MCF5206E_INTR_UART_2);
|
MCF5206E_INTR_UART_2);
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
*MCF5206E_UIMR(MBAR,chn) = 0;
|
*MCF5206E_UIMR(MBAR,chn) = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Select the receiver and transmitter clock. */
|
/* Select the receiver and transmitter clock. */
|
||||||
mcfuart_set_baudrate(uart, B19200); /* dBUG defaults (unfortunately,
|
mcfuart_set_baudrate(uart, B19200); /* dBUG defaults (unfortunately,
|
||||||
it is differ to termios default */
|
it is differ to termios default */
|
||||||
*MCF5206E_UCSR(MBAR,chn) =
|
*MCF5206E_UCSR(MBAR,chn) = MCF5206E_UCSR_RCS_TIMER | MCF5206E_UCSR_TCS_TIMER;
|
||||||
MCF5206E_UCSR_RCS_TIMER | MCF5206E_UCSR_TCS_TIMER;
|
|
||||||
|
|
||||||
/* Mode Registers 1,2 - set termios defaults (8N1) */
|
/* Mode Registers 1,2 - set termios defaults (8N1) */
|
||||||
*MCF5206E_UCR(MBAR,chn) = MCF5206E_UCR_MISC_RESET_MR;
|
*MCF5206E_UCR(MBAR,chn) = MCF5206E_UCR_MISC_RESET_MR;
|
||||||
@@ -205,15 +205,14 @@ mcfuart_reset(mcfuart *uart)
|
|||||||
* RTEMS_SUCCESSFUL if UART closed successfuly, or error code in
|
* RTEMS_SUCCESSFUL if UART closed successfuly, or error code in
|
||||||
* other case
|
* other case
|
||||||
*/
|
*/
|
||||||
rtems_status_code
|
rtems_status_code mcfuart_disable(mcfuart *uart)
|
||||||
mcfuart_disable(mcfuart *uart)
|
|
||||||
{
|
{
|
||||||
rtems_status_code rc;
|
rtems_status_code rc;
|
||||||
|
|
||||||
*MCF5206E_UCR(MBAR,uart->chn) =
|
*MCF5206E_UCR(MBAR,uart->chn) =
|
||||||
MCF5206E_UCR_TC_DISABLE |
|
MCF5206E_UCR_TC_DISABLE |
|
||||||
MCF5206E_UCR_RC_DISABLE;
|
MCF5206E_UCR_RC_DISABLE;
|
||||||
if (uart->intvec != 0)
|
if (uart->intvec != 0) {
|
||||||
{
|
|
||||||
*MCF5206E_IMR(MBAR) |= MCF5206E_INTR_BIT(uart->chn == 1 ?
|
*MCF5206E_IMR(MBAR) |= MCF5206E_INTR_BIT(uart->chn == 1 ?
|
||||||
MCF5206E_INTR_UART_1 :
|
MCF5206E_INTR_UART_1 :
|
||||||
MCF5206E_INTR_UART_2);
|
MCF5206E_INTR_UART_2);
|
||||||
@@ -238,8 +237,7 @@ mcfuart_disable(mcfuart *uart)
|
|||||||
* RETURNS:
|
* RETURNS:
|
||||||
* RTEMS_SUCCESSFUL
|
* RTEMS_SUCCESSFUL
|
||||||
*/
|
*/
|
||||||
int
|
int mcfuart_set_attributes(mcfuart *uart, const struct termios *t)
|
||||||
mcfuart_set_attributes(mcfuart *uart, const struct termios *t)
|
|
||||||
{
|
{
|
||||||
int level;
|
int level;
|
||||||
speed_t baud;
|
speed_t baud;
|
||||||
@@ -250,15 +248,13 @@ mcfuart_set_attributes(mcfuart *uart, const struct termios *t)
|
|||||||
umr2 = MCF5206E_UMR2_CM_NORMAL;
|
umr2 = MCF5206E_UMR2_CM_NORMAL;
|
||||||
|
|
||||||
/* Set flow control */
|
/* Set flow control */
|
||||||
if ((t->c_cflag & CRTSCTS) != 0)
|
if ((t->c_cflag & CRTSCTS) != 0) {
|
||||||
{
|
|
||||||
umr1 |= MCF5206E_UMR1_RXRTS;
|
umr1 |= MCF5206E_UMR1_RXRTS;
|
||||||
umr2 |= MCF5206E_UMR2_TXCTS;
|
umr2 |= MCF5206E_UMR2_TXCTS;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Set character size */
|
/* Set character size */
|
||||||
switch (t->c_cflag & CSIZE)
|
switch (t->c_cflag & CSIZE) {
|
||||||
{
|
|
||||||
case CS5: umr1 |= MCF5206E_UMR1_BC_5; break;
|
case CS5: umr1 |= MCF5206E_UMR1_BC_5; break;
|
||||||
case CS6: umr1 |= MCF5206E_UMR1_BC_6; break;
|
case CS6: umr1 |= MCF5206E_UMR1_BC_6; break;
|
||||||
case CS7: umr1 |= MCF5206E_UMR1_BC_7; break;
|
case CS7: umr1 |= MCF5206E_UMR1_BC_7; break;
|
||||||
@@ -266,43 +262,28 @@ mcfuart_set_attributes(mcfuart *uart, const struct termios *t)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Set number of stop bits */
|
/* Set number of stop bits */
|
||||||
if ((t->c_cflag & CSTOPB) != 0)
|
if ((t->c_cflag & CSTOPB) != 0) {
|
||||||
{
|
if ((t->c_cflag & CSIZE) == CS5) {
|
||||||
if ((t->c_cflag & CSIZE) == CS5)
|
|
||||||
{
|
|
||||||
umr2 |= MCF5206E_UMR2_SB5_2;
|
umr2 |= MCF5206E_UMR2_SB5_2;
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
umr2 |= MCF5206E_UMR2_SB_2;
|
umr2 |= MCF5206E_UMR2_SB_2;
|
||||||
}
|
}
|
||||||
}
|
} else {
|
||||||
else
|
if ((t->c_cflag & CSIZE) == CS5) {
|
||||||
{
|
|
||||||
if ((t->c_cflag & CSIZE) == CS5)
|
|
||||||
{
|
|
||||||
umr2 |= MCF5206E_UMR2_SB5_1;
|
umr2 |= MCF5206E_UMR2_SB5_1;
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
umr2 |= MCF5206E_UMR2_SB_1;
|
umr2 |= MCF5206E_UMR2_SB_1;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Set parity mode */
|
/* Set parity mode */
|
||||||
if ((t->c_cflag & PARENB) != 0)
|
if ((t->c_cflag & PARENB) != 0) {
|
||||||
{
|
if ((t->c_cflag & PARODD) != 0) {
|
||||||
if ((t->c_cflag & PARODD) != 0)
|
|
||||||
{
|
|
||||||
umr1 |= MCF5206E_UMR1_PM_ODD;
|
umr1 |= MCF5206E_UMR1_PM_ODD;
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
umr1 |= MCF5206E_UMR1_PM_EVEN;
|
umr1 |= MCF5206E_UMR1_PM_EVEN;
|
||||||
}
|
}
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
umr1 |= MCF5206E_UMR1_PM_NO_PARITY;
|
umr1 |= MCF5206E_UMR1_PM_NO_PARITY;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -313,13 +294,10 @@ mcfuart_set_attributes(mcfuart *uart, const struct termios *t)
|
|||||||
*MCF5206E_UCR(MBAR,uart->chn) = MCF5206E_UCR_MISC_RESET_MR;
|
*MCF5206E_UCR(MBAR,uart->chn) = MCF5206E_UCR_MISC_RESET_MR;
|
||||||
*MCF5206E_UMR(MBAR,uart->chn) = umr1;
|
*MCF5206E_UMR(MBAR,uart->chn) = umr1;
|
||||||
*MCF5206E_UMR(MBAR,uart->chn) = umr2;
|
*MCF5206E_UMR(MBAR,uart->chn) = umr2;
|
||||||
if ((t->c_cflag & CREAD) != 0)
|
if ((t->c_cflag & CREAD) != 0) {
|
||||||
{
|
|
||||||
*MCF5206E_UCR(MBAR,uart->chn) =
|
*MCF5206E_UCR(MBAR,uart->chn) =
|
||||||
MCF5206E_UCR_TC_ENABLE | MCF5206E_UCR_RC_ENABLE;
|
MCF5206E_UCR_TC_ENABLE | MCF5206E_UCR_RC_ENABLE;
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
*MCF5206E_UCR(MBAR,uart->chn) = MCF5206E_UCR_TC_ENABLE;
|
*MCF5206E_UCR(MBAR,uart->chn) = MCF5206E_UCR_TC_ENABLE;
|
||||||
}
|
}
|
||||||
rtems_interrupt_enable(level);
|
rtems_interrupt_enable(level);
|
||||||
@@ -343,39 +321,31 @@ mcfuart_set_attributes(mcfuart *uart, const struct termios *t)
|
|||||||
* RETURNS:
|
* RETURNS:
|
||||||
* code of received character or -1 if no characters received.
|
* code of received character or -1 if no characters received.
|
||||||
*/
|
*/
|
||||||
int
|
int mcfuart_poll_read(mcfuart *uart)
|
||||||
mcfuart_poll_read(mcfuart *uart)
|
|
||||||
{
|
{
|
||||||
uint8_t usr;
|
uint8_t usr;
|
||||||
int ch;
|
int ch;
|
||||||
if (uart->parerr_mark_flag == true)
|
|
||||||
{
|
if (uart->parerr_mark_flag == true) {
|
||||||
uart->parerr_mark_flag = false;
|
uart->parerr_mark_flag = false;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
usr = *MCF5206E_USR(MBAR,uart->chn);
|
usr = *MCF5206E_USR(MBAR,uart->chn);
|
||||||
if ((usr & MCF5206E_USR_RXRDY) != 0)
|
if ((usr & MCF5206E_USR_RXRDY) != 0) {
|
||||||
{
|
|
||||||
if (((usr & (MCF5206E_USR_FE | MCF5206E_USR_PE)) != 0) &&
|
if (((usr & (MCF5206E_USR_FE | MCF5206E_USR_PE)) != 0) &&
|
||||||
!(uart->c_iflag & IGNPAR))
|
!(uart->c_iflag & IGNPAR)) {
|
||||||
{
|
|
||||||
ch = *MCF5206E_URB(MBAR,uart->chn); /* Clear error bits */
|
ch = *MCF5206E_URB(MBAR,uart->chn); /* Clear error bits */
|
||||||
if (uart->c_iflag & PARMRK)
|
if (uart->c_iflag & PARMRK) {
|
||||||
{
|
|
||||||
uart->parerr_mark_flag = true;
|
uart->parerr_mark_flag = true;
|
||||||
ch = 0xff;
|
ch = 0xff;
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
ch = 0;
|
ch = 0;
|
||||||
}
|
}
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
ch = *MCF5206E_URB(MBAR,uart->chn);
|
ch = *MCF5206E_URB(MBAR,uart->chn);
|
||||||
}
|
}
|
||||||
}
|
} else
|
||||||
else
|
|
||||||
ch = -1;
|
ch = -1;
|
||||||
return ch;
|
return ch;
|
||||||
}
|
}
|
||||||
@@ -392,13 +362,11 @@ mcfuart_poll_read(mcfuart *uart)
|
|||||||
* RETURNS:
|
* RETURNS:
|
||||||
* 0
|
* 0
|
||||||
*/
|
*/
|
||||||
ssize_t
|
ssize_t mcfuart_poll_write(mcfuart *uart, const char *buf, size_t len)
|
||||||
mcfuart_poll_write(mcfuart *uart, const char *buf, size_t len)
|
|
||||||
{
|
{
|
||||||
size_t retval = len;
|
size_t retval = len;
|
||||||
|
|
||||||
while (len--)
|
while (len--) {
|
||||||
{
|
|
||||||
while ((*MCF5206E_USR(MBAR, uart->chn) & MCF5206E_USR_TXRDY) == 0);
|
while ((*MCF5206E_USR(MBAR, uart->chn) & MCF5206E_USR_TXRDY) == 0);
|
||||||
*MCF5206E_UTB(MBAR, uart->chn) = *buf++;
|
*MCF5206E_UTB(MBAR, uart->chn) = *buf++;
|
||||||
}
|
}
|
||||||
@@ -414,8 +382,7 @@ mcfuart_poll_write(mcfuart *uart, const char *buf, size_t len)
|
|||||||
* RETURNS:
|
* RETURNS:
|
||||||
* none
|
* none
|
||||||
*/
|
*/
|
||||||
static rtems_isr
|
static rtems_isr mcfuart_interrupt_handler(rtems_vector_number vec)
|
||||||
mcfuart_interrupt_handler(rtems_vector_number vec)
|
|
||||||
{
|
{
|
||||||
mcfuart *uart;
|
mcfuart *uart;
|
||||||
register uint8_t usr;
|
register uint8_t usr;
|
||||||
@@ -434,46 +401,34 @@ mcfuart_interrupt_handler(rtems_vector_number vec)
|
|||||||
chn = uart->chn;
|
chn = uart->chn;
|
||||||
|
|
||||||
uisr = *MCF5206E_UISR(MBAR, chn);
|
uisr = *MCF5206E_UISR(MBAR, chn);
|
||||||
if (uisr & MCF5206E_UISR_DB)
|
if (uisr & MCF5206E_UISR_DB) {
|
||||||
{
|
|
||||||
*MCF5206E_UCR(MBAR, chn) = MCF5206E_UCR_MISC_RESET_BRK;
|
*MCF5206E_UCR(MBAR, chn) = MCF5206E_UCR_MISC_RESET_BRK;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Receiving */
|
/* Receiving */
|
||||||
while (1)
|
while (1) {
|
||||||
{
|
|
||||||
char buf[32];
|
char buf[32];
|
||||||
usr = *MCF5206E_USR(MBAR,chn);
|
usr = *MCF5206E_USR(MBAR,chn);
|
||||||
if ((bp < sizeof(buf) - 1) && ((usr & MCF5206E_USR_RXRDY) != 0))
|
if ((bp < sizeof(buf) - 1) && ((usr & MCF5206E_USR_RXRDY) != 0)) {
|
||||||
{
|
|
||||||
/* Receive character and handle frame/parity errors */
|
/* Receive character and handle frame/parity errors */
|
||||||
if (((usr & (MCF5206E_USR_FE | MCF5206E_USR_PE)) != 0) &&
|
if (((usr & (MCF5206E_USR_FE | MCF5206E_USR_PE)) != 0) &&
|
||||||
!(uart->c_iflag & IGNPAR))
|
!(uart->c_iflag & IGNPAR)) {
|
||||||
{
|
if (uart->c_iflag & PARMRK) {
|
||||||
if (uart->c_iflag & PARMRK)
|
|
||||||
{
|
|
||||||
buf[bp++] = 0xff;
|
buf[bp++] = 0xff;
|
||||||
buf[bp++] = 0x00;
|
buf[bp++] = 0x00;
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
buf[bp++] = 0x00;
|
buf[bp++] = 0x00;
|
||||||
}
|
}
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
buf[bp++] = *MCF5206E_URB(MBAR, chn);
|
buf[bp++] = *MCF5206E_URB(MBAR, chn);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Reset error condition if any errors has been detected */
|
/* Reset error condition if any errors has been detected */
|
||||||
if (usr & (MCF5206E_USR_RB | MCF5206E_USR_FE |
|
if (usr & (MCF5206E_USR_RB | MCF5206E_USR_FE |
|
||||||
MCF5206E_USR_PE | MCF5206E_USR_OE))
|
MCF5206E_USR_PE | MCF5206E_USR_OE)) {
|
||||||
{
|
|
||||||
*MCF5206E_UCR(MBAR, chn) = MCF5206E_UCR_MISC_RESET_ERR;
|
*MCF5206E_UCR(MBAR, chn) = MCF5206E_UCR_MISC_RESET_ERR;
|
||||||
}
|
}
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
if (bp != 0)
|
if (bp != 0)
|
||||||
rtems_termios_enqueue_raw_characters(uart->tty, buf, bp);
|
rtems_termios_enqueue_raw_characters(uart->tty, buf, bp);
|
||||||
break;
|
break;
|
||||||
@@ -481,22 +436,18 @@ mcfuart_interrupt_handler(rtems_vector_number vec)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Transmitting */
|
/* Transmitting */
|
||||||
while (1)
|
while (1) {
|
||||||
{
|
|
||||||
if ((*MCF5206E_USR(MBAR, chn) & MCF5206E_USR_TXRDY) == 0)
|
if ((*MCF5206E_USR(MBAR, chn) & MCF5206E_USR_TXRDY) == 0)
|
||||||
break;
|
break;
|
||||||
if (uart->tx_buf != NULL)
|
if (uart->tx_buf != NULL) {
|
||||||
{
|
if (uart->tx_ptr >= uart->tx_buf_len) {
|
||||||
if (uart->tx_ptr >= uart->tx_buf_len)
|
|
||||||
{
|
|
||||||
register int dequeue = uart->tx_buf_len;
|
register int dequeue = uart->tx_buf_len;
|
||||||
|
|
||||||
*MCF5206E_UIMR(MBAR, uart->chn) = MCF5206E_UIMR_FFULL;
|
*MCF5206E_UIMR(MBAR, uart->chn) = MCF5206E_UIMR_FFULL;
|
||||||
uart->tx_buf = NULL;
|
uart->tx_buf = NULL;
|
||||||
uart->tx_ptr = uart->tx_buf_len = 0;
|
uart->tx_ptr = uart->tx_buf_len = 0;
|
||||||
rtems_termios_dequeue_characters(uart->tty, dequeue);
|
rtems_termios_dequeue_characters(uart->tty, dequeue);
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
*MCF5206E_UTB(MBAR, chn) = uart->tx_buf[uart->tx_ptr++];
|
*MCF5206E_UTB(MBAR, chn) = uart->tx_buf[uart->tx_ptr++];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -516,19 +467,20 @@ mcfuart_interrupt_handler(rtems_vector_number vec)
|
|||||||
* RETURNS:
|
* RETURNS:
|
||||||
* 0
|
* 0
|
||||||
*/
|
*/
|
||||||
ssize_t
|
ssize_t mcfuart_interrupt_write(
|
||||||
mcfuart_interrupt_write(mcfuart *uart, const char *buf, size_t len)
|
mcfuart *uart,
|
||||||
|
const char *buf,
|
||||||
|
size_t len
|
||||||
|
)
|
||||||
{
|
{
|
||||||
if (len > 0)
|
if (len > 0) {
|
||||||
{
|
|
||||||
uart->tx_buf = buf;
|
uart->tx_buf = buf;
|
||||||
uart->tx_buf_len = len;
|
uart->tx_buf_len = len;
|
||||||
uart->tx_ptr = 0;
|
uart->tx_ptr = 0;
|
||||||
*MCF5206E_UIMR(MBAR, uart->chn) =
|
*MCF5206E_UIMR(MBAR, uart->chn) =
|
||||||
MCF5206E_UIMR_FFULL | MCF5206E_UIMR_TXRDY;
|
MCF5206E_UIMR_FFULL | MCF5206E_UIMR_TXRDY;
|
||||||
while (((*MCF5206E_USR(MBAR,uart->chn) & MCF5206E_USR_TXRDY) != 0) &&
|
while (((*MCF5206E_USR(MBAR,uart->chn) & MCF5206E_USR_TXRDY) != 0) &&
|
||||||
(uart->tx_ptr < uart->tx_buf_len))
|
(uart->tx_ptr < uart->tx_buf_len)) {
|
||||||
{
|
|
||||||
*MCF5206E_UTB(MBAR,uart->chn) = uart->tx_buf[uart->tx_ptr++];
|
*MCF5206E_UTB(MBAR,uart->chn) = uart->tx_buf[uart->tx_ptr++];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -545,8 +497,7 @@ mcfuart_interrupt_write(mcfuart *uart, const char *buf, size_t len)
|
|||||||
* RETURNS:
|
* RETURNS:
|
||||||
* RTEMS_SUCCESSFUL
|
* RTEMS_SUCCESSFUL
|
||||||
*/
|
*/
|
||||||
int
|
int mcfuart_stop_remote_tx(mcfuart *uart)
|
||||||
mcfuart_stop_remote_tx(mcfuart *uart)
|
|
||||||
{
|
{
|
||||||
*MCF5206E_UOP0(MBAR, uart->chn) = 1;
|
*MCF5206E_UOP0(MBAR, uart->chn) = 1;
|
||||||
return RTEMS_SUCCESSFUL;
|
return RTEMS_SUCCESSFUL;
|
||||||
@@ -561,8 +512,7 @@ mcfuart_stop_remote_tx(mcfuart *uart)
|
|||||||
* RETURNS:
|
* RETURNS:
|
||||||
* RTEMS_SUCCESSFUL
|
* RTEMS_SUCCESSFUL
|
||||||
*/
|
*/
|
||||||
int
|
int mcfuart_start_remote_tx(mcfuart *uart)
|
||||||
mcfuart_start_remote_tx(mcfuart *uart)
|
|
||||||
{
|
{
|
||||||
*MCF5206E_UOP1(MBAR, uart->chn) = 1;
|
*MCF5206E_UOP1(MBAR, uart->chn) = 1;
|
||||||
return RTEMS_SUCCESSFUL;
|
return RTEMS_SUCCESSFUL;
|
||||||
|
|||||||
@@ -36,7 +36,7 @@ typedef struct mcfmbus {
|
|||||||
rtems_isr_entry oldisr; /* Old interrupt handler */
|
rtems_isr_entry oldisr; /* Old interrupt handler */
|
||||||
rtems_id sema; /* MBUS semaphore */
|
rtems_id sema; /* MBUS semaphore */
|
||||||
i2c_transfer_done done; /* Transfer done function */
|
i2c_transfer_done done; /* Transfer done function */
|
||||||
uint32_t done_arg_ptr; /* Done function argument ptr */
|
uintptr_t done_arg_ptr; /* Done function argument ptr */
|
||||||
} mcfmbus;
|
} mcfmbus;
|
||||||
|
|
||||||
/* mcfmbus_initialize --
|
/* mcfmbus_initialize --
|
||||||
|
|||||||
@@ -34,7 +34,7 @@ typedef struct mcfuart {
|
|||||||
0 if polled I/O */
|
0 if polled I/O */
|
||||||
void *tty; /* termios channel descriptor */
|
void *tty; /* termios channel descriptor */
|
||||||
|
|
||||||
volatile const uint8_t *tx_buf; /* Transmit buffer from termios */
|
volatile const char *tx_buf; /* Transmit buffer from termios */
|
||||||
volatile uint32_t tx_buf_len; /* Transmit buffer length */
|
volatile uint32_t tx_buf_len; /* Transmit buffer length */
|
||||||
volatile uint32_t tx_ptr; /* Index of next char to transmit*/
|
volatile uint32_t tx_ptr; /* Index of next char to transmit*/
|
||||||
rtems_isr_entry old_handler; /* Saved interrupt handler */
|
rtems_isr_entry old_handler; /* Saved interrupt handler */
|
||||||
|
|||||||
@@ -1,6 +1,8 @@
|
|||||||
/*
|
/*
|
||||||
* MCF5206e MBUS module (I2C bus) driver
|
* MCF5206e MBUS module (I2C bus) driver
|
||||||
*
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
|
* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
|
||||||
* Author: Victor V. Vengerov <vvv@oktet.ru>
|
* Author: Victor V. Vengerov <vvv@oktet.ru>
|
||||||
*
|
*
|
||||||
@@ -115,46 +117,36 @@ mcfmbus_get_event(mcfmbus *bus)
|
|||||||
rtems_interrupt_disable(level);
|
rtems_interrupt_disable(level);
|
||||||
status = *MCF5206E_MBSR(bus->base);
|
status = *MCF5206E_MBSR(bus->base);
|
||||||
control = *MCF5206E_MBCR(bus->base);
|
control = *MCF5206E_MBCR(bus->base);
|
||||||
if (status & MCF5206E_MBSR_MIF) /* Interrupt occured */
|
|
||||||
{
|
if (status & MCF5206E_MBSR_MIF) { /* Interrupt occured */
|
||||||
if (status & MCF5206E_MBSR_MAAS)
|
if (status & MCF5206E_MBSR_MAAS) {
|
||||||
{
|
|
||||||
event = EVENT_SLAVE;
|
event = EVENT_SLAVE;
|
||||||
*MCF5206E_MBCR(bus->base) = control; /* To clear Addressed As Slave
|
*MCF5206E_MBCR(bus->base) = control; /* To clear Addressed As Slave
|
||||||
condition */
|
condition */
|
||||||
}
|
} else if (status & MCF5206E_MBSR_MAL) { /* Arbitration lost */
|
||||||
else if (status & MCF5206E_MBSR_MAL) /* Arbitration lost */
|
|
||||||
{
|
|
||||||
*MCF5206E_MBSR(bus->base) = status & ~MCF5206E_MBSR_MAL;
|
*MCF5206E_MBSR(bus->base) = status & ~MCF5206E_MBSR_MAL;
|
||||||
event = EVENT_ARB_LOST;
|
event = EVENT_ARB_LOST;
|
||||||
}
|
}
|
||||||
else if (control & MCF5206E_MBCR_MTX) /* Trasmit mode */
|
else if (control & MCF5206E_MBCR_MTX) { /* Trasmit mode */
|
||||||
{
|
|
||||||
if (status & MCF5206E_MBSR_RXAK)
|
if (status & MCF5206E_MBSR_RXAK)
|
||||||
event = EVENT_NACK;
|
event = EVENT_NACK;
|
||||||
else
|
else
|
||||||
event = EVENT_ACK;
|
event = EVENT_ACK;
|
||||||
}
|
} else { /* Received */
|
||||||
else /* Received */
|
|
||||||
{
|
|
||||||
event = EVENT_DATA_RECV;
|
event = EVENT_DATA_RECV;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Clear interrupt condition */
|
/* Clear interrupt condition */
|
||||||
*MCF5206E_MBSR(bus->base) &= ~MCF5206E_MBSR_MIF;
|
*MCF5206E_MBSR(bus->base) &= ~MCF5206E_MBSR_MIF;
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
event = EVENT_NONE;
|
event = EVENT_NONE;
|
||||||
}
|
}
|
||||||
rtems_interrupt_enable(level);
|
rtems_interrupt_enable(level);
|
||||||
return event;
|
return event;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void mcfmbus_machine_error(mcfmbus *bus, i2c_event event)
|
||||||
mcfmbus_machine_error(mcfmbus *bus, i2c_event event)
|
|
||||||
{
|
{
|
||||||
return;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* mcfmbus_machine --
|
/* mcfmbus_machine --
|
||||||
@@ -167,37 +159,31 @@ mcfmbus_machine_error(mcfmbus *bus, i2c_event event)
|
|||||||
* RETURNS:
|
* RETURNS:
|
||||||
* none
|
* none
|
||||||
*/
|
*/
|
||||||
static void
|
static void mcfmbus_machine(mcfmbus *bus, i2c_event event)
|
||||||
mcfmbus_machine(mcfmbus *bus, i2c_event event)
|
|
||||||
{
|
{
|
||||||
uint8_t b;
|
uint8_t b;
|
||||||
switch (bus->state)
|
|
||||||
{
|
switch (bus->state) {
|
||||||
case STATE_IDLE:
|
case STATE_IDLE:
|
||||||
switch (event)
|
switch (event) {
|
||||||
{
|
|
||||||
case EVENT_NEXTMSG: /* Start new message processing */
|
case EVENT_NEXTMSG: /* Start new message processing */
|
||||||
bus->cmsg++;
|
bus->cmsg++;
|
||||||
/* FALLTHRU */
|
/* FALLTHRU */
|
||||||
|
|
||||||
case EVENT_TRANSFER: /* Initiate new transfer */
|
case EVENT_TRANSFER: /* Initiate new transfer */
|
||||||
if (bus->cmsg - bus->msg >= bus->nmsg)
|
if (bus->cmsg - bus->msg >= bus->nmsg) {
|
||||||
{
|
|
||||||
mcfmbus_stop(bus);
|
mcfmbus_stop(bus);
|
||||||
next_state(bus, STATE_IDLE);
|
next_state(bus, STATE_IDLE);
|
||||||
bus->msg = bus->cmsg = NULL;
|
bus->msg = bus->cmsg = NULL;
|
||||||
bus->nmsg = bus->byte = 0;
|
bus->nmsg = bus->byte = 0;
|
||||||
bus->done(bus->done_arg_ptr);
|
bus->done((void *)bus->done_arg_ptr);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Initiate START or REPEATED START condition on the bus */
|
/* Initiate START or REPEATED START condition on the bus */
|
||||||
if (event == EVENT_TRANSFER)
|
if (event == EVENT_TRANSFER) {
|
||||||
{
|
|
||||||
mcfmbus_start(bus);
|
mcfmbus_start(bus);
|
||||||
}
|
} else { /* (event == EVENT_NEXTMSG) */
|
||||||
else /* (event == EVENT_NEXTMSG) */
|
|
||||||
{
|
|
||||||
mcfmbus_rstart(bus);
|
mcfmbus_rstart(bus);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -205,31 +191,22 @@ mcfmbus_machine(mcfmbus *bus, i2c_event event)
|
|||||||
mcfmbus_tx_mode(bus);
|
mcfmbus_tx_mode(bus);
|
||||||
|
|
||||||
/* Initiate slave address sending */
|
/* Initiate slave address sending */
|
||||||
if (bus->cmsg->flags & I2C_MSG_ADDR_10)
|
if (bus->cmsg->flags & I2C_MSG_ADDR_10) {
|
||||||
{
|
|
||||||
i2c_address a = bus->cmsg->addr;
|
i2c_address a = bus->cmsg->addr;
|
||||||
b = 0xf0 | (((a >> 8) & 0x03) << 1);
|
b = 0xf0 | (((a >> 8) & 0x03) << 1);
|
||||||
if (bus->cmsg->flags & I2C_MSG_WR)
|
if (bus->cmsg->flags & I2C_MSG_WR) {
|
||||||
{
|
|
||||||
mcfmbus_send(bus, b);
|
mcfmbus_send(bus, b);
|
||||||
next_state(bus, STATE_ADDR_1_W);
|
next_state(bus, STATE_ADDR_1_W);
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
mcfmbus_send(bus, b | 1);
|
mcfmbus_send(bus, b | 1);
|
||||||
next_state(bus, STATE_ADDR_1_R);
|
next_state(bus, STATE_ADDR_1_R);
|
||||||
}
|
}
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
b = (bus->cmsg->addr & ~0x01);
|
b = (bus->cmsg->addr & ~0x01);
|
||||||
|
|
||||||
if (bus->cmsg->flags & I2C_MSG_WR)
|
if (bus->cmsg->flags & I2C_MSG_WR) {
|
||||||
{
|
|
||||||
next_state(bus, STATE_SENDING);
|
next_state(bus, STATE_SENDING);
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
next_state(bus, STATE_ADDR_7);
|
next_state(bus, STATE_ADDR_7);
|
||||||
b |= 1;
|
b |= 1;
|
||||||
}
|
}
|
||||||
@@ -245,8 +222,7 @@ mcfmbus_machine(mcfmbus *bus, i2c_event event)
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
case STATE_ADDR_7:
|
case STATE_ADDR_7:
|
||||||
switch (event)
|
switch (event) {
|
||||||
{
|
|
||||||
case EVENT_ACK:
|
case EVENT_ACK:
|
||||||
mcfmbus_rx_mode(bus);
|
mcfmbus_rx_mode(bus);
|
||||||
if (bus->cmsg->len <= 1)
|
if (bus->cmsg->len <= 1)
|
||||||
@@ -276,18 +252,13 @@ mcfmbus_machine(mcfmbus *bus, i2c_event event)
|
|||||||
|
|
||||||
case STATE_ADDR_1_R:
|
case STATE_ADDR_1_R:
|
||||||
case STATE_ADDR_1_W:
|
case STATE_ADDR_1_W:
|
||||||
switch (event)
|
switch (event) {
|
||||||
{
|
case EVENT_ACK: {
|
||||||
case EVENT_ACK:
|
|
||||||
{
|
|
||||||
uint8_t b = (bus->cmsg->addr & 0xff);
|
uint8_t b = (bus->cmsg->addr & 0xff);
|
||||||
mcfmbus_send(bus, b);
|
mcfmbus_send(bus, b);
|
||||||
if (bus->state == STATE_ADDR_1_W)
|
if (bus->state == STATE_ADDR_1_W) {
|
||||||
{
|
|
||||||
next_state(bus, STATE_SENDING);
|
next_state(bus, STATE_SENDING);
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
i2c_address a;
|
i2c_address a;
|
||||||
mcfmbus_rstart(bus);
|
mcfmbus_rstart(bus);
|
||||||
mcfmbus_tx_mode(bus);
|
mcfmbus_tx_mode(bus);
|
||||||
@@ -318,28 +289,21 @@ mcfmbus_machine(mcfmbus *bus, i2c_event event)
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
case STATE_SENDING:
|
case STATE_SENDING:
|
||||||
switch (event)
|
switch (event) {
|
||||||
{
|
|
||||||
case EVENT_ACK:
|
case EVENT_ACK:
|
||||||
if (bus->byte == bus->cmsg->len)
|
if (bus->byte == bus->cmsg->len) {
|
||||||
{
|
|
||||||
next_state(bus, STATE_IDLE);
|
next_state(bus, STATE_IDLE);
|
||||||
mcfmbus_machine(bus, EVENT_NEXTMSG);
|
mcfmbus_machine(bus, EVENT_NEXTMSG);
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
mcfmbus_send(bus, bus->cmsg->buf[bus->byte++]);
|
mcfmbus_send(bus, bus->cmsg->buf[bus->byte++]);
|
||||||
next_state(bus, STATE_SENDING);
|
next_state(bus, STATE_SENDING);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case EVENT_NACK:
|
case EVENT_NACK:
|
||||||
if (bus->byte == 0)
|
if (bus->byte == 0) {
|
||||||
{
|
|
||||||
mcfmbus_error(bus, I2C_NO_DEVICE);
|
mcfmbus_error(bus, I2C_NO_DEVICE);
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
mcfmbus_error(bus, I2C_NO_ACKNOWLEDGE);
|
mcfmbus_error(bus, I2C_NO_ACKNOWLEDGE);
|
||||||
}
|
}
|
||||||
next_state(bus, STATE_IDLE);
|
next_state(bus, STATE_IDLE);
|
||||||
@@ -355,37 +319,28 @@ mcfmbus_machine(mcfmbus *bus, i2c_event event)
|
|||||||
default:
|
default:
|
||||||
mcfmbus_machine_error(bus, event);
|
mcfmbus_machine_error(bus, event);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case STATE_RECEIVING:
|
case STATE_RECEIVING:
|
||||||
switch (event)
|
switch (event) {
|
||||||
{
|
|
||||||
case EVENT_DATA_RECV:
|
case EVENT_DATA_RECV:
|
||||||
if (bus->cmsg->len - bus->byte <= 2)
|
if (bus->cmsg->len - bus->byte <= 2) {
|
||||||
{
|
|
||||||
mcfmbus_send_nack(bus);
|
mcfmbus_send_nack(bus);
|
||||||
if (bus->cmsg->len - bus->byte <= 1)
|
if (bus->cmsg->len - bus->byte <= 1) {
|
||||||
{
|
|
||||||
if (bus->cmsg - bus->msg + 1 == bus->nmsg)
|
if (bus->cmsg - bus->msg + 1 == bus->nmsg)
|
||||||
mcfmbus_stop(bus);
|
mcfmbus_stop(bus);
|
||||||
else
|
else
|
||||||
mcfmbus_rstart(bus);
|
mcfmbus_rstart(bus);
|
||||||
}
|
}
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
mcfmbus_send_ack(bus);
|
mcfmbus_send_ack(bus);
|
||||||
}
|
}
|
||||||
bus->cmsg->buf[bus->byte++] = *MCF5206E_MBDR(bus->base);
|
bus->cmsg->buf[bus->byte++] = *MCF5206E_MBDR(bus->base);
|
||||||
if (bus->cmsg->len == bus->byte)
|
if (bus->cmsg->len == bus->byte) {
|
||||||
{
|
|
||||||
next_state(bus,STATE_IDLE);
|
next_state(bus,STATE_IDLE);
|
||||||
mcfmbus_machine(bus, EVENT_NEXTMSG);
|
mcfmbus_machine(bus, EVENT_NEXTMSG);
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
{
|
|
||||||
next_state(bus,STATE_RECEIVING);
|
next_state(bus,STATE_RECEIVING);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
@@ -405,16 +360,15 @@ mcfmbus_machine(mcfmbus *bus, i2c_event event)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* mcfmbus_interrupt_handler --
|
/* mcfmbus_interrupt_handler --
|
||||||
* MBUS module interrupt handler routine
|
* MBUS module interrupt handler routine
|
||||||
*
|
*
|
||||||
* PARAMETERS:
|
* PARAMETERS:
|
||||||
* vector - interrupt vector number (not used)
|
* vector - interrupt vector number (not used)
|
||||||
*
|
*
|
||||||
* RETURNS:
|
* RETURNS:
|
||||||
* none
|
* none
|
||||||
*/
|
*/
|
||||||
rtems_isr
|
static rtems_isr mcfmbus_interrupt_handler(rtems_vector_number vector)
|
||||||
mcfmbus_interrupt_handler(rtems_vector_number vector)
|
|
||||||
{
|
{
|
||||||
i2c_event event;
|
i2c_event event;
|
||||||
event = mcfmbus_get_event(mbus);
|
event = mcfmbus_get_event(mbus);
|
||||||
@@ -422,15 +376,15 @@ mcfmbus_interrupt_handler(rtems_vector_number vector)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* mcfmbus_poll --
|
/* mcfmbus_poll --
|
||||||
* MBUS module poll routine; used to poll events when I2C driver
|
* MBUS module poll routine; used to poll events when I2C driver
|
||||||
* operates in poll-driven mode.
|
* operates in poll-driven mode.
|
||||||
*
|
*
|
||||||
* PARAMETERS:
|
* PARAMETERS:
|
||||||
* none
|
* none
|
||||||
*
|
*
|
||||||
* RETURNS:
|
* RETURNS:
|
||||||
* none
|
* none
|
||||||
*/
|
*/
|
||||||
void
|
void
|
||||||
mcfmbus_poll(mcfmbus *bus)
|
mcfmbus_poll(mcfmbus *bus)
|
||||||
{
|
{
|
||||||
@@ -441,17 +395,17 @@ mcfmbus_poll(mcfmbus *bus)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* mcfmbus_select_clock_divider --
|
/* mcfmbus_select_clock_divider --
|
||||||
* Select divider for system clock which is used for I2C bus clock
|
* Select divider for system clock which is used for I2C bus clock
|
||||||
* generation. Not each divider can be selected for I2C bus; this
|
* generation. Not each divider can be selected for I2C bus; this
|
||||||
* function select nearest larger or equal divider.
|
* function select nearest larger or equal divider.
|
||||||
*
|
*
|
||||||
* PARAMETERS:
|
* PARAMETERS:
|
||||||
* i2c_bus - pointer to the bus descriptor structure
|
* i2c_bus - pointer to the bus descriptor structure
|
||||||
* divider - system frequency divider for I2C serial clock.
|
* divider - system frequency divider for I2C serial clock.
|
||||||
* RETURNS:
|
* RETURNS:
|
||||||
* RTEMS_SUCCESSFUL, if operation performed successfully, or
|
* RTEMS_SUCCESSFUL, if operation performed successfully, or
|
||||||
* RTEMS error code when failed.
|
* RTEMS error code when failed.
|
||||||
*/
|
*/
|
||||||
rtems_status_code
|
rtems_status_code
|
||||||
mcfmbus_select_clock_divider(mcfmbus *i2c_bus, int divider)
|
mcfmbus_select_clock_divider(mcfmbus *i2c_bus, int divider)
|
||||||
{
|
{
|
||||||
@@ -479,11 +433,9 @@ mcfmbus_select_clock_divider(mcfmbus *i2c_bus, int divider)
|
|||||||
if (i2c_bus == NULL)
|
if (i2c_bus == NULL)
|
||||||
return RTEMS_INVALID_ADDRESS;
|
return RTEMS_INVALID_ADDRESS;
|
||||||
|
|
||||||
for (i = 0, mbc = -1; i < sizeof(dividers)/sizeof(dividers[0]); i++)
|
for (i = 0, mbc = -1; i < sizeof(dividers)/sizeof(dividers[0]); i++) {
|
||||||
{
|
|
||||||
mbc = dividers[i].mbc;
|
mbc = dividers[i].mbc;
|
||||||
if (dividers[i].divider >= divider)
|
if (dividers[i].divider >= divider) {
|
||||||
{
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -492,17 +444,16 @@ mcfmbus_select_clock_divider(mcfmbus *i2c_bus, int divider)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* mcfmbus_initialize --
|
/* mcfmbus_initialize --
|
||||||
* Initialize ColdFire MBUS I2C bus controller.
|
* Initialize ColdFire MBUS I2C bus controller.
|
||||||
*
|
*
|
||||||
* PARAMETERS:
|
* PARAMETERS:
|
||||||
* i2c_bus - pointer to the bus descriptor structure
|
* i2c_bus - pointer to the bus descriptor structure
|
||||||
* base - ColdFire internal peripherial base address
|
* base - ColdFire internal peripherial base address
|
||||||
*
|
*
|
||||||
* RETURNS:
|
* RETURNS:
|
||||||
* RTEMS_SUCCESSFUL, or RTEMS error code when initialization failed.
|
* RTEMS_SUCCESSFUL, or RTEMS error code when initialization failed.
|
||||||
*/
|
*/
|
||||||
rtems_status_code
|
rtems_status_code mcfmbus_initialize(mcfmbus *i2c_bus, uint32_t base)
|
||||||
mcfmbus_initialize(mcfmbus *i2c_bus, uint32_t base)
|
|
||||||
{
|
{
|
||||||
rtems_interrupt_level level;
|
rtems_interrupt_level level;
|
||||||
rtems_status_code sc;
|
rtems_status_code sc;
|
||||||
@@ -543,29 +494,33 @@ mcfmbus_initialize(mcfmbus *i2c_bus, uint32_t base)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* mcfmbus_i2c_transfer --
|
/* mcfmbus_i2c_transfer --
|
||||||
* Initiate multiple-messages transfer over I2C bus via ColdFire MBUS
|
* Initiate multiple-messages transfer over I2C bus via ColdFire MBUS
|
||||||
* controller.
|
* controller.
|
||||||
*
|
*
|
||||||
* PARAMETERS:
|
* PARAMETERS:
|
||||||
* bus - pointer to MBUS controller descriptor
|
* bus - pointer to MBUS controller descriptor
|
||||||
* nmsg - number of messages
|
* nmsg - number of messages
|
||||||
* msg - pointer to messages array
|
* msg - pointer to messages array
|
||||||
* done - function which is called when transfer is finished
|
* done - function which is called when transfer is finished
|
||||||
* done_arg_ptr - arbitrary argument ptr passed to done funciton
|
* done_arg_ptr - arbitrary argument ptr passed to done funciton
|
||||||
*
|
*
|
||||||
* RETURNS:
|
* RETURNS:
|
||||||
* RTEMS_SUCCESSFUL if transfer initiated successfully, or error
|
* RTEMS_SUCCESSFUL if transfer initiated successfully, or error
|
||||||
* code when failed.
|
* code when failed.
|
||||||
*/
|
*/
|
||||||
rtems_status_code
|
rtems_status_code mcfmbus_i2c_transfer(
|
||||||
mcfmbus_i2c_transfer(mcfmbus *bus, int nmsg, i2c_message *msg,
|
mcfmbus *bus,
|
||||||
i2c_transfer_done done, void *done_arg_ptr)
|
int nmsg,
|
||||||
|
i2c_message *msg,
|
||||||
|
i2c_transfer_done done,
|
||||||
|
void *done_arg_ptr
|
||||||
|
)
|
||||||
{
|
{
|
||||||
if (bus != mbus)
|
if (bus != mbus)
|
||||||
return RTEMS_NOT_CONFIGURED;
|
return RTEMS_NOT_CONFIGURED;
|
||||||
|
|
||||||
bus->done = done;
|
bus->done = done;
|
||||||
bus->done_arg_ptr = done_arg_ptr;
|
bus->done_arg_ptr = (uintptr_t) done_arg_ptr;
|
||||||
bus->cmsg = bus->msg = msg;
|
bus->cmsg = bus->msg = msg;
|
||||||
bus->nmsg = nmsg;
|
bus->nmsg = nmsg;
|
||||||
bus->byte = 0;
|
bus->byte = 0;
|
||||||
@@ -576,17 +531,16 @@ mcfmbus_i2c_transfer(mcfmbus *bus, int nmsg, i2c_message *msg,
|
|||||||
|
|
||||||
|
|
||||||
/* mcfmbus_i2c_done --
|
/* mcfmbus_i2c_done --
|
||||||
* Close ColdFire MBUS I2C bus controller and release all resources.
|
* Close ColdFire MBUS I2C bus controller and release all resources.
|
||||||
*
|
*
|
||||||
* PARAMETERS:
|
* PARAMETERS:
|
||||||
* bus - pointer to MBUS controller descriptor
|
* bus - pointer to MBUS controller descriptor
|
||||||
*
|
*
|
||||||
* RETURNS:
|
* RETURNS:
|
||||||
* RTEMS_SUCCESSFUL, if transfer initiated successfully, or error
|
* RTEMS_SUCCESSFUL, if transfer initiated successfully, or error
|
||||||
* code when failed.
|
* code when failed.
|
||||||
*/
|
*/
|
||||||
rtems_status_code
|
rtems_status_code mcfmbus_i2c_done(mcfmbus *i2c_bus)
|
||||||
mcfmbus_i2c_done(mcfmbus *i2c_bus)
|
|
||||||
{
|
{
|
||||||
rtems_status_code sc;
|
rtems_status_code sc;
|
||||||
uint32_t base;
|
uint32_t base;
|
||||||
|
|||||||
Reference in New Issue
Block a user