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adapted powerpc BSPs to new exception code

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This commit is contained in:
Thomas Doerfler
2008-07-11 10:01:37 +00:00
parent 69effbb4e1
commit a86f3aac96
14 changed files with 136 additions and 166 deletions
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6
c/src/lib/libbsp/ChangeLog
View File

@@ -1,9 +1,3 @@
2008-07-09 Sebastian Huber <sebastian.huber@embedded-brains.de>
* shared/include/irq-config.h, shared/include/irq-generic.h,
shared/src/irq-generic.c, shared/src/irq-legacy.c: Generic BSP
interrupt handler support.
2008-01-16 Ralf Corsepius <ralf.corsepius@rtems.org> 2008-01-16 Ralf Corsepius <ralf.corsepius@rtems.org>
* Makefile.am: Fix indentation. * Makefile.am: Fix indentation.

17
c/src/lib/libbsp/powerpc/ChangeLog
View File

@@ -1,3 +1,20 @@
2008-07-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
* ep1a/startup/bspstart.c, mvme3100/startup/bspstart.c,
mvme5500/startup/bspstart.c, psim/startup/bspstart.c,
shared/startup/bspstart.c: The usage of SPRG0 as changed. It is now
used to store the interrupt disable mask. See bootcard.c and
ppc_exc_initialize() for default initialization.
Update to new exception initialization routine ppc_exc_initialize().
The exception low level code has changed, see libcpu/powerpc/ChangeLog.
* gen5200/startup/bspstart.c, mbx8xx/startup/bspstart.c,
mpc8260ads/startup/bspstart.c, ss555/startup/bspstart.c,
virtex/startup/bspstart.c: The usage of SPRG0 as changed. It is now
used to store the interrupt disable mask. See bootcard.c for default
initialization.
2008-07-10 Till Straumann <strauman@slac.stanford.edu> 2008-07-10 Till Straumann <strauman@slac.stanford.edu>
* shared/flash/spansionFlash.c: removed "m" memory * shared/flash/spansionFlash.c: removed "m" memory

38
c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c
View File

@@ -14,6 +14,8 @@
* $Id$ * $Id$
*/ */
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
#include <string.h> #include <string.h>
#include <rtems/libio.h> #include <rtems/libio.h>
@@ -45,7 +47,6 @@ unsigned int rsPMCQ1Init();
uint32_t bsp_clicks_per_usec; uint32_t bsp_clicks_per_usec;
SPR_RW(SPRG0)
SPR_RW(SPRG1) SPR_RW(SPRG1)
uint8_t LightIdx = 0; uint8_t LightIdx = 0;
@@ -327,8 +328,8 @@ void Read_ep1a_config_registers( ppc_cpu_id_t myCpu ) {
void bsp_start( void ) void bsp_start( void )
{ {
unsigned char *stack; unsigned char *stack;
register uint32_t intrStack; uint32_t intrStackStart;
register uint32_t *intrStackPtr; uint32_t intrStackSize;
unsigned char *work_space_start; unsigned char *work_space_start;
ppc_cpu_id_t myCpu; ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision; ppc_cpu_revision_t myCpuRevision;
@@ -373,32 +374,19 @@ ShowBATS();
*((uint32_t *)stack) = 0; *((uint32_t *)stack) = 0;
/* /*
* Initialize the interrupt related settings * Initialize the interrupt related settings.
* SPRG1 = software managed IRQ stack
*
* This could be done latter (e.g in IRQ_INIT) but it helps to understand
* some settings below...
*/ */
intrStack = ((uint32_t) __rtems_end) + intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE;
INIT_STACK_SIZE + rtems_configuration_get_interrupt_stack_size() - intrStackSize = rtems_configuration_get_interrupt_stack_size();
PPC_MINIMUM_STACK_FRAME_SIZE;
/* make sure it's properly aligned */
intrStack &= ~(CPU_STACK_ALIGNMENT-1);
/* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
intrStackPtr = (uint32_t*) intrStack;
*intrStackPtr = 0;
_write_SPRG1((unsigned int)intrStack);
/* signal them that we have fixed PR288 - eventually, this should go away */
_write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
/* /*
* Initialize default raw exception hanlders. See vectors/vectors_init.c * Initialize default raw exception hanlders.
*/ */
initialize_exceptions(); ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
/* /*
* Init MMU block address translation to enable hardware * Init MMU block address translation to enable hardware

6
c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
View File

@@ -94,6 +94,8 @@
/* */ /* */
/***********************************************************************/ /***********************************************************************/
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
#include <bsp.h> #include <bsp.h>
#include <rtems/libio.h> #include <rtems/libio.h>
@@ -113,7 +115,6 @@ bd_t *uboot_bdinfo_ptr = (bd_t *)1; /* will be overwritten from startup code */
bd_t uboot_bdinfo_copy; /* will be overwritten with copy of bdinfo */ bd_t uboot_bdinfo_copy; /* will be overwritten with copy of bdinfo */
#endif #endif
SPR_RW(SPRG0)
SPR_RW(SPRG1) SPR_RW(SPRG1)
extern unsigned long intrStackPtr; extern unsigned long intrStackPtr;
@@ -253,9 +254,6 @@ void bsp_start(void)
_write_SPRG1((unsigned int)intrStack); _write_SPRG1((unsigned int)intrStack);
/* Signal them that this BSP has fixed PR288 - eventually, this should go away */
_write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
bsp_clicks_per_usec = (IPB_CLOCK/1000000); bsp_clicks_per_usec = (IPB_CLOCK/1000000);
/* /*

5
c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c
View File

@@ -18,6 +18,8 @@
* $Id$ * $Id$
*/ */
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
#include <string.h> #include <string.h>
#include <bsp.h> #include <bsp.h>
@@ -29,7 +31,6 @@
#include <libcpu/spr.h> #include <libcpu/spr.h>
#include <rtems/powerpc/powerpc.h> #include <rtems/powerpc/powerpc.h>
SPR_RW(SPRG0)
SPR_RW(SPRG1) SPR_RW(SPRG1)
extern unsigned long intrStackPtr; extern unsigned long intrStackPtr;
@@ -163,8 +164,6 @@ void bsp_start(void)
intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE); intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
_write_SPRG1((unsigned int)intrStack); _write_SPRG1((unsigned int)intrStack);
/* signal them that we have fixed PR288 - eventually, this should go away */
_write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
/* /*
* Install our own set of exception vectors * Install our own set of exception vectors

5
c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c
View File

@@ -35,6 +35,8 @@
* $Id$ * $Id$
*/ */
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
#include <bsp.h> #include <bsp.h>
/* /*
@@ -53,7 +55,6 @@
#include <string.h> #include <string.h>
SPR_RW(SPRG0)
SPR_RW(SPRG1) SPR_RW(SPRG1)
extern unsigned long intrStackPtr; extern unsigned long intrStackPtr;
@@ -220,8 +221,6 @@ void bsp_start(void)
intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE); intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
_write_SPRG1((unsigned int)intrStack); _write_SPRG1((unsigned int)intrStack);
/* signal that we have fixed PR288 - eventually, this should go away */
_write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
/* /*
printk( "About to call initialize_exceptions\n" ); printk( "About to call initialize_exceptions\n" );

54
c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c
View File

@@ -19,6 +19,8 @@
* $Id$ * $Id$
*/ */
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
#include <string.h> #include <string.h>
#include <stdlib.h> #include <stdlib.h>
@@ -51,7 +53,6 @@ extern unsigned long __rtems_end[];
extern void bsp_cleanup(void); extern void bsp_cleanup(void);
extern void BSP_vme_config(); extern void BSP_vme_config();
SPR_RW(SPRG0)
SPR_RW(SPRG1) SPR_RW(SPRG1)
/* /*
@@ -238,8 +239,8 @@ SPR_RW(HID1)
void bsp_start( void ) void bsp_start( void )
{ {
unsigned char *stack; unsigned char *stack;
register uint32_t intrStack; uint32_t intrStackStart;
register uint32_t *intrStackPtr; uint32_t intrStackSize;
unsigned char *work_space_start; unsigned char *work_space_start;
char *chpt; char *chpt;
ppc_cpu_id_t myCpu; ppc_cpu_id_t myCpu;
@@ -286,40 +287,27 @@ VpdBufRec vpdData [] = {
*((uint32_t*)stack) = 0; *((uint32_t*)stack) = 0;
/* /*
* Initialize the interrupt related settings * Initialize the interrupt related settings.
* SPRG1 = software managed IRQ stack
*
* This could be done later (e.g in IRQ_INIT) but it helps to understand
* some settings below...
*/ */
BSP_heap_start = ((uint32_t) __rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE; intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE;
intrStackSize = INTR_STACK_SIZE;
/* reserve space for the marker/tag frame */ BSP_heap_start = intrStackStart + intrStackSize;
intrStack = BSP_heap_start - PPC_MINIMUM_STACK_FRAME_SIZE;
/* make sure it's properly aligned */
intrStack &= ~(CPU_STACK_ALIGNMENT-1);
/* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
intrStackPtr = (uint32_t*) intrStack;
*intrStackPtr = 0;
_write_SPRG1(intrStack);
/* signal them that we have fixed PR288 - eventually, this should go away */
_write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
/* /*
* Initialize default raw exception handlers. See vectors/vectors_init.c * Initialize default raw exception handlers.
*/ */
initialize_exceptions(); ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision); printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision);
#ifdef SHOW_MORE_INIT_SETTINGS #ifdef SHOW_MORE_INIT_SETTINGS
printk("Additionnal boot options are %s\n", BSP_commandline_string); printk("Additionnal boot options are %s\n", BSP_commandline_string);
printk("Initial system stack at %x\n", stack); printk("Initial system stack at %x\n", stack);
printk("Software IRQ stack at %x\n", intrStack); printk("Software IRQ stack starts at %x with size %u\n", intrStackStart, intrStackSize);
#endif #endif
#ifdef SHOW_MORE_INIT_SETTINGS #ifdef SHOW_MORE_INIT_SETTINGS
@@ -418,14 +406,16 @@ VpdBufRec vpdData [] = {
__asm__ __volatile ("sc"); __asm__ __volatile ("sc");
/* /*
* Somehow doing the above seems to clobber SPRG0 on the mvme2100. It * Somehow doing the above seems to clobber SPRG0 on the mvme2100. The
* is probably a not so subtle hint that you do not want to use PPCBug * interrupt disable mask is stored in SPRG0. Is this a problem?
* once RTEMS is up and running. Anyway, we still needs to indicate
* that we have fixed PR288. Eventually, this should go away.
*/ */
_write_SPRG0(PPC_BSP_HAS_FIXED_PR288); ppc_interrupt_set_disable_mask( PPC_INTERRUPT_DISABLE_MASK_DEFAULT);
#endif #endif
/* See above */
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
if ( (chpt = strstr(BSP_commandline_string,"MEMSZ=")) ) { if ( (chpt = strstr(BSP_commandline_string,"MEMSZ=")) ) {
char *endp; char *endp;
uint32_t sz; uint32_t sz;

39
c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c
View File

@@ -24,6 +24,8 @@
* $Id$ * $Id$
*/ */
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
#include <string.h> #include <string.h>
#include <stdlib.h> #include <stdlib.h>
#include <ctype.h> #include <ctype.h>
@@ -74,7 +76,6 @@ extern void BSP_vme_config(void);
uint32_t bsp_clicks_per_usec; uint32_t bsp_clicks_per_usec;
SPR_RW(SPRG0)
SPR_RW(SPRG1) SPR_RW(SPRG1)
typedef struct CmdLineRec_ { typedef struct CmdLineRec_ {
@@ -249,8 +250,8 @@ void bsp_start( void )
#ifdef SHOW_LCR3_REGISTER #ifdef SHOW_LCR3_REGISTER
unsigned l3cr; unsigned l3cr;
#endif #endif
register uint32_t intrStack; uint32_t intrStackStart;
register uint32_t *intrStackPtr; uint32_t intrStackSize;
unsigned char *work_space_start; unsigned char *work_space_start;
ppc_cpu_id_t myCpu; ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision; ppc_cpu_revision_t myCpuRevision;
@@ -302,32 +303,20 @@ void bsp_start( void )
*r1sp=0xeeeeeeee; *r1sp=0xeeeeeeee;
/* /*
* Initialize the interrupt related settings * Initialize the interrupt related settings.
* SPRG0 = interrupt nesting level count
* SPRG1 = software managed IRQ stack
*
* This could be done latter (e.g in IRQ_INIT) but it helps to understand
* some settings below...
*/ */
BSP_heap_start = ((uint32_t) __rtems_end) + INIT_STACK_SIZE + intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE;
rtems_configuration_get_interrupt_stack_size(); intrStackSize = rtems_configuration_get_interrupt_stack_size();
intrStack = BSP_heap_start - PPC_MINIMUM_STACK_FRAME_SIZE; BSP_heap_start = intrStackStart + intrStackSize;
/* make sure it's properly aligned */
intrStack &= ~(CPU_STACK_ALIGNMENT-1);
/* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
intrStackPtr = (uint32_t*) intrStack;
*intrStackPtr = 0;
_write_SPRG1(intrStack);
_write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
/* /*
* Initialize default raw exception hanlders. See vectors/vectors_init.c * Initialize default raw exception handlers.
*/ */
initialize_exceptions(); ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
/* /*
* Init MMU block address translation to enable hardware * Init MMU block address translation to enable hardware

40
c/src/lib/libbsp/powerpc/psim/startup/bspstart.c
View File

@@ -14,6 +14,8 @@
* $Id$ * $Id$
*/ */
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
#include <string.h> #include <string.h>
#include <fcntl.h> #include <fcntl.h>
#include <bsp.h> #include <bsp.h>
@@ -27,11 +29,8 @@
#include <libcpu/bat.h> #include <libcpu/bat.h>
#include <libcpu/spr.h> #include <libcpu/spr.h>
SPR_RW(SPRG0)
SPR_RW(SPRG1) SPR_RW(SPRG1)
void initialize_exceptions(void);
/* On psim, each click of the decrementer register corresponds /* On psim, each click of the decrementer register corresponds
* to 1 instruction. By setting this to 100, we are indicating * to 1 instruction. By setting this to 100, we are indicating
* that we are assuming it can execute 100 instructions per * that we are assuming it can execute 100 instructions per
@@ -93,8 +92,8 @@ void bsp_get_workarea(
void bsp_start( void ) void bsp_start( void )
{ {
extern unsigned long __rtems_end[]; extern unsigned long __rtems_end[];
register uint32_t intrStack; uint32_t intrStackStart;
register uint32_t *intrStackPtr; uint32_t intrStackSize;
/* /*
* Note we can not get CPU identification dynamically, so * Note we can not get CPU identification dynamically, so
@@ -115,32 +114,19 @@ void bsp_start( void )
bsp_exceptions_in_RAM = FALSE; bsp_exceptions_in_RAM = FALSE;
/* /*
* Initialize the interrupt related settings * Initialize the interrupt related settings.
* SPRG1 = software managed IRQ stack
*
* This could be done latter (e.g in IRQ_INIT) but it helps to understand
* some settings below...
*/ */
intrStack = ((uint32_t) __rtems_end) + INIT_STACK_SIZE + intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE;
rtems_configuration_get_interrupt_stack_size() - intrStackSize = rtems_configuration_get_interrupt_stack_size();
PPC_MINIMUM_STACK_FRAME_SIZE;
/* make sure it's properly aligned */
intrStack &= ~(CPU_STACK_ALIGNMENT-1);
/* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
intrStackPtr = (uint32_t*) intrStack;
*intrStackPtr = 0;
_write_SPRG1(intrStack);
/* signal them that we have fixed PR288 - eventually, this should go away */
_write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
/* /*
* Initialize default raw exception handlers. See vectors/vectors_init.c * Initialize default raw exception handlers.
*/ */
initialize_exceptions(); ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
/* /*
* Initalize RTEMS IRQ system * Initalize RTEMS IRQ system

55
c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
View File

@@ -17,6 +17,8 @@
* $Id$ * $Id$
*/ */
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
#include <string.h> #include <string.h>
#include <bsp.h> #include <bsp.h>
@@ -46,7 +48,6 @@ extern Triv121PgTbl BSP_pgtbl_setup();
extern void BSP_pgtbl_activate(); extern void BSP_pgtbl_activate();
extern void BSP_vme_config(); extern void BSP_vme_config();
SPR_RW(SPRG0)
SPR_RW(SPRG1) SPR_RW(SPRG1)
#if defined(DEBUG_BATS) #if defined(DEBUG_BATS)
@@ -149,8 +150,8 @@ void bsp_start( void )
#if !defined(mvme2100) #if !defined(mvme2100)
unsigned l2cr; unsigned l2cr;
#endif #endif
register uint32_t intrStack; uint32_t intrStackStart;
register uint32_t *intrStackPtr; uint32_t intrStackSize;
unsigned char *work_space_start; unsigned char *work_space_start;
ppc_cpu_id_t myCpu; ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision; ppc_cpu_revision_t myCpuRevision;
@@ -226,34 +227,20 @@ void bsp_start( void )
*((uint32_t*)stack) = 0; *((uint32_t*)stack) = 0;
/* /*
* Initialize the interrupt related settings * Initialize the interrupt related settings.
* SPRG1 = software managed IRQ stack
*
* This could be done later (e.g in IRQ_INIT) but it helps to understand
* some settings below...
*/ */
BSP_heap_start = ((uint32_t) __rtems_end) + intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE;
INIT_STACK_SIZE + rtems_configuration_get_interrupt_stack_size(); intrStackSize = rtems_configuration_get_interrupt_stack_size();
BSP_heap_start = intrStackStart + intrStackSize;
/* reserve space for the marker/tag frame */
intrStack = BSP_heap_start - PPC_MINIMUM_STACK_FRAME_SIZE;
/* make sure it's properly aligned */
intrStack &= ~(CPU_STACK_ALIGNMENT-1);
/* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
intrStackPtr = (uint32_t*) intrStack;
*intrStackPtr = 0;
_write_SPRG1(intrStack);
/* signal them that we have fixed PR288 - eventually, this should go away */
_write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
/* /*
* Initialize default raw exception handlers. See vectors/vectors_init.c * Initialize default raw exception handlers.
*/ */
initialize_exceptions(); ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
select_console(CONSOLE_LOG); select_console(CONSOLE_LOG);
@@ -285,7 +272,7 @@ void bsp_start( void )
printk("Residuals are located at %x\n", (unsigned) &residualCopy); printk("Residuals are located at %x\n", (unsigned) &residualCopy);
printk("Additionnal boot options are %s\n", loaderParam); printk("Additionnal boot options are %s\n", loaderParam);
printk("Initial system stack at %x\n",stack); printk("Initial system stack at %x\n",stack);
printk("Software IRQ stack at %x\n",intrStack); printk("Software IRQ stack starts at %x with size %u\n", intrStackStart, intrStackSize);
printk("-----------------------------------------\n"); printk("-----------------------------------------\n");
#endif #endif
@@ -330,14 +317,16 @@ void bsp_start( void )
__asm__ __volatile ("sc"); __asm__ __volatile ("sc");
/* /*
* Somehow doing the above seems to clobber SPRG0 on the mvme2100. It * Somehow doing the above seems to clobber SPRG0 on the mvme2100. The
* is probably a not so subtle hint that you do not want to use PPCBug * interrupt disable mask is stored in SPRG0. Is this a problem?
* once RTEMS is up and running. Anyway, we still needs to indicate
* that we have fixed PR288. Eventually, this should go away.
*/ */
_write_SPRG0(PPC_BSP_HAS_FIXED_PR288); ppc_interrupt_set_disable_mask( PPC_INTERRUPT_DISABLE_MASK_DEFAULT);
#endif #endif
/* See above */
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
BSP_mem_size = residualCopy.TotalMemory; BSP_mem_size = residualCopy.TotalMemory;
BSP_bus_frequency = residualCopy.VitalProductData.ProcessorBusHz; BSP_bus_frequency = residualCopy.VitalProductData.ProcessorBusHz;
BSP_processor_frequency = residualCopy.VitalProductData.ProcessorHz; BSP_processor_frequency = residualCopy.VitalProductData.ProcessorHz;

5
c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c
View File

@@ -23,6 +23,8 @@
* $Id$ * $Id$
*/ */
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
#include <string.h> #include <string.h>
#include <rtems/libio.h> #include <rtems/libio.h>
@@ -36,7 +38,6 @@
#include <bsp/irq.h> #include <bsp/irq.h>
#include <bsp.h> #include <bsp.h>
SPR_RW(SPRG0)
SPR_RW(SPRG1) SPR_RW(SPRG1)
extern unsigned long intrStackPtr; extern unsigned long intrStackPtr;
@@ -143,8 +144,6 @@ void bsp_start(void)
*/ */
intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE); intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
_write_SPRG1((unsigned int)intrStack); _write_SPRG1((unsigned int)intrStack);
/* signal them that we have fixed PR288 - eventually, this should go away */
_write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
/* /*
* Install our own set of exception vectors * Install our own set of exception vectors

7
c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c
View File

@@ -55,6 +55,9 @@
* *
* $Id$ * $Id$
*/ */
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
#include <string.h> #include <string.h>
#include <fcntl.h> #include <fcntl.h>
@@ -67,7 +70,6 @@
#include <libcpu/spr.h> #include <libcpu/spr.h>
#include <rtems/powerpc/powerpc.h> #include <rtems/powerpc/powerpc.h>
SPR_RW(SPRG0)
SPR_RW(SPRG1) SPR_RW(SPRG1)
#include RTEMS_XPARAMETERS_H #include RTEMS_XPARAMETERS_H
@@ -186,9 +188,6 @@ void bsp_start( void )
intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE); intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
_write_SPRG1((unsigned int)intrStack); _write_SPRG1((unsigned int)intrStack);
/* signal them that we have fixed PR288 - eventually, this should go away */
_write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
/* /*
* Initialize default raw exception handlers. * Initialize default raw exception handlers.

12
c/src/lib/libbsp/shared/ChangeLog
View File

@@ -1,3 +1,15 @@
2008-07-10 Sebastian Huber <sebastian.huber@embedded-brains.de>
* bootcard.c: Special case for PowerPC: The interrupt disable
mask is stored in SPRG0. It must be valid before we can use
rtems_interrupt_disable().
2008-07-09 Sebastian Huber <sebastian.huber@embedded-brains.de>
* include/irq-config.h, include/irq-generic.h,
src/irq-generic.c, src/irq-legacy.c: Generic BSP interrupt handler
support.
2008-06-04 Joel Sherrill <joel.sherrill@OARcorp.com> 2008-06-04 Joel Sherrill <joel.sherrill@OARcorp.com>
* include/tm27.h: New file. Stub version of tm27 support. * include/tm27.h: New file. Stub version of tm27 support.

13
c/src/lib/libbsp/shared/bootcard.c
View File

@@ -43,7 +43,10 @@
* $Id$ * $Id$
*/ */
#include <bsp.h> #include <stddef.h>
#include <stdint.h>
#include <rtems.h>
/* /*
* Since there is a forward reference * Since there is a forward reference
@@ -116,6 +119,14 @@ int boot_card(
size_t heap_size; size_t heap_size;
#endif #endif
/*
* Special case for PowerPC: The interrupt disable mask is stored in SPRG0.
* It must be valid before we can use rtems_interrupt_disable().
*/
#ifdef PPC_INTERRUPT_DISABLE_MASK_DEFAULT
ppc_interrupt_set_disable_mask( PPC_INTERRUPT_DISABLE_MASK_DEFAULT);
#endif /* PPC_INTERRUPT_DISABLE_MASK_DEFAULT */
/* /*
* Make sure interrupts are disabled. * Make sure interrupts are disabled.
*/ */