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Improve handling of unexpected FPGA interrupt conditions.

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This commit is contained in:
Eric Norum
2006-05-15 14:47:32 +00:00
parent b613408817
commit a7edc92901
2 changed files with 23 additions and 3 deletions
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4
c/src/lib/libbsp/m68k/uC5282/ChangeLog
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@@ -1,3 +1,7 @@
2006-05-15 Eric Norum <norume@aps.anl.gov>
* startup/bspstart.c: Add checks for FPGA interrupt request overflow.
2006-04-11 Eric Norum <norume@aps.anl.gov>
* startup/bspstart.c: Install default exception handler.

22
c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c
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@@ -470,12 +470,28 @@ trampoline (rtems_vector_number v)
* Handle FPGA interrupts until all have been consumed
*/
if (v == FPGA_VECTOR) {
int loopcount = 0;
while (((v = FPGA_IRQ_INFO) & 0x80) != 0) {
v = 192 + (v & 0x3f);
if (handlerTab[v].func)
if (++loopcount >= 50) {
rtems_interrupt_level level;
rtems_interrupt_disable(level);
printk("\nTOO MANY FPGA INTERRUPTS (LAST WAS 0x%x) -- DISABLING ALL FPGA INTERRUPTS.\n", v);
MCF5282_INTC0_IMRL |= MCF5282_INTC_IMRL_INT1;
rtems_interrupt_enable(level);
return;
}
if (handlerTab[v].func) {
(*handlerTab[v].func)(handlerTab[v].arg, (unsigned long)v);
else
rtems_fatal_error_occurred(v);
}
else {
rtems_interrupt_level level;
rtems_interrupt_disable(level);
printk("\nINVALID FPGA INTERRUPT (0x%x) -- DISABLING ALL FPGA INTERRUPTS.\n", v);
MCF5282_INTC0_IMRL |= MCF5282_INTC_IMRL_INT1;
rtems_interrupt_enable(level);
return;
}
}
}
else if (handlerTab[v].func)