2007-04-25 Ray Xu <xr@trasin.net>

* lpc22xx/irq/bsp_irq_init.c
	lpc22xx/irq/irq.c, lpc22xx/irq/irq.h: New (Initial submission).

c/src/lib/libcpu/arm/ChangeLog

@@ -3,7 +3,8 @@
 	* Makefile.am, configure.ac: Add lpc22xx support.
 	* lpc22xx/clock/clockdrv.c, lpc22xx/include/lpc22xx.h,
 	lpc22xx/irq/bsp_irq_asm.S, lpc22xx/timer/lpc_timer.h,
-	lpc22xx/timer/timer.c: New (Initial submission).
+	lpc22xx/timer/timer.c, lpc22xx/irq/bsp_irq_init.c
+	lpc22xx/irq/irq.c, lpc22xx/irq/irq.h: New (Initial submission).
 
 2007-03-12	Joel Sherrill <joel@OARcorp.com>
 

c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_init.c

@@ -0,0 +1,67 @@
+/*
+ * Motorola LPC22XX Interrupt handler
+ *
+ * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
+ *      
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *
+ *  $Id$
+ */
+#include <irq.h>
+#include <bsp.h>
+#include <lpc22xx.h>
+
+
+extern void default_int_handler();
+
+/* 
+ * Interrupt system initialization. Disable interrupts, clear 
+ * any that are pending.
+ */
+void BSP_rtems_irq_mngt_init()
+{
+
+    /* disable all interrupts */
+  VICIntEnClr = 0xFFFFFFFF;
+
+   
+  /*
+   * Set IRQHandler
+   */
+  IRQ_VECTOR_ADDR = 0xE59FF018;           /* LDR PC,[PC,#0x18] instruction */
+
+  /*
+   * Set FIQHandler
+   */
+  FIQ_VECTOR_ADDR = 0xE59FF018;           /* LDR PC,[PC,#0x18] instruction */
+
+  /*
+   * We does not need the next interrupt sources in the moment,
+   * therefore jump to itself.
+   */
+  UNDEFINED_INSTRUCTION_VECTOR_ADDR = 0xEAFFFFFE;
+  SOFTWARE_INTERRUPT_VECTOR_ADDR    = 0xEAFFFFFE;
+  PREFETCH_ABORT_VECTOR_ADDR        = 0xEAFFFFFE;
+
+  /*
+   * In case we must find an ABORT error,
+   * enable the next lines and set a breakpoint
+   * in ABORTHandler.
+   */  
+#if 1
+  DATA_ABORT_VECTOR_ADDR = 0xE59FF018;
+#endif  
+
+  /*
+   * Init the Vectored Interrupt Controller (VIC)
+   */
+  VICProtection = 0;
+  VICIntSelect = 0;
+  
+
+}
+

c/src/lib/libcpu/arm/lpc22xx/irq/irq.c

@@ -0,0 +1,129 @@
+/*
+ * Philps LPC22XX Interrupt handler
+ * 
+ * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
+ * Modified by ray     
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+#include <bsp.h>
+#include <irq.h>
+#include <rtems/score/thread.h>
+#include <rtems/score/apiext.h>
+#include <lpc22xx.h>
+
+/*
+ * This function check that the value given for the irq line
+ * is valid.
+ */
+static int isValidInterrupt(int irq)
+{
+  if ( (irq < 0) || (irq >= BSP_MAX_INT))
+    return 0;
+  return 1;
+}
+
+/*
+ * Installs the interrupt handler.
+ *
+ * You should only have to add the code to unmask the interrupt.
+ *
+ */
+int BSP_install_rtems_irq_handler  (const rtems_irq_connect_data* irq)
+{
+    rtems_interrupt_level level;
+    rtems_irq_hdl *bsp_tbl;
+    int *vic_cntl;
+    static int     irq_counter=0;
+    
+    bsp_tbl = (rtems_irq_hdl *)VICVectAddrBase;
+
+    vic_cntl=(int *)VICVectCntlBase;
+    
+    if (!isValidInterrupt(irq->name)) {
+      return 0;
+    }
+
+    /*
+     * Check if default handler is actually connected. If not issue an error.
+     */
+
+    if (bsp_tbl[irq_counter] != default_int_handler) {
+      return 0;
+    }
+
+    _CPU_ISR_Disable(level);
+
+    /*
+     * store the new handler
+     */
+    bsp_tbl[irq_counter] = irq->hdl;
+    /* *(volatile unsigned long*)(VICVectAddr0+(irq->name * 4)&0x7c )= (uint32_t) irq->hdl;*/
+    /*
+     * Enable interrupt on device
+     */
+    vic_cntl[irq_counter] = 0x20 | irq->name;
+
+    VICIntEnable |= 1 << irq->name; 
+    
+    if(irq->on)
+    {
+    	irq->on(irq);
+    }
+
+    irq_counter++;    
+
+    _CPU_ISR_Enable(level);
+    
+    return 1;
+}
+
+/* 
+ * Remove and interrupt handler
+ *
+ * You should only have to add the code to mask the interrupt.
+ *
+ */
+int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
+{
+    rtems_interrupt_level level;
+    rtems_irq_hdl *bsp_tbl;
+
+    bsp_tbl = (rtems_irq_hdl *)&VICVectAddr0;
+  
+    if (!isValidInterrupt(irq->name)) {
+      return 0;
+    }
+    /*
+     * Check if the handler is actually connected. If not issue an error.
+     */
+    if (bsp_tbl[irq->name] != irq->hdl) {
+      return 0;
+    }
+
+    _CPU_ISR_Disable(level);
+
+    VICIntEnClr = 1 << irq->name;
+
+    /*
+     * Disable interrupt on device
+     */
+    if(irq->off) {
+        irq->off(irq);
+    }
+    /*
+     * restore the default irq value
+     */
+    bsp_tbl[irq->name] = default_int_handler;
+    
+
+    _CPU_ISR_Enable(level);
+
+    return 1;
+}
+
+

c/src/lib/libcpu/arm/lpc22xx/irq/irq.h

@@ -0,0 +1,144 @@
+/*
+ * Interrupt handler Header file
+ *
+ * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
+ *	
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *
+ *  $Id$
+ */
+
+#ifndef __IRQ_H__
+#define __IRQ_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+  /* define that can be useful (the values are just examples) */
+#ifndef __asm__
+
+/*
+ * Include some preprocessor value also used by assember code
+ */
+  
+#include <rtems.h>
+#include <lpc22xx.h>
+
+extern void default_int_handler();
+/***********************************************************************
+ * Constants
+ **********************************************************************/
+
+/* possible interrupt sources on the LPC22xx */
+#define LPC22xx_INTERRUPT_WDINT	 0	/* Watchdog int. 0 */
+#define LPC22xx_INTERRUPT_RSV0	 1	/* Reserved int. 1 */
+#define LPC22xx_INTERRUPT_DBGRX	 2	/* Embedded ICE DbgCommRx receive */
+#define LPC22xx_INTERRUPT_DBGTX	 3	/* Embedded ICE DbgCommRx Transmit*/
+#define LPC22xx_INTERRUPT_TIMER0 4	/* Timer 0 */
+#define LPC22xx_INTERRUPT_TIMER1 5	/* Timer 1 */
+#define LPC22xx_INTERRUPT_UART0	 6	/* UART 0 */
+#define LPC22xx_INTERRUPT_UART1  7	/* UART 1 */
+#define LPC22xx_INTERRUPT_PWM0 	 8	/* PWM */
+#define LPC22xx_INTERRUPT_I2C 	 9	/* I2C  */
+#define LPC22xx_INTERRUPT_SPI0 	10	/* SPI0 */
+#define LPC22xx_INTERRUPT_SPI1 	11	/* SPI1 */
+#define LPC22xx_INTERRUPT_PLL 	12	/* PLL */
+#define LPC22xx_INTERRUPT_RTC 	13	/* RTC */
+#define LPC22xx_INTERRUPT_EINT0	14	/* Externel Interrupt 0 */
+#define LPC22xx_INTERRUPT_EINT1	15	/* Externel Interrupt 1 */
+#define LPC22xx_INTERRUPT_EINT2	16	/* Externel Interrupt 2 */
+#define LPC22xx_INTERRUPT_EINT3	17	/* Externel Interrupt 3 */
+#define LPC22xx_INTERRUPT_ADC 	18	/* AD Converter */
+#define LPC22xx_INTERRUPT_CANERR 19	/* CAN LUTerr interrupt */
+#define LPC22xx_INTERRUPT_CAN1TX 20	/* CAN1 Tx interrupt */
+#define LPC22xx_INTERRUPT_CAN1RX 21	/* CAN1 Rx interrupt */
+#define LPC22xx_INTERRUPT_CAN2TX 22	/* CAN2 Tx interrupt */
+#define LPC22xx_INTERRUPT_CAN2RX 23	/* CAN2 Rx interrupt */
+#define LPC22xx_INTERRUPT_CAN3TX 24	/* CAN1 Tx interrupt */
+#define LPC22xx_INTERRUPT_CAN3RX 25	/* CAN1 Rx interrupt */
+#define LPC22xx_INTERRUPT_CAN4TX 26	/* CAN2 Tx interrupt */
+#define LPC22xx_INTERRUPT_CAN4RX 27	/* CAN2 Rx interrupt */
+#define BSP_MAX_INT              28
+
+#define UNDEFINED_INSTRUCTION_VECTOR_ADDR   (*(u_long *)0x00000004L)   
+#define SOFTWARE_INTERRUPT_VECTOR_ADDR      (*(u_long *)0x00000008L)
+#define PREFETCH_ABORT_VECTOR_ADDR          (*(u_long *)0x0000000CL)
+#define DATA_ABORT_VECTOR_ADDR              (*(u_long *)0x00000010L)
+#define IRQ_VECTOR_ADDR                     (*(u_long *)0x00000018L)
+#define FIQ_VECTOR_ADDR                     (*(u_long *)0x0000001CL)
+
+#define DATA_ABORT_ISR_ADDR                 (*(u_long *)0x00000030L)
+#define IRQ_ISR_ADDR                        (*(u_long *)0x00000038L)
+#define FIQ_ISR_ADDR                        (*(u_long *)0x0000003CL)
+
+              
+typedef unsigned char  rtems_irq_level;
+typedef unsigned char  rtems_irq_trigger;
+
+typedef unsigned int rtems_irq_number;
+struct  __rtems_irq_connect_data__;     /* forward declaratiuon */
+
+typedef void (*rtems_irq_hdl)       (void);
+typedef void (*rtems_irq_enable)    (const struct __rtems_irq_connect_data__*);
+typedef void (*rtems_irq_disable)   (const struct __rtems_irq_connect_data__*);
+typedef int  (*rtems_irq_is_enabled)(const struct __rtems_irq_connect_data__*);
+
+//extern rtems_irq_hdl bsp_vector_table[BSP_MAX_INT];
+#define VECTOR_TABLE VICVectAddrBase
+  											   
+typedef struct __rtems_irq_connect_data__ {
+    /* IRQ line */
+    rtems_irq_number              name;
+
+    /* Handler */
+    rtems_irq_hdl                 hdl;
+
+    /* function for enabling interrupts at device level. */
+    rtems_irq_enable              on;
+
+    /* function for disabling interrupts at device level. */
+    rtems_irq_disable             off;
+
+    /* Function to test if interrupt is enabled */
+    rtems_irq_is_enabled        isOn;
+
+    /* priority level of interrupt */
+    rtems_irq_level               irqLevel;
+
+    /* Trigger method (rising/falling edge or high/low level) */
+    rtems_irq_trigger             irqTrigger;
+} rtems_irq_connect_data;
+
+/*
+ * function to initialize the interrupt for a specific BSP
+ */
+void BSP_rtems_irq_mngt_init();
+
+
+/*
+ * function to connect a particular irq handler.
+ */
+int BSP_install_rtems_irq_handler       (const rtems_irq_connect_data*);
+
+/*
+ * function to get the current RTEMS irq handler for ptr->name. 
+ */
+int BSP_get_current_rtems_irq_handler   (rtems_irq_connect_data* ptr);
+
+/*
+ * function to disconnect the RTEMS irq handler for ptr->name.
+ */
+int BSP_remove_rtems_irq_handler        (const rtems_irq_connect_data*);
+
+#endif /* __asm__ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __IRQ_H__ */