RTOS/rtems
1
0
Fork 0
forked from Imagelibrary/rtems
Code Pull Requests Activity

sparc: Rename SPARC_USE_SAFE_FP_SUPPORT

Browse Source 
Rename SPARC_USE_SAFE_FP_SUPPORT in SPARC_USE_SYNCHRONOUS_FP_SWITCH.
Update comment.

Update #3077.
This commit is contained in:
Sebastian Huber
2017-07-18 15:11:41 +02:00
parent b2e1bded07
commit a400d06f48
4 changed files with 33 additions and 31 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
c/src/lib/libbsp/sparc/shared/irq_asm.S
View File

@@ -25,7 +25,7 @@
#include <rtems/score/percpu.h>
#include <bspopts.h>
#if SPARC_HAS_FPU == 1 && defined(SPARC_USE_SAFE_FP_SUPPORT)
#if defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
#define FP_FRAME_OFFSET_FO_F1 (SPARC_MINIMUM_STACK_FRAME_SIZE + 0)
#define FP_FRAME_OFFSET_F2_F3 (FP_FRAME_OFFSET_FO_F1 + 8)
#define FP_FRAME_OFFSET_F4_F5 (FP_FRAME_OFFSET_F2_F3 + 8)
@@ -652,7 +652,7 @@ isr_dispatch:
mov 0, %o1 ! ISR level for _Thread_Do_dispatch()
#if SPARC_HAS_FPU == 1 && defined(SPARC_USE_SAFE_FP_SUPPORT)
#if defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
/* Test if we interrupted a floating point thread (PSR[EF] == 1) */
andcc %l0, %l5, %g0
be non_fp_thread_dispatch
@@ -731,7 +731,7 @@ non_fp_thread_dispatch:
call SYM(_Thread_Do_dispatch)
mov %g6, %o0
#if SPARC_HAS_FPU == 1 && defined(SPARC_USE_SAFE_FP_SUPPORT)
#if defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
thread_dispatch_done:
#endif

4
cpukit/score/cpu/sparc/cpu.c
View File

@@ -110,7 +110,7 @@ RTEMS_STATIC_ASSERT(
CPU_Interrupt_frame_alignment
);
#if (SPARC_HAS_FPU == 1) && !defined(SPARC_USE_SAFE_FP_SUPPORT)
#if (SPARC_HAS_FPU == 1) && !defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
Context_Control_fp _CPU_Null_fp_context;
#endif
@@ -129,7 +129,7 @@ Context_Control_fp _CPU_Null_fp_context;
void _CPU_Initialize(void)
{
#if (SPARC_HAS_FPU == 1) && !defined(SPARC_USE_SAFE_FP_SUPPORT)
#if (SPARC_HAS_FPU == 1) && !defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
Context_Control_fp *pointer;
uint32_t psr;

2
cpukit/score/cpu/sparc/cpu_asm.S
View File

@@ -26,7 +26,7 @@
#include <rtems/asm.h>
#include <rtems/system.h>
#if (SPARC_HAS_FPU == 1) && !defined(SPARC_USE_SAFE_FP_SUPPORT)
#if (SPARC_HAS_FPU == 1) && !defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
/*
* void _CPU_Context_save_fp(

52
cpukit/score/cpu/sparc/rtems/score/cpu.h
View File

@@ -28,29 +28,31 @@ extern "C" {
/* conditional compilation parameters */
#if defined(RTEMS_SMP)
/*
* The SPARC ABI is a bit special with respect to the floating point context.
* The complete floating point context is volatile. Thus from an ABI point
* of view nothing needs to be saved and restored during a context switch.
* Instead the floating point context must be saved and restored during
* interrupt processing. Historically the deferred floating point switch is
* used for SPARC and the complete floating point context is saved and
* restored during a context switch to the new floating point unit owner.
* This is a bit dangerous since post-switch actions (e.g. signal handlers)
* and context switch extensions may silently corrupt the floating point
* context. The floating point unit is disabled for interrupt handlers.
* Thus in case an interrupt handler uses the floating point unit then this
* will result in a trap.
*
* On SMP configurations the deferred floating point switch is not
* supported in principle. So use here a safe floating point support. Safe
* means that the volatile floating point context is saved and restored
* around a thread dispatch issued during interrupt processing. Thus
* post-switch actions and context switch extensions may safely use the
* floating point unit.
*/
#define SPARC_USE_SAFE_FP_SUPPORT
/*
* The SPARC ABI is a bit special with respect to the floating point context.
* The complete floating point context is volatile. Thus from an ABI point
* of view nothing needs to be saved and restored during a context switch.
* Instead the floating point context must be saved and restored during
* interrupt processing. Historically, the deferred floating point switch is
* used for SPARC and the complete floating point context is saved and
* restored during a context switch to the new floating point unit owner.
* This is a bit dangerous since post-switch actions (e.g. signal handlers)
* and context switch extensions may silently corrupt the floating point
* context. The floating point unit is disabled for interrupt handlers.
* Thus in case an interrupt handler uses the floating point unit then this
* will result in a trap.
*
* In SMP configurations, the deferred floating point switch is not supported
* in principle. So, use here a synchronous floating point switching.
* Synchronous means that the volatile floating point context is saved and
* restored around a thread dispatch issued during interrupt processing. Thus
* post-switch actions and context switch extensions may safely use the
* floating point unit.
*/
#if SPARC_HAS_FPU == 1
#if defined(RTEMS_SMP)
#define SPARC_USE_SYNCHRONOUS_FP_SWITCH
#endif
#endif
/**
@@ -117,7 +119,7 @@ extern "C" {
*
* This is set based upon the multilib settings.
*/
#if ( SPARC_HAS_FPU == 1 ) && !defined(SPARC_USE_SAFE_FP_SUPPORT)
#if ( SPARC_HAS_FPU == 1 ) && !defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
#define CPU_HARDWARE_FP TRUE
#else
#define CPU_HARDWARE_FP FALSE
@@ -167,7 +169,7 @@ extern "C" {
* On the SPARC, we can disable the FPU for integer only tasks so
* it is safe to defer floating point context switches.
*/
#if defined(SPARC_USE_SAFE_FP_SUPPORT)
#if defined(SPARC_USE_SYNCHRONOUS_FP_SWITCH)
#define CPU_USE_DEFERRED_FP_SWITCH FALSE
#else
#define CPU_USE_DEFERRED_FP_SWITCH TRUE