forked from Imagelibrary/rtems
2002-03-29 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* rtems/score/idtr.h: New file, extracted from libcpu/cpu.h. * rtems/score/interrupts.h: New file, extracted from libcpu/cpu.h. * rtems/score/registers.h: New file, moved from libcpu. * Makefile.am: Reflect changes above. * cpu.c: Don't include cpuModel.h, #include <rtems.h>, #include <rtems/score/i386types.h>, #include <rtems/score/idtr.h>. * rtems/score/cpu.h: Don't include libcpu/cpu.h. #include <rtems/score/interrupts.h>, #include <rtems/score/registers.h>.
This commit is contained in:
Joel Sherrill
@@ -1,3 +1,17 @@
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2002-03-29 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
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* rtems/score/idtr.h: New file, extracted from libcpu/cpu.h.
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* rtems/score/interrupts.h: New file, extracted from libcpu/cpu.h.
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* rtems/score/registers.h: New file, moved from libcpu.
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* Makefile.am: Reflect changes above.
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* cpu.c: Don't include cpuModel.h,
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#include <rtems.h>,
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#include <rtems/score/i386types.h>,
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#include <rtems/score/idtr.h>.
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* rtems/score/cpu.h: Don't include libcpu/cpu.h.
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#include <rtems/score/interrupts.h>,
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#include <rtems/score/registers.h>.
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2001-04-03 Joel Sherrill <joel@OARcorp.com>
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2001-04-03 Joel Sherrill <joel@OARcorp.com>
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* Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h.
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* Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h.
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@@ -27,7 +27,11 @@ include_rtems_scoredir = $(includedir)/rtems/score
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include_rtems_score_HEADERS = \
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include_rtems_score_HEADERS = \
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rtems/score/cpu.h \
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rtems/score/cpu.h \
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rtems/score/i386.h \
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rtems/score/i386.h \
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rtems/score/types.h
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rtems/score/types.h \
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rtems/score/interrupts.h \
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rtems/score/registers.h \
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rtems/score/idtr.h
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PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score \
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PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score \
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$(include_rtems_score_HEADERS:%.h=$(PROJECT_INCLUDE)/%.h)
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$(include_rtems_score_HEADERS:%.h=$(PROJECT_INCLUDE)/%.h)
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@@ -12,12 +12,14 @@
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* $Id$
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* $Id$
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*/
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*/
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#include <rtems.h>
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#include <rtems/system.h>
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#include <rtems/system.h>
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#include <rtems/score/types.h>
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#include <rtems/score/isr.h>
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#include <rtems/score/isr.h>
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#include <rtems/score/idtr.h>
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#include <rtems/bspIo.h>
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#include <rtems/bspIo.h>
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#include <rtems/score/thread.h>
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#include <rtems/score/thread.h>
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#include <libcpu/cpuModel.h>
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/* _CPU_Initialize
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/* _CPU_Initialize
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*
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*
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@@ -21,10 +21,11 @@ extern "C" {
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#endif
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#endif
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#include <rtems/score/i386.h> /* pick up machine definitions */
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#include <rtems/score/i386.h> /* pick up machine definitions */
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#include <libcpu/cpu.h>
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#ifndef ASM
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#ifndef ASM
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#include <rtems/score/types.h>
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#include <rtems/score/types.h>
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#include <rtems/score/interrupts.h> /* formerly in libcpu/cpu.h> */
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#include <rtems/score/registers.h> /* formerly part of libcpu */
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#endif
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#endif
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/* conditional compilation parameters */
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/* conditional compilation parameters */
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62
c/src/exec/score/cpu/i386/rtems/score/idtr.h
Normal file
62
c/src/exec/score/cpu/i386/rtems/score/idtr.h
Normal file
@@ -0,0 +1,62 @@
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/*
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* This file contains definitions for data structure related
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* to Intel system programming. More information can be found
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* on Intel site and more precisely in the following book :
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*
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* Pentium Processor familly
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* Developper's Manual
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*
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* Volume 3 : Architecture and Programming Manual
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*
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* Formerly contained in and extracted from libcpu/i386/cpu.h.
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*
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* Copyright (C) 1998 Eric Valette (valette@crf.canon.fr)
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* Canon Centre Recherche France.
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*
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* The license and distribution terms for this file may be
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* found in found in the file LICENSE in this distribution or at
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* http://www.OARcorp.com/rtems/license.html.
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*
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* $Id$
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*
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* Applications must not include this file directly.
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*/
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#ifndef _rtems_score_idtr_h
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#define _rtems_score_idtr_h
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/*
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* See page 14.9 Figure 14-2.
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*
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*/
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typedef struct
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{
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unsigned int low_offsets_bits:16;
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unsigned int segment_selector:16;
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unsigned int fixed_value_bits:8;
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unsigned int gate_type:5;
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unsigned int privilege:2;
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unsigned int present:1;
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unsigned int high_offsets_bits:16;
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} interrupt_gate_descriptor;
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/*
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* C callable function enabling to create a interrupt_gate_descriptor
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*/
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extern void create_interrupt_gate_descriptor (interrupt_gate_descriptor*, rtems_raw_irq_hdl);
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/*
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* C callable function enabling to get easily usable info from
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* the actual value of IDT register.
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*/
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extern void i386_get_info_from_IDTR (interrupt_gate_descriptor** table,
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unsigned* limit);
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/*
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* C callable function enabling to change the value of IDT register. Must be called
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* with interrupts masked at processor level!!!.
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*/
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extern void i386_set_IDTR (interrupt_gate_descriptor* table,
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unsigned limit);
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#endif
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75
c/src/exec/score/cpu/i386/rtems/score/interrupts.h
Normal file
75
c/src/exec/score/cpu/i386/rtems/score/interrupts.h
Normal file
@@ -0,0 +1,75 @@
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/*
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* i386 interrupt macros.
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*
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* Formerly contained in and extracted from libcpu/i386/cpu.h
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*
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* COPYRIGHT (c) 1998 valette@crf.canon.fr
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.OARcorp.com/rtems/license.html.
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*
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* $Id$
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*
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* Applications must not include this file directly.
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*/
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#ifndef _rtems_score_interrupts_h
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#define _rtems_score_interrupts_h
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#ifndef ASM
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struct __rtems_raw_irq_connect_data__;
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typedef void (*rtems_raw_irq_hdl) (void);
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typedef void (*rtems_raw_irq_enable) (const struct __rtems_raw_irq_connect_data__*);
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typedef void (*rtems_raw_irq_disable) (const struct __rtems_raw_irq_connect_data__*);
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typedef int (*rtems_raw_irq_is_enabled) (const struct __rtems_raw_irq_connect_data__*);
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/*
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* Interrupt Level Macros
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*/
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#define i386_disable_interrupts( _level ) \
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{ \
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asm volatile ( "pushf ; \
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cli ; \
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pop %0" \
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: "=rm" ((_level)) \
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); \
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}
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#define i386_enable_interrupts( _level ) \
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{ \
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asm volatile ( "push %0 ; \
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popf" \
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: : "rm" ((_level)) : "cc" \
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); \
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}
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#define i386_flash_interrupts( _level ) \
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{ \
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asm volatile ( "push %0 ; \
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popf ; \
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cli" \
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: : "rm" ((_level)) : "cc" \
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); \
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}
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#define i386_get_interrupt_level( _level ) \
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do { \
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register unsigned32 _eflags; \
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\
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asm volatile ( "pushf ; \
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pop %0" \
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: "=rm" ((_eflags)) \
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); \
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\
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_level = (_eflags & EFLAGS_INTR_ENABLE) ? 0 : 1; \
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} while (0)
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#define _CPU_ISR_Disable( _level ) i386_disable_interrupts( _level )
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#define _CPU_ISR_Enable( _level ) i386_enable_interrupts( _level )
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#endif
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#endif
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184
c/src/exec/score/cpu/i386/rtems/score/registers.h
Normal file
184
c/src/exec/score/cpu/i386/rtems/score/registers.h
Normal file
@@ -0,0 +1,184 @@
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/* registers.h
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*
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* This file contains definition and constants related to Intel Cpu
|
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|
*
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* COPYRIGHT (c) 1998 valette@crf.canon.fr
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|
*
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|
* The license and distribution terms for this file may be
|
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|
* found in the file LICENSE in this distribution or at
|
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|
* http://www.OARcorp.com/rtems/license.html.
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|
*
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* $Id$
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|
*/
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#ifndef _rtems_score_registers_h
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#define _rtems_score_registers_h
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|
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|
/*
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|
* definition related to EFLAGS
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|
*/
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|
#define EFLAGS_CARRY 0x1
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|
#define EFLAGS_PARITY 0x4
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|
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|
#define EFLAGS_AUX_CARRY 0x10
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|
#define EFLAGS_ZERO 0x40
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|
#define EFLAGS_SIGN 0x80
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|
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|
#define EFLAGS_TRAP 0x100
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|
#define EFLAGS_INTR_ENABLE 0x200
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|
#define EFLAGS_DIRECTION 0x400
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|
#define EFLAGS_OVERFLOW 0x800
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|
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|
#define EFLAGS_IOPL_MASK 0x3000
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||||||
|
#define EFLAGS_NESTED_TASK 0x8000
|
||||||
|
|
||||||
|
#define EFLAGS_RESUME 0x10000
|
||||||
|
#define EFLAGS_VIRTUAL_MODE 0x20000
|
||||||
|
#define EFLAGS_ALIGN_CHECK 0x40000
|
||||||
|
#define EFLAGS_VIRTUAL_INTR 0x80000
|
||||||
|
|
||||||
|
#define EFLAGS_VIRTUAL_INTR_PEND 0x100000
|
||||||
|
#define EFLAGS_ID 0x200000
|
||||||
|
|
||||||
|
/*
|
||||||
|
* definitions related to CR0
|
||||||
|
*/
|
||||||
|
#define CR0_PROTECTION_ENABLE 0x1
|
||||||
|
#define CR0_MONITOR_COPROC 0x2
|
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|
#define CR0_COPROC_SOFT_EMUL 0x4
|
||||||
|
#define CR0_FLOATING_INSTR_EXCEPTION 0x8
|
||||||
|
|
||||||
|
#define CR0_EXTENSION_TYPE 0x10
|
||||||
|
#define CR0_NUMERIC_ERROR 0x20
|
||||||
|
|
||||||
|
#define CR0_WRITE_PROTECT 0x10000
|
||||||
|
#define CR0_ALIGMENT_MASK 0x40000
|
||||||
|
|
||||||
|
#define CR0_NO_WRITE_THROUGH 0x20000000
|
||||||
|
#define CR0_PAGE_LEVEL_CACHE_DISABLE 0x40000000
|
||||||
|
#define CR0_PAGING 0x80000000
|
||||||
|
|
||||||
|
/*
|
||||||
|
* definitions related to CR3
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CR3_PAGE_CACHE_DISABLE 0x10
|
||||||
|
#define CR3_PAGE_WRITE_THROUGH 0x8
|
||||||
|
|
||||||
|
|
||||||
|
#ifndef ASM
|
||||||
|
|
||||||
|
/*
|
||||||
|
* definition of eflags registers has a bit field structure
|
||||||
|
*/
|
||||||
|
typedef struct {
|
||||||
|
/*
|
||||||
|
* fist byte : bits 0->7
|
||||||
|
*/
|
||||||
|
unsigned int carry : 1;
|
||||||
|
unsigned int : 1;
|
||||||
|
unsigned int parity : 1;
|
||||||
|
unsigned int : 1;
|
||||||
|
|
||||||
|
unsigned int auxiliary_carry : 1;
|
||||||
|
unsigned int : 1;
|
||||||
|
unsigned int zero : 1; /* result is zero */
|
||||||
|
unsigned int sign : 1; /* result is less than zero */
|
||||||
|
/*
|
||||||
|
* Second byte : bits 7->15
|
||||||
|
*/
|
||||||
|
unsigned int trap : 1;
|
||||||
|
unsigned int intr_enable : 1; /* set => intr on */
|
||||||
|
unsigned int direction : 1; /* set => autodecrement */
|
||||||
|
unsigned int overflow : 1;
|
||||||
|
|
||||||
|
unsigned int IO_privilege : 2;
|
||||||
|
unsigned int nested_task : 1;
|
||||||
|
unsigned int : 1;
|
||||||
|
/*
|
||||||
|
* Third byte : bits 15->23
|
||||||
|
*/
|
||||||
|
unsigned int resume : 1;
|
||||||
|
unsigned int virtual_mode : 1;
|
||||||
|
unsigned int aligment_check : 1;
|
||||||
|
unsigned int virtual_intr : 1;
|
||||||
|
|
||||||
|
unsigned int virtual_intr_pending : 1;
|
||||||
|
unsigned int id : 1;
|
||||||
|
unsigned int : 2;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* fourth byte : bits 24->31 : UNUSED
|
||||||
|
*/
|
||||||
|
unsigned int : 8;
|
||||||
|
}eflags_bits;
|
||||||
|
|
||||||
|
typedef union {
|
||||||
|
eflags_bits eflags;
|
||||||
|
unsigned int i;
|
||||||
|
}eflags;
|
||||||
|
/*
|
||||||
|
* definition of eflags registers has a bit field structure
|
||||||
|
*/
|
||||||
|
typedef struct {
|
||||||
|
/*
|
||||||
|
* fist byte : bits 0->7
|
||||||
|
*/
|
||||||
|
unsigned int protection_enable : 1;
|
||||||
|
unsigned int monitor_coproc : 1;
|
||||||
|
unsigned int coproc_soft_emul : 1;
|
||||||
|
unsigned int floating_instr_except : 1;
|
||||||
|
|
||||||
|
unsigned int extension_type : 1;
|
||||||
|
unsigned int numeric_error : 1;
|
||||||
|
unsigned int : 2;
|
||||||
|
/*
|
||||||
|
* second byte 8->15 : UNUSED
|
||||||
|
*/
|
||||||
|
unsigned int : 8;
|
||||||
|
/*
|
||||||
|
* third byte 16->23
|
||||||
|
*/
|
||||||
|
unsigned int write_protect : 1;
|
||||||
|
unsigned int : 1;
|
||||||
|
unsigned int aligment_mask : 1;
|
||||||
|
unsigned int : 1;
|
||||||
|
|
||||||
|
unsigned int : 4;
|
||||||
|
/*
|
||||||
|
* fourth byte 24->31
|
||||||
|
*/
|
||||||
|
unsigned int : 4;
|
||||||
|
|
||||||
|
unsigned int : 1;
|
||||||
|
unsigned int no_write_through : 1;
|
||||||
|
unsigned int page_level_cache_disable : 1;
|
||||||
|
unsigned int paging : 1;
|
||||||
|
}cr0_bits;
|
||||||
|
|
||||||
|
typedef union {
|
||||||
|
cr0_bits cr0;
|
||||||
|
unsigned int i;
|
||||||
|
}cr0;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* definition of cr3 registers has a bit field structure
|
||||||
|
*/
|
||||||
|
typedef struct {
|
||||||
|
|
||||||
|
unsigned int : 3;
|
||||||
|
unsigned int page_write_transparent : 1;
|
||||||
|
unsigned int page_cache_disable : 1;
|
||||||
|
unsigned int : 7;
|
||||||
|
unsigned int page_directory_base :20;
|
||||||
|
}cr3_bits;
|
||||||
|
|
||||||
|
typedef union {
|
||||||
|
cr3_bits cr3;
|
||||||
|
unsigned int i;
|
||||||
|
}cr3;
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
@@ -1,3 +1,17 @@
|
|||||||
|
2002-03-29 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
|
||||||
|
|
||||||
|
* rtems/score/idtr.h: New file, extracted from libcpu/cpu.h.
|
||||||
|
* rtems/score/interrupts.h: New file, extracted from libcpu/cpu.h.
|
||||||
|
* rtems/score/registers.h: New file, moved from libcpu.
|
||||||
|
* Makefile.am: Reflect changes above.
|
||||||
|
* cpu.c: Don't include cpuModel.h,
|
||||||
|
#include <rtems.h>,
|
||||||
|
#include <rtems/score/i386types.h>,
|
||||||
|
#include <rtems/score/idtr.h>.
|
||||||
|
* rtems/score/cpu.h: Don't include libcpu/cpu.h.
|
||||||
|
#include <rtems/score/interrupts.h>,
|
||||||
|
#include <rtems/score/registers.h>.
|
||||||
|
|
||||||
2001-04-03 Joel Sherrill <joel@OARcorp.com>
|
2001-04-03 Joel Sherrill <joel@OARcorp.com>
|
||||||
|
|
||||||
* Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h.
|
* Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h.
|
||||||
|
|||||||
@@ -27,7 +27,11 @@ include_rtems_scoredir = $(includedir)/rtems/score
|
|||||||
include_rtems_score_HEADERS = \
|
include_rtems_score_HEADERS = \
|
||||||
rtems/score/cpu.h \
|
rtems/score/cpu.h \
|
||||||
rtems/score/i386.h \
|
rtems/score/i386.h \
|
||||||
rtems/score/types.h
|
rtems/score/types.h \
|
||||||
|
rtems/score/interrupts.h \
|
||||||
|
rtems/score/registers.h \
|
||||||
|
rtems/score/idtr.h
|
||||||
|
|
||||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score \
|
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score \
|
||||||
$(include_rtems_score_HEADERS:%.h=$(PROJECT_INCLUDE)/%.h)
|
$(include_rtems_score_HEADERS:%.h=$(PROJECT_INCLUDE)/%.h)
|
||||||
|
|
||||||
|
|||||||
@@ -12,12 +12,14 @@
|
|||||||
* $Id$
|
* $Id$
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
#include <rtems.h>
|
||||||
#include <rtems/system.h>
|
#include <rtems/system.h>
|
||||||
|
#include <rtems/score/types.h>
|
||||||
#include <rtems/score/isr.h>
|
#include <rtems/score/isr.h>
|
||||||
|
#include <rtems/score/idtr.h>
|
||||||
|
|
||||||
#include <rtems/bspIo.h>
|
#include <rtems/bspIo.h>
|
||||||
#include <rtems/score/thread.h>
|
#include <rtems/score/thread.h>
|
||||||
#include <libcpu/cpuModel.h>
|
|
||||||
|
|
||||||
|
|
||||||
/* _CPU_Initialize
|
/* _CPU_Initialize
|
||||||
*
|
*
|
||||||
|
|||||||
@@ -21,10 +21,11 @@ extern "C" {
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
#include <rtems/score/i386.h> /* pick up machine definitions */
|
#include <rtems/score/i386.h> /* pick up machine definitions */
|
||||||
#include <libcpu/cpu.h>
|
|
||||||
|
|
||||||
#ifndef ASM
|
#ifndef ASM
|
||||||
#include <rtems/score/types.h>
|
#include <rtems/score/types.h>
|
||||||
|
#include <rtems/score/interrupts.h> /* formerly in libcpu/cpu.h> */
|
||||||
|
#include <rtems/score/registers.h> /* formerly part of libcpu */
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* conditional compilation parameters */
|
/* conditional compilation parameters */
|
||||||
|
|||||||
62
cpukit/score/cpu/i386/rtems/score/idtr.h
Normal file
62
cpukit/score/cpu/i386/rtems/score/idtr.h
Normal file
@@ -0,0 +1,62 @@
|
|||||||
|
/*
|
||||||
|
* This file contains definitions for data structure related
|
||||||
|
* to Intel system programming. More information can be found
|
||||||
|
* on Intel site and more precisely in the following book :
|
||||||
|
*
|
||||||
|
* Pentium Processor familly
|
||||||
|
* Developper's Manual
|
||||||
|
*
|
||||||
|
* Volume 3 : Architecture and Programming Manual
|
||||||
|
*
|
||||||
|
* Formerly contained in and extracted from libcpu/i386/cpu.h.
|
||||||
|
*
|
||||||
|
* Copyright (C) 1998 Eric Valette (valette@crf.canon.fr)
|
||||||
|
* Canon Centre Recherche France.
|
||||||
|
*
|
||||||
|
* The license and distribution terms for this file may be
|
||||||
|
* found in found in the file LICENSE in this distribution or at
|
||||||
|
* http://www.OARcorp.com/rtems/license.html.
|
||||||
|
*
|
||||||
|
* $Id$
|
||||||
|
*
|
||||||
|
* Applications must not include this file directly.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _rtems_score_idtr_h
|
||||||
|
#define _rtems_score_idtr_h
|
||||||
|
|
||||||
|
/*
|
||||||
|
* See page 14.9 Figure 14-2.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
unsigned int low_offsets_bits:16;
|
||||||
|
unsigned int segment_selector:16;
|
||||||
|
unsigned int fixed_value_bits:8;
|
||||||
|
unsigned int gate_type:5;
|
||||||
|
unsigned int privilege:2;
|
||||||
|
unsigned int present:1;
|
||||||
|
unsigned int high_offsets_bits:16;
|
||||||
|
} interrupt_gate_descriptor;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* C callable function enabling to create a interrupt_gate_descriptor
|
||||||
|
*/
|
||||||
|
extern void create_interrupt_gate_descriptor (interrupt_gate_descriptor*, rtems_raw_irq_hdl);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* C callable function enabling to get easily usable info from
|
||||||
|
* the actual value of IDT register.
|
||||||
|
*/
|
||||||
|
extern void i386_get_info_from_IDTR (interrupt_gate_descriptor** table,
|
||||||
|
unsigned* limit);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* C callable function enabling to change the value of IDT register. Must be called
|
||||||
|
* with interrupts masked at processor level!!!.
|
||||||
|
*/
|
||||||
|
extern void i386_set_IDTR (interrupt_gate_descriptor* table,
|
||||||
|
unsigned limit);
|
||||||
|
|
||||||
|
#endif
|
||||||
75
cpukit/score/cpu/i386/rtems/score/interrupts.h
Normal file
75
cpukit/score/cpu/i386/rtems/score/interrupts.h
Normal file
@@ -0,0 +1,75 @@
|
|||||||
|
/*
|
||||||
|
* i386 interrupt macros.
|
||||||
|
*
|
||||||
|
* Formerly contained in and extracted from libcpu/i386/cpu.h
|
||||||
|
*
|
||||||
|
* COPYRIGHT (c) 1998 valette@crf.canon.fr
|
||||||
|
*
|
||||||
|
* The license and distribution terms for this file may be
|
||||||
|
* found in the file LICENSE in this distribution or at
|
||||||
|
* http://www.OARcorp.com/rtems/license.html.
|
||||||
|
*
|
||||||
|
* $Id$
|
||||||
|
*
|
||||||
|
* Applications must not include this file directly.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _rtems_score_interrupts_h
|
||||||
|
#define _rtems_score_interrupts_h
|
||||||
|
|
||||||
|
#ifndef ASM
|
||||||
|
|
||||||
|
struct __rtems_raw_irq_connect_data__;
|
||||||
|
|
||||||
|
typedef void (*rtems_raw_irq_hdl) (void);
|
||||||
|
typedef void (*rtems_raw_irq_enable) (const struct __rtems_raw_irq_connect_data__*);
|
||||||
|
typedef void (*rtems_raw_irq_disable) (const struct __rtems_raw_irq_connect_data__*);
|
||||||
|
typedef int (*rtems_raw_irq_is_enabled) (const struct __rtems_raw_irq_connect_data__*);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Interrupt Level Macros
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define i386_disable_interrupts( _level ) \
|
||||||
|
{ \
|
||||||
|
asm volatile ( "pushf ; \
|
||||||
|
cli ; \
|
||||||
|
pop %0" \
|
||||||
|
: "=rm" ((_level)) \
|
||||||
|
); \
|
||||||
|
}
|
||||||
|
|
||||||
|
#define i386_enable_interrupts( _level ) \
|
||||||
|
{ \
|
||||||
|
asm volatile ( "push %0 ; \
|
||||||
|
popf" \
|
||||||
|
: : "rm" ((_level)) : "cc" \
|
||||||
|
); \
|
||||||
|
}
|
||||||
|
|
||||||
|
#define i386_flash_interrupts( _level ) \
|
||||||
|
{ \
|
||||||
|
asm volatile ( "push %0 ; \
|
||||||
|
popf ; \
|
||||||
|
cli" \
|
||||||
|
: : "rm" ((_level)) : "cc" \
|
||||||
|
); \
|
||||||
|
}
|
||||||
|
|
||||||
|
#define i386_get_interrupt_level( _level ) \
|
||||||
|
do { \
|
||||||
|
register unsigned32 _eflags; \
|
||||||
|
\
|
||||||
|
asm volatile ( "pushf ; \
|
||||||
|
pop %0" \
|
||||||
|
: "=rm" ((_eflags)) \
|
||||||
|
); \
|
||||||
|
\
|
||||||
|
_level = (_eflags & EFLAGS_INTR_ENABLE) ? 0 : 1; \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
#define _CPU_ISR_Disable( _level ) i386_disable_interrupts( _level )
|
||||||
|
#define _CPU_ISR_Enable( _level ) i386_enable_interrupts( _level )
|
||||||
|
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
184
cpukit/score/cpu/i386/rtems/score/registers.h
Normal file
184
cpukit/score/cpu/i386/rtems/score/registers.h
Normal file
@@ -0,0 +1,184 @@
|
|||||||
|
/* registers.h
|
||||||
|
*
|
||||||
|
* This file contains definition and constants related to Intel Cpu
|
||||||
|
*
|
||||||
|
* COPYRIGHT (c) 1998 valette@crf.canon.fr
|
||||||
|
*
|
||||||
|
* The license and distribution terms for this file may be
|
||||||
|
* found in the file LICENSE in this distribution or at
|
||||||
|
* http://www.OARcorp.com/rtems/license.html.
|
||||||
|
*
|
||||||
|
* $Id$
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _rtems_score_registers_h
|
||||||
|
#define _rtems_score_registers_h
|
||||||
|
|
||||||
|
/*
|
||||||
|
* definition related to EFLAGS
|
||||||
|
*/
|
||||||
|
#define EFLAGS_CARRY 0x1
|
||||||
|
#define EFLAGS_PARITY 0x4
|
||||||
|
|
||||||
|
#define EFLAGS_AUX_CARRY 0x10
|
||||||
|
#define EFLAGS_ZERO 0x40
|
||||||
|
#define EFLAGS_SIGN 0x80
|
||||||
|
|
||||||
|
#define EFLAGS_TRAP 0x100
|
||||||
|
#define EFLAGS_INTR_ENABLE 0x200
|
||||||
|
#define EFLAGS_DIRECTION 0x400
|
||||||
|
#define EFLAGS_OVERFLOW 0x800
|
||||||
|
|
||||||
|
#define EFLAGS_IOPL_MASK 0x3000
|
||||||
|
#define EFLAGS_NESTED_TASK 0x8000
|
||||||
|
|
||||||
|
#define EFLAGS_RESUME 0x10000
|
||||||
|
#define EFLAGS_VIRTUAL_MODE 0x20000
|
||||||
|
#define EFLAGS_ALIGN_CHECK 0x40000
|
||||||
|
#define EFLAGS_VIRTUAL_INTR 0x80000
|
||||||
|
|
||||||
|
#define EFLAGS_VIRTUAL_INTR_PEND 0x100000
|
||||||
|
#define EFLAGS_ID 0x200000
|
||||||
|
|
||||||
|
/*
|
||||||
|
* definitions related to CR0
|
||||||
|
*/
|
||||||
|
#define CR0_PROTECTION_ENABLE 0x1
|
||||||
|
#define CR0_MONITOR_COPROC 0x2
|
||||||
|
#define CR0_COPROC_SOFT_EMUL 0x4
|
||||||
|
#define CR0_FLOATING_INSTR_EXCEPTION 0x8
|
||||||
|
|
||||||
|
#define CR0_EXTENSION_TYPE 0x10
|
||||||
|
#define CR0_NUMERIC_ERROR 0x20
|
||||||
|
|
||||||
|
#define CR0_WRITE_PROTECT 0x10000
|
||||||
|
#define CR0_ALIGMENT_MASK 0x40000
|
||||||
|
|
||||||
|
#define CR0_NO_WRITE_THROUGH 0x20000000
|
||||||
|
#define CR0_PAGE_LEVEL_CACHE_DISABLE 0x40000000
|
||||||
|
#define CR0_PAGING 0x80000000
|
||||||
|
|
||||||
|
/*
|
||||||
|
* definitions related to CR3
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CR3_PAGE_CACHE_DISABLE 0x10
|
||||||
|
#define CR3_PAGE_WRITE_THROUGH 0x8
|
||||||
|
|
||||||
|
|
||||||
|
#ifndef ASM
|
||||||
|
|
||||||
|
/*
|
||||||
|
* definition of eflags registers has a bit field structure
|
||||||
|
*/
|
||||||
|
typedef struct {
|
||||||
|
/*
|
||||||
|
* fist byte : bits 0->7
|
||||||
|
*/
|
||||||
|
unsigned int carry : 1;
|
||||||
|
unsigned int : 1;
|
||||||
|
unsigned int parity : 1;
|
||||||
|
unsigned int : 1;
|
||||||
|
|
||||||
|
unsigned int auxiliary_carry : 1;
|
||||||
|
unsigned int : 1;
|
||||||
|
unsigned int zero : 1; /* result is zero */
|
||||||
|
unsigned int sign : 1; /* result is less than zero */
|
||||||
|
/*
|
||||||
|
* Second byte : bits 7->15
|
||||||
|
*/
|
||||||
|
unsigned int trap : 1;
|
||||||
|
unsigned int intr_enable : 1; /* set => intr on */
|
||||||
|
unsigned int direction : 1; /* set => autodecrement */
|
||||||
|
unsigned int overflow : 1;
|
||||||
|
|
||||||
|
unsigned int IO_privilege : 2;
|
||||||
|
unsigned int nested_task : 1;
|
||||||
|
unsigned int : 1;
|
||||||
|
/*
|
||||||
|
* Third byte : bits 15->23
|
||||||
|
*/
|
||||||
|
unsigned int resume : 1;
|
||||||
|
unsigned int virtual_mode : 1;
|
||||||
|
unsigned int aligment_check : 1;
|
||||||
|
unsigned int virtual_intr : 1;
|
||||||
|
|
||||||
|
unsigned int virtual_intr_pending : 1;
|
||||||
|
unsigned int id : 1;
|
||||||
|
unsigned int : 2;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* fourth byte : bits 24->31 : UNUSED
|
||||||
|
*/
|
||||||
|
unsigned int : 8;
|
||||||
|
}eflags_bits;
|
||||||
|
|
||||||
|
typedef union {
|
||||||
|
eflags_bits eflags;
|
||||||
|
unsigned int i;
|
||||||
|
}eflags;
|
||||||
|
/*
|
||||||
|
* definition of eflags registers has a bit field structure
|
||||||
|
*/
|
||||||
|
typedef struct {
|
||||||
|
/*
|
||||||
|
* fist byte : bits 0->7
|
||||||
|
*/
|
||||||
|
unsigned int protection_enable : 1;
|
||||||
|
unsigned int monitor_coproc : 1;
|
||||||
|
unsigned int coproc_soft_emul : 1;
|
||||||
|
unsigned int floating_instr_except : 1;
|
||||||
|
|
||||||
|
unsigned int extension_type : 1;
|
||||||
|
unsigned int numeric_error : 1;
|
||||||
|
unsigned int : 2;
|
||||||
|
/*
|
||||||
|
* second byte 8->15 : UNUSED
|
||||||
|
*/
|
||||||
|
unsigned int : 8;
|
||||||
|
/*
|
||||||
|
* third byte 16->23
|
||||||
|
*/
|
||||||
|
unsigned int write_protect : 1;
|
||||||
|
unsigned int : 1;
|
||||||
|
unsigned int aligment_mask : 1;
|
||||||
|
unsigned int : 1;
|
||||||
|
|
||||||
|
unsigned int : 4;
|
||||||
|
/*
|
||||||
|
* fourth byte 24->31
|
||||||
|
*/
|
||||||
|
unsigned int : 4;
|
||||||
|
|
||||||
|
unsigned int : 1;
|
||||||
|
unsigned int no_write_through : 1;
|
||||||
|
unsigned int page_level_cache_disable : 1;
|
||||||
|
unsigned int paging : 1;
|
||||||
|
}cr0_bits;
|
||||||
|
|
||||||
|
typedef union {
|
||||||
|
cr0_bits cr0;
|
||||||
|
unsigned int i;
|
||||||
|
}cr0;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* definition of cr3 registers has a bit field structure
|
||||||
|
*/
|
||||||
|
typedef struct {
|
||||||
|
|
||||||
|
unsigned int : 3;
|
||||||
|
unsigned int page_write_transparent : 1;
|
||||||
|
unsigned int page_cache_disable : 1;
|
||||||
|
unsigned int : 7;
|
||||||
|
unsigned int page_directory_base :20;
|
||||||
|
}cr3_bits;
|
||||||
|
|
||||||
|
typedef union {
|
||||||
|
cr3_bits cr3;
|
||||||
|
unsigned int i;
|
||||||
|
}cr3;
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
Reference in New Issue
Block a user