forked from Imagelibrary/rtems
bsps: Move ARM GICv2 driver to bsps/shared
This moves the ARM GICv2 driver to bsps/shared to be usable by AArch64 code.
This commit is contained in:
committed by
Joel Sherrill
parent
f0859573f9
commit
a151ee167e
@@ -60,5 +60,5 @@ void arm_interrupt_facility_set_exception_handler(void)
|
||||
|
||||
void bsp_interrupt_dispatch(void)
|
||||
{
|
||||
gicv3_interrupt_dispatch();
|
||||
gicvx_interrupt_dispatch();
|
||||
}
|
||||
@@ -57,5 +57,5 @@ void arm_interrupt_facility_set_exception_handler(void)
|
||||
|
||||
void bsp_interrupt_dispatch(void)
|
||||
{
|
||||
gicv3_interrupt_dispatch();
|
||||
gicvx_interrupt_dispatch();
|
||||
}
|
||||
@@ -122,10 +122,10 @@ void arm_interrupt_facility_set_exception_handler(void);
|
||||
void arm_interrupt_handler_dispatch(rtems_vector_number vector);
|
||||
|
||||
/**
|
||||
* This is the GICv3 interrupt dispatcher that is to be called from the
|
||||
* This is the GICv1/GICv2/GICv3 interrupt dispatcher that is to be called from the
|
||||
* architecture-specific implementation of the IRQ handler.
|
||||
*/
|
||||
void gicv3_interrupt_dispatch(void);
|
||||
void gicvx_interrupt_dispatch(void);
|
||||
|
||||
static inline uint32_t arm_gic_irq_processor_count(void)
|
||||
{
|
||||
|
||||
@@ -14,10 +14,6 @@
|
||||
|
||||
#include <dev/irq/arm-gic.h>
|
||||
|
||||
#include <rtems/score/armv4.h>
|
||||
|
||||
#include <libcpu/arm-cp15.h>
|
||||
|
||||
#include <bsp/irq.h>
|
||||
#include <bsp/irq-generic.h>
|
||||
#include <bsp/start.h>
|
||||
@@ -53,7 +49,7 @@
|
||||
#define CPUIF_ICCICR GIC_CPUIF_ICCICR_ENABLE
|
||||
#endif
|
||||
|
||||
void bsp_interrupt_dispatch(void)
|
||||
void gicvx_interrupt_dispatch(void)
|
||||
{
|
||||
volatile gic_cpuif *cpuif = GIC_CPUIF;
|
||||
uint32_t icciar = cpuif->icciar;
|
||||
@@ -61,11 +57,7 @@ void bsp_interrupt_dispatch(void)
|
||||
rtems_vector_number spurious = 1023;
|
||||
|
||||
if (vector != spurious) {
|
||||
uint32_t psr = _ARMV4_Status_irq_enable();
|
||||
|
||||
bsp_interrupt_handler_dispatch(vector);
|
||||
|
||||
_ARMV4_Status_restore(psr);
|
||||
arm_interrupt_handler_dispatch(vector);
|
||||
|
||||
cpuif->icceoir = icciar;
|
||||
}
|
||||
@@ -117,10 +109,7 @@ rtems_status_code bsp_interrupt_facility_initialize(void)
|
||||
uint32_t id_count = get_id_count(dist);
|
||||
uint32_t id;
|
||||
|
||||
arm_cp15_set_exception_handler(
|
||||
ARM_EXCEPTION_IRQ,
|
||||
_ARMV4_Exception_interrupt
|
||||
);
|
||||
arm_interrupt_facility_set_exception_handler();
|
||||
|
||||
for (id = 0; id < id_count; id += 32) {
|
||||
#ifdef BSP_ARM_GIC_ENABLE_FIQ_FOR_GROUP_0
|
||||
@@ -134,7 +134,7 @@
|
||||
#define ARM_GIC_REDIST ((volatile gic_redist *) BSP_ARM_GIC_REDIST_BASE)
|
||||
#define ARM_GIC_SGI_PPI (((volatile gic_sgi_ppi *) ((char*)BSP_ARM_GIC_REDIST_BASE + (1 << 16))))
|
||||
|
||||
void gicv3_interrupt_dispatch(void)
|
||||
void gicvx_interrupt_dispatch(void)
|
||||
{
|
||||
uint32_t icciar = READ_SR(ICC_IAR1);
|
||||
rtems_vector_number vector = GIC_CPUIF_ICCIAR_ACKINTID_GET(icciar);
|
||||
|
||||
@@ -62,7 +62,8 @@ endif
|
||||
|
||||
# IRQ
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-default-handler.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-gic.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/irq/arm-gicv2.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c
|
||||
|
||||
# Console
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/serial/console-termios-init.c
|
||||
|
||||
@@ -51,7 +51,8 @@ endif
|
||||
|
||||
# IRQ
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-default-handler.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-gic.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/irq/arm-gicv2.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c
|
||||
|
||||
# Console
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/serial/console-termios.c
|
||||
|
||||
@@ -56,7 +56,8 @@ endif
|
||||
|
||||
# IRQ
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-default-handler.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-gic.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/irq/arm-gicv2.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c
|
||||
|
||||
# Console
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/serial/console-termios-init.c
|
||||
|
||||
@@ -35,7 +35,8 @@ librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/clock/arm-generic-tim
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cache/cache-cp15.c
|
||||
# irq
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-default-handler.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-gic.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/irq/arm-gicv2.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c
|
||||
# console
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xen/console/console.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/serial/console-termios.c
|
||||
|
||||
@@ -55,7 +55,8 @@ endif
|
||||
|
||||
# IRQ
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-default-handler.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-gic.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/irq/arm-gicv2.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c
|
||||
|
||||
# Console
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/serial/console-termios.c
|
||||
|
||||
@@ -55,7 +55,8 @@ endif
|
||||
|
||||
# IRQ
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-default-handler.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-gic.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/irq/arm-gicv2.c
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c
|
||||
|
||||
# Console
|
||||
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/serial/console-termios.c
|
||||
|
||||
@@ -30,7 +30,7 @@ source:
|
||||
- bsps/shared/start/sbrk.c
|
||||
- bsps/shared/dev/irq/arm-gicv3.c
|
||||
- bsps/shared/irq/irq-default-handler.c
|
||||
- bsps/aarch64/shared/irq/irq-arm-gicv3-aarch64.c
|
||||
- bsps/aarch64/shared/irq/irq-arm-gicvx-aarch64.c
|
||||
- bsps/shared/dev/btimer/btimer-cpucounter.c
|
||||
- bsps/shared/dev/clock/arm-generic-timer.c
|
||||
- bsps/aarch64/shared/clock/arm-generic-timer-aarch64.c
|
||||
|
||||
@@ -128,7 +128,8 @@ source:
|
||||
- bsps/arm/shared/clock/clock-a9mpcore.c
|
||||
- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
|
||||
- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
|
||||
- bsps/arm/shared/irq/irq-gic.c
|
||||
- bsps/shared/dev/irq/arm-gicv2.c
|
||||
- bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c
|
||||
- bsps/arm/shared/start/bsp-start-memcpy.S
|
||||
- bsps/shared/dev/btimer/btimer-stub.c
|
||||
- bsps/shared/dev/getentropy/getentropy-cpucounter.c
|
||||
|
||||
@@ -97,7 +97,8 @@ source:
|
||||
- bsps/arm/shared/clock/arm-generic-timer-aarch32.c
|
||||
- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
|
||||
- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
|
||||
- bsps/arm/shared/irq/irq-gic.c
|
||||
- bsps/shared/dev/irq/arm-gicv2.c
|
||||
- bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c
|
||||
- bsps/arm/shared/start/bsp-start-memcpy.S
|
||||
- bsps/shared/dev/btimer/btimer-stub.c
|
||||
- bsps/shared/dev/getentropy/getentropy-cpucounter.c
|
||||
|
||||
@@ -67,7 +67,8 @@ source:
|
||||
- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
|
||||
- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
|
||||
- bsps/arm/shared/fb/arm-pl111.c
|
||||
- bsps/arm/shared/irq/irq-gic.c
|
||||
- bsps/shared/dev/irq/arm-gicv2.c
|
||||
- bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c
|
||||
- bsps/arm/shared/serial/arm-pl050.c
|
||||
- bsps/arm/shared/start/bsp-start-memcpy.S
|
||||
- bsps/shared/dev/btimer/btimer-stub.c
|
||||
|
||||
@@ -63,7 +63,8 @@ source:
|
||||
- bsps/arm/shared/clock/arm-generic-timer-aarch32.c
|
||||
- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
|
||||
- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
|
||||
- bsps/arm/shared/irq/irq-gic.c
|
||||
- bsps/shared/dev/irq/arm-gicv2.c
|
||||
- bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c
|
||||
- bsps/arm/shared/start/bsp-start-memcpy.S
|
||||
- bsps/arm/xen/console/console.c
|
||||
- bsps/arm/xen/start/bspstart.c
|
||||
|
||||
@@ -24,7 +24,8 @@ source:
|
||||
- bsps/arm/shared/clock/clock-a9mpcore.c
|
||||
- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
|
||||
- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
|
||||
- bsps/arm/shared/irq/irq-gic.c
|
||||
- bsps/shared/dev/irq/arm-gicv2.c
|
||||
- bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c
|
||||
- bsps/arm/shared/start/bsp-start-memcpy.S
|
||||
- bsps/arm/xilinx-zynq/console/console-config.c
|
||||
- bsps/arm/xilinx-zynq/console/console-init.c
|
||||
|
||||
@@ -79,7 +79,8 @@ source:
|
||||
- bsps/arm/shared/clock/arm-generic-timer-aarch32.c
|
||||
- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
|
||||
- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
|
||||
- bsps/arm/shared/irq/irq-gic.c
|
||||
- bsps/shared/dev/irq/arm-gicv2.c
|
||||
- bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c
|
||||
- bsps/arm/shared/start/bsp-start-memcpy.S
|
||||
- bsps/arm/xilinx-zynqmp/console/console-config.c
|
||||
- bsps/arm/xilinx-zynqmp/start/bspreset.c
|
||||
|
||||
Reference in New Issue
Block a user