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2009-10-16 Jennifer Averett <jennifer@OARcorp.com>

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* configure.ac: Default to having PSC8 mezzanine so code builds
	all the time.
	* startup/bspstart.c: Calibrated clock using an VMEBus controlled
	discrete pulsed at a 20ms rate.
This commit is contained in:
Joel Sherrill
2009-10-16 16:22:46 +00:00
parent db4903f61e
commit 9f6aaf7191
3 changed files with 11 additions and 2 deletions
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7
c/src/lib/libbsp/powerpc/score603e/ChangeLog
View File

@@ -1,3 +1,10 @@
2009-10-16 Jennifer Averett <jennifer@OARcorp.com>
* configure.ac: Default to having PSC8 mezzanine so code builds
all the time.
* startup/bspstart.c: Calibrated clock using an VMEBus controlled
discrete pulsed at a 20ms rate.
2009-10-15 Ralf Corsépius <ralf.corsepius@rtems.org>
* make/custom/score603e.cfg: New (relocated from /make/custom).

2
c/src/lib/libbsp/powerpc/score603e/configure.ac
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@@ -37,7 +37,7 @@ RTEMS_BSPOPTS_SET([CONSOLE_USE_INTERRUPTS],[*],[0])
RTEMS_BSPOPTS_HELP([CONSOLE_USE_INTERRUPTS],
[whether using console interrupts])
RTEMS_BSPOPTS_SET([HAS_PMC_PSC8],[*],[0])
RTEMS_BSPOPTS_SET([HAS_PMC_PSC8],[*],[1])
RTEMS_BSPOPTS_HELP([HAS_PMC_PSC8],
[whether has a PSC8 PMC board attached to PMC slot])

4
c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
View File

@@ -42,8 +42,10 @@ unsigned int BSP_processor_frequency;
/*
* Time base divisior (how many tick for 1 second).
* Note: Calibrated with an application using a 20ms timer and
* a scope.
*/
unsigned int BSP_time_base_divisor = 4000;
unsigned int BSP_time_base_divisor = 3960;
/*
* Driver configuration parameters