forked from Imagelibrary/rtems
bsps/sparc: Change tabs to spaces.
This commit is contained in:
committed by
Daniel Hellstrom
parent
c903fc28a9
commit
9f058fb1c2
@@ -82,14 +82,14 @@ static CPU_Counter_ticks erc32_counter_difference(
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rtems_configuration_get_microseconds_per_tick(); \
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\
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ERC32_MEC_Set_Real_Time_Clock_Timer_Control( \
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ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | \
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ERC32_MEC_TIMER_COUNTER_LOAD_SCALER | \
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ERC32_MEC_TIMER_COUNTER_LOAD_COUNTER \
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ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | \
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ERC32_MEC_TIMER_COUNTER_LOAD_SCALER | \
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ERC32_MEC_TIMER_COUNTER_LOAD_COUNTER \
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); \
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\
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ERC32_MEC_Set_Real_Time_Clock_Timer_Control( \
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ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | \
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ERC32_MEC_TIMER_COUNTER_RELOAD_AT_ZERO \
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ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | \
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ERC32_MEC_TIMER_COUNTER_RELOAD_AT_ZERO \
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); \
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_SPARC_Counter_initialize( \
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&ERC32_MEC.Real_Time_Clock_Counter, \
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@@ -148,7 +148,7 @@ static int erc32_console_first_open(int major, int minor, void *arg)
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#if (CONSOLE_USE_INTERRUPTS)
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static ssize_t erc32_console_write_support_int(
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int minor, const char *buf, size_t len)
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int minor, const char *buf, size_t len)
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{
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if (len > 0) {
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console_data *cd = &Console_Port_Data[minor];
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@@ -264,7 +264,7 @@ static void erc32_console_isr_b(
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buf[i] = ERC32_MEC.UART_Channel_B;
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++i;
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}
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if ( i )
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if ( i )
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rtems_termios_enqueue_raw_characters(cd->termios_data, buf, i);
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/* dequeue transmitted chars */
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@@ -112,9 +112,9 @@ int rtems_erc32_sonic_driver_attach(struct rtems_bsdnet_ifconfig *config)
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{
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ERC32_MEC.IO_Configuration |=
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(0x15 << (((SONIC_BASE_ADDRESS >> 24) & 0x3) * 8));
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(0x15 << (((SONIC_BASE_ADDRESS >> 24) & 0x3) * 8));
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ERC32_MEC.Control &= ~0x60001; /* Disable DMA time-out, parity & power-down */
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ERC32_MEC.Control |= 0x10000; /* Enable DMA */
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ERC32_MEC.Control |= 0x10000; /* Enable DMA */
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ERC32_MEC.Interrupt_Mask &= ~(1 << (SONIC_VECTOR - 0x10));
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return(rtems_sonic_driver_attach( config, &erc32_sonic_configuration ));
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@@ -63,8 +63,8 @@ struct rtems_bsdnet_ifconfig;
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extern int rtems_erc32_sonic_driver_attach(
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struct rtems_bsdnet_ifconfig *config
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);
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#define RTEMS_BSP_NETWORK_DRIVER_NAME "sonic1"
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#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_erc32_sonic_driver_attach
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#define RTEMS_BSP_NETWORK_DRIVER_NAME "sonic1"
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#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_erc32_sonic_driver_attach
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/* Constants */
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@@ -160,9 +160,9 @@ void bsp_spurious_initialize()
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* paramaters to the program.
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*/
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if (( trap == 5 || trap == 6 ) ||
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(( trap >= 0x11 ) && ( trap <= 0x1f )) ||
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(( trap >= 0x70 ) && ( trap <= 0x83 )))
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if (( trap == 5 || trap == 6 ) ||
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(( trap >= 0x11 ) && ( trap <= 0x1f )) ||
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(( trap >= 0x70 ) && ( trap <= 0x83 )))
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continue;
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set_vector( (rtems_isr_entry) bsp_spurious_handler,
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@@ -50,70 +50,70 @@ void cchip1_set_isr(void *handler, int irqno, void *arg);
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#define READ_REG(address) _READ_REG((unsigned int)address)
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static __inline__ unsigned int _READ_REG(unsigned int addr) {
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unsigned int tmp;
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__asm__ ("lda [%1]1, %0 "
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: "=r"(tmp)
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: "r"(addr)
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);
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return tmp;
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unsigned int tmp;
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__asm__ ("lda [%1]1, %0 "
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: "=r"(tmp)
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: "r"(addr)
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);
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return tmp;
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}
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/* PCI bride reg layout on AMBA side */
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typedef struct {
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unsigned int bar0;
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unsigned int bar1;
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unsigned int bar2;
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unsigned int bar3;
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unsigned int bar4;/* 0x10 */
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unsigned int bar0;
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unsigned int bar1;
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unsigned int bar2;
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unsigned int bar3;
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unsigned int bar4;/* 0x10 */
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unsigned int unused[4*3-1];
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unsigned int unused[4*3-1];
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unsigned int ambabars[1]; /* 0x40 */
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unsigned int ambabars[1]; /* 0x40 */
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} amba_bridge_regs;
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/* PCI bride reg layout on PCI side */
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typedef struct {
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unsigned int bar0;
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unsigned int bar1;
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unsigned int bar2;
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unsigned int bar3;
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unsigned int bar4; /* 0x10 */
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unsigned int bar0;
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unsigned int bar1;
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unsigned int bar2;
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unsigned int bar3;
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unsigned int bar4; /* 0x10 */
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unsigned int ilevel;
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unsigned int ipend;
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unsigned int iforce;
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unsigned int istatus;
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unsigned int iclear;
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unsigned int imask;
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unsigned int ilevel;
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unsigned int ipend;
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unsigned int iforce;
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unsigned int istatus;
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unsigned int iclear;
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unsigned int imask;
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} pci_bridge_regs;
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typedef struct {
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pci_bridge_regs *pcib;
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amba_bridge_regs *ambab;
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pci_bridge_regs *pcib;
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amba_bridge_regs *ambab;
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/* AT697 PCI */
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unsigned int bars[5];
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int bus, dev, fun;
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/* AT697 PCI */
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unsigned int bars[5];
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int bus, dev, fun;
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/* AMBA bus */
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struct ambapp_bus amba_bus;
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struct ambapp_mmap amba_maps[2];
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/* AMBA bus */
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struct ambapp_bus amba_bus;
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struct ambapp_mmap amba_maps[2];
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/* FT AHB SRAM */
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int ftsram_size; /* kb */
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unsigned int ftsram_start;
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unsigned int ftsram_end;
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/* FT AHB SRAM */
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int ftsram_size; /* kb */
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unsigned int ftsram_start;
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unsigned int ftsram_end;
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} cchip1;
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cchip1 cc1;
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int init_pcif(void){
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unsigned int com1;
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int i,bus,dev,fun;
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pci_bridge_regs *pcib;
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amba_bridge_regs *ambab;
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struct ambapp_bus *abus;
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unsigned int com1;
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int i,bus,dev,fun;
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pci_bridge_regs *pcib;
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amba_bridge_regs *ambab;
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struct ambapp_bus *abus;
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if ( BSP_pciFindDevice(0x1AC8, 0x0701, 0, &bus, &dev, &fun) == 0 ) {
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;
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@@ -126,247 +126,247 @@ int init_pcif(void){
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/* found Companionship PCI board, Set it up: */
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pci_read_config_dword(bus, dev, fun, 0x10, &cc1.bars[0]);
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pci_read_config_dword(bus, dev, fun, 0x14, &cc1.bars[1]);
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pci_read_config_dword(bus, dev, fun, 0x18, &cc1.bars[2]);
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pci_read_config_dword(bus, dev, fun, 0x1c, &cc1.bars[3]);
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pci_read_config_dword(bus, dev, fun, 0x20, &cc1.bars[4]);
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pci_read_config_dword(bus, dev, fun, 0x10, &cc1.bars[0]);
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pci_read_config_dword(bus, dev, fun, 0x14, &cc1.bars[1]);
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pci_read_config_dword(bus, dev, fun, 0x18, &cc1.bars[2]);
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pci_read_config_dword(bus, dev, fun, 0x1c, &cc1.bars[3]);
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pci_read_config_dword(bus, dev, fun, 0x20, &cc1.bars[4]);
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#ifdef DEBUG
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for(i=0; i<5; i++){
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printk("PCI: BAR%d: 0x%x\n\r",i,cc1.bars[i]);
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}
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for(i=0; i<5; i++){
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printk("PCI: BAR%d: 0x%x\n\r",i,cc1.bars[i]);
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}
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#endif
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/* Set up PCI ==> AMBA */
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pcib = (void *)cc1.bars[0];
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pcib->bar0 = 0xfc000000;
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/* pcib->bar1 = 0xff000000;*/
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/* Set up PCI ==> AMBA */
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pcib = (void *)cc1.bars[0];
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pcib->bar0 = 0xfc000000;
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/* pcib->bar1 = 0xff000000;*/
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#ifdef BOARD_INFO
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printk("Found CCHIP1 Board at 0x%lx\n\r",(unsigned int)pcib);
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printk("Found CCHIP1 Board at 0x%lx\n\r",(unsigned int)pcib);
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#endif
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/* AMBA MAP cc1.bars[1] (in CPU) ==> 0xf0000000(remote amba address) */
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cc1.amba_maps[0].size = 0x04000000;
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cc1.amba_maps[0].local_adr = cc1.bars[1];
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cc1.amba_maps[0].remote_adr = 0xfc000000;
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/* AMBA MAP cc1.bars[1] (in CPU) ==> 0xf0000000(remote amba address) */
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cc1.amba_maps[0].size = 0x04000000;
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cc1.amba_maps[0].local_adr = cc1.bars[1];
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cc1.amba_maps[0].remote_adr = 0xfc000000;
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/* Mark end of table */
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cc1.amba_maps[1].size=0;
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cc1.amba_maps[1].local_adr = 0;
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cc1.amba_maps[1].remote_adr = 0;
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/* Mark end of table */
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cc1.amba_maps[1].size=0;
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cc1.amba_maps[1].local_adr = 0;
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cc1.amba_maps[1].remote_adr = 0;
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/* Enable I/O and Mem accesses */
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pci_read_config_dword(bus, dev, fun, 0x4, &com1);
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com1 |= 0x3;
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pci_write_config_dword(bus, dev, fun, 0x4, com1);
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pci_read_config_dword(bus, dev, fun, 0x4, &com1);
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/* Enable I/O and Mem accesses */
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pci_read_config_dword(bus, dev, fun, 0x4, &com1);
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com1 |= 0x3;
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pci_write_config_dword(bus, dev, fun, 0x4, com1);
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pci_read_config_dword(bus, dev, fun, 0x4, &com1);
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/* Set up AMBA Masters ==> PCI */
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ambab = (void *)(cc1.bars[1]+0x400);
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/* Set up AMBA Masters ==> PCI */
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ambab = (void *)(cc1.bars[1]+0x400);
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#ifdef DEBUG
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printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",0,ambab->bar0,pcib->bar0);
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printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",1,ambab->bar1,pcib->bar1);
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printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",2,ambab->bar2,pcib->bar2);
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printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",0,ambab->bar0,pcib->bar0);
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printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",1,ambab->bar1,pcib->bar1);
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printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",2,ambab->bar2,pcib->bar2);
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#endif
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/* 0xe0000000(AMBA) ==> 0x40000000(PCI) ==> 0x40000000(AT697 AMBA) */
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ambab->ambabars[0] = 0x40000000;
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/* 0xe0000000(AMBA) ==> 0x40000000(PCI) ==> 0x40000000(AT697 AMBA) */
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ambab->ambabars[0] = 0x40000000;
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/* Scan bus for AMBA devices */
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abus = &cc1.amba_bus;
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memset(abus,0,sizeof(*abus));
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ambapp_scan(abus, cc1.bars[1]+0x3f00000, NULL, &cc1.amba_maps[0]);
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/* Scan bus for AMBA devices */
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abus = &cc1.amba_bus;
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memset(abus,0,sizeof(*abus));
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ambapp_scan(abus, cc1.bars[1]+0x3f00000, NULL, &cc1.amba_maps[0]);
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/* Init all msters, max 16 */
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for(i=1; i<16; i++) {
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ambab->ambabars[i] = 0x40000000;
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if (READ_REG(&ambab->ambabars[i]) != 0x40000000)
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break;
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}
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/* Init all msters, max 16 */
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for(i=1; i<16; i++) {
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ambab->ambabars[i] = 0x40000000;
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if (READ_REG(&ambab->ambabars[i]) != 0x40000000)
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break;
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}
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/* Enable PCI Master */
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/* Enable PCI Master */
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pci_read_config_dword(bus, dev, fun, 0x4, &com1);
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com1 |= 0x4;
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pci_write_config_dword(bus, dev, fun, 0x4, com1);
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pci_read_config_dword(bus, dev, fun, 0x4, &com1);
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cc1.pcib = pcib;
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cc1.ambab = ambab;
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cc1.bus = bus;
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cc1.dev = dev;
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cc1.fun = fun;
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cc1.pcib = pcib;
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cc1.ambab = ambab;
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cc1.bus = bus;
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cc1.dev = dev;
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cc1.fun = fun;
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return 0;
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return 0;
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}
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#ifndef GAISLER_FTAHBRAM
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#define GAISLER_FTAHBRAM 0x50
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#endif
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int init_onboard_sram(void){
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struct ambapp_ahb_info ahb;
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struct ambapp_apb_info apb;
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unsigned int conf, size;
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struct ambapp_ahb_info ahb;
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struct ambapp_apb_info apb;
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unsigned int conf, size;
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/* Find SRAM controller
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* 1. AHB slave interface
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* 2. APB slave interface
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*/
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if ( ambapp_find_apbslv(&cc1.amba_bus, VENDOR_GAISLER, GAISLER_FTAHBRAM,
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&apb) != 1 ){
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printk("On Board FT SRAM not found (APB)\n");
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return -1;
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}
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/* Find SRAM controller
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* 1. AHB slave interface
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* 2. APB slave interface
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*/
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if ( ambapp_find_apbslv(&cc1.amba_bus, VENDOR_GAISLER,
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GAISLER_FTAHBRAM, &apb) != 1 ){
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printk("On Board FT SRAM not found (APB)\n");
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return -1;
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}
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if ( ambapp_find_ahbslv(&cc1.amba_bus, VENDOR_GAISLER, GAISLER_FTAHBRAM,
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&ahb) != 1 ){
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printk("On Board FT SRAM not found (AHB)\n");
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return -1;
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}
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if ( ambapp_find_ahbslv(&cc1.amba_bus, VENDOR_GAISLER,
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GAISLER_FTAHBRAM, &ahb) != 1 ){
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printk("On Board FT SRAM not found (AHB)\n");
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return -1;
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}
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/* We have found the controller.
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* Get it going.
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*
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* Get size of SRAM
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*/
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conf = *(unsigned int *)apb.start;
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size = (conf >>10) & 0x7;
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/* We have found the controller.
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* Get it going.
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*
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* Get size of SRAM
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*/
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conf = *(unsigned int *)apb.start;
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size = (conf >>10) & 0x7;
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/* 2^x kb */
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cc1.ftsram_size = 1<<size;
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cc1.ftsram_start = ahb.start[0];
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cc1.ftsram_end = size*1024 + cc1.ftsram_start;
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/* 2^x kb */
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cc1.ftsram_size = 1<<size;
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cc1.ftsram_start = ahb.start[0];
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cc1.ftsram_end = size*1024 + cc1.ftsram_start;
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#ifdef BOARD_INFO
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printk("Found FT AHB SRAM %dkb at 0x%lx\n",cc1.ftsram_size,cc1.ftsram_start);
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printk("Found FT AHB SRAM %dkb at 0x%lx\n",cc1.ftsram_size,cc1.ftsram_start);
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#endif
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return 0;
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return 0;
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}
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int cchip1_register(void){
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/* Init AT697 PCI Controller */
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init_pci();
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/* Init AT697 PCI Controller */
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init_pci();
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/* Find & init CChip board .
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* Also scan AMBA Plug&Play info for us.
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*/
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if ( init_pcif() ){
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printk("Failed to initialize CCHIP board\n\r");
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return -1;
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}
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/* Find & init CChip board .
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* Also scan AMBA Plug&Play info for us.
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*/
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if ( init_pcif() ){
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printk("Failed to initialize CCHIP board\n\r");
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return -1;
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}
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/* Set interrupt common board stuff */
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cchip1_irq_init();
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/* Set interrupt common board stuff */
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cchip1_irq_init();
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/* Find on board SRAM */
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if ( init_onboard_sram() ){
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printk("Failed to register On Board SRAM. It is needed by b1553BRM\n");
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return -1;
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}
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/* Find on board SRAM */
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if ( init_onboard_sram() ){
|
||||
printk("Failed to register On Board SRAM. It is needed by b1553BRM\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* Register interrupt install functions */
|
||||
b1553brm_pci_int_reg = cchip1_set_isr;
|
||||
occan_pci_int_reg = cchip1_set_isr;
|
||||
grspw_pci_int_reg = cchip1_set_isr;
|
||||
apbuart_pci_int_reg = cchip1_set_isr;
|
||||
/* Register interrupt install functions */
|
||||
b1553brm_pci_int_reg = cchip1_set_isr;
|
||||
occan_pci_int_reg = cchip1_set_isr;
|
||||
grspw_pci_int_reg = cchip1_set_isr;
|
||||
apbuart_pci_int_reg = cchip1_set_isr;
|
||||
|
||||
/* register the BRM PCI driver, use 16k FTSRAM... */
|
||||
if ( b1553brm_pci_register(&cc1.amba_bus,0,0,3,cc1.ftsram_start,0xffa00000) ){
|
||||
printk("Failed to register BRM PCI driver\n");
|
||||
return -1;
|
||||
}
|
||||
/* register the BRM PCI driver, use 16k FTSRAM... */
|
||||
if ( b1553brm_pci_register(&cc1.amba_bus,0,0,3,cc1.ftsram_start,0xffa00000) ){
|
||||
printk("Failed to register BRM PCI driver\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* register the BRM PCI driver, no DMA memory... */
|
||||
if ( occan_pci_register(&cc1.amba_bus) ){
|
||||
printk("Failed to register OC_CAN PCI driver\n");
|
||||
return -1;
|
||||
}
|
||||
/* register the BRM PCI driver, no DMA memory... */
|
||||
if ( occan_pci_register(&cc1.amba_bus) ){
|
||||
printk("Failed to register OC_CAN PCI driver\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* register the GRSPW PCI driver, use malloc... */
|
||||
if ( grspw_pci_register(&cc1.amba_bus,0,0xe0000000) ){
|
||||
printk("Failed to register GRSPW PCI driver\n");
|
||||
return -1;
|
||||
}
|
||||
/* register the GRSPW PCI driver, use malloc... */
|
||||
if ( grspw_pci_register(&cc1.amba_bus,0,0xe0000000) ){
|
||||
printk("Failed to register GRSPW PCI driver\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* register the APBUART PCI driver, no DMA memory */
|
||||
if ( apbuart_pci_register(&cc1.amba_bus) ){
|
||||
printk("Failed to register APBUART PCI driver\n");
|
||||
return -1;
|
||||
}
|
||||
/* register the APBUART PCI driver, no DMA memory */
|
||||
if ( apbuart_pci_register(&cc1.amba_bus) ){
|
||||
printk("Failed to register APBUART PCI driver\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static rtems_isr cchip1_interrupt_dispatcher(rtems_vector_number v);
|
||||
static unsigned int cchip1_spurious_cnt;
|
||||
|
||||
typedef struct {
|
||||
unsigned int (*handler)(int irqno, void *arg);
|
||||
void *arg;
|
||||
unsigned int (*handler)(int irqno, void *arg);
|
||||
void *arg;
|
||||
} int_handler;
|
||||
|
||||
static int_handler int_handlers[16];
|
||||
|
||||
void cchip1_irq_init(void){
|
||||
|
||||
/* Configure AT697 ioport bit 7 to input pci irq */
|
||||
/* Configure AT697 ioport bit 7 to input pci irq */
|
||||
regs->PIO_Direction &= ~(1<<7);
|
||||
regs->PIO_Interrupt = 0x87; /* level sensitive */
|
||||
|
||||
/* Set up irq controller (mask all IRQs) */
|
||||
cc1.pcib->imask = 0x0000;
|
||||
cc1.pcib->ipend = 0;
|
||||
cc1.pcib->iclear = 0xffff;
|
||||
cc1.pcib->iforce = 0;
|
||||
cc1.pcib->ilevel = 0x0;
|
||||
cc1.pcib->imask = 0x0000;
|
||||
cc1.pcib->ipend = 0;
|
||||
cc1.pcib->iclear = 0xffff;
|
||||
cc1.pcib->iforce = 0;
|
||||
cc1.pcib->ilevel = 0x0;
|
||||
|
||||
memset(int_handlers,0,sizeof(int_handlers));
|
||||
memset(int_handlers,0,sizeof(int_handlers));
|
||||
|
||||
/* Reset spurious counter */
|
||||
cchip1_spurious_cnt = 0;
|
||||
/* Reset spurious counter */
|
||||
cchip1_spurious_cnt = 0;
|
||||
|
||||
/* Register interrupt handler */
|
||||
set_vector(cchip1_interrupt_dispatcher,LEON_TRAP_TYPE(CCHIP_IRQ),1);
|
||||
/* Register interrupt handler */
|
||||
set_vector(cchip1_interrupt_dispatcher,LEON_TRAP_TYPE(CCHIP_IRQ),1);
|
||||
}
|
||||
|
||||
void cchip1_set_isr(void *handler, int irqno, void *arg){
|
||||
int_handlers[irqno].handler = handler;
|
||||
int_handlers[irqno].arg = arg;
|
||||
int_handlers[irqno].handler = handler;
|
||||
int_handlers[irqno].arg = arg;
|
||||
#ifdef DEBUG
|
||||
printk("Registering IRQ %d to 0x%lx(%d,0x%lx)\n\r",
|
||||
irqno,(unsigned int)handler,irqno,(unsigned int)arg);
|
||||
printk("Registering IRQ %d to 0x%lx(%d,0x%lx)\n\r",
|
||||
irqno,(unsigned int)handler,irqno,(unsigned int)arg);
|
||||
#endif
|
||||
cc1.pcib->imask |= 1<<irqno; /* Enable the registered IRQ */
|
||||
cc1.pcib->imask |= 1<<irqno; /* Enable the registered IRQ */
|
||||
}
|
||||
|
||||
static rtems_isr cchip1_interrupt_dispatcher(rtems_vector_number v){
|
||||
unsigned int pending = READ_REG(&cc1.pcib->ipend);
|
||||
unsigned int (*handler)(int irqno, void *arg);
|
||||
unsigned int clr = pending;
|
||||
int irq=1;
|
||||
unsigned int pending = READ_REG(&cc1.pcib->ipend);
|
||||
unsigned int (*handler)(int irqno, void *arg);
|
||||
unsigned int clr = pending;
|
||||
int irq=1;
|
||||
|
||||
if ( !pending ){
|
||||
if ( !pending ){
|
||||
#ifdef PRINT_SPURIOUS
|
||||
printk("Spurious IRQ %d: %d\n",v,cchip1_spurious_cnt);
|
||||
printk("Spurious IRQ %d: %d\n",v,cchip1_spurious_cnt);
|
||||
#endif
|
||||
cchip1_spurious_cnt++;
|
||||
return;
|
||||
}
|
||||
cchip1_spurious_cnt++;
|
||||
return;
|
||||
}
|
||||
#ifdef DEBUG_IRQS
|
||||
printk("CCIRQ: 0x%x\n",(unsigned int)pending);
|
||||
#endif
|
||||
/* IRQ 0 doesn't exist */
|
||||
irq=1;
|
||||
pending = pending>>1;
|
||||
/* IRQ 0 doesn't exist */
|
||||
irq=1;
|
||||
pending = pending>>1;
|
||||
|
||||
while ( pending ){
|
||||
if ( (pending & 1) && (handler=int_handlers[irq].handler) ){
|
||||
handler(irq,int_handlers[irq].arg);
|
||||
}
|
||||
irq++;
|
||||
pending = pending>>1;
|
||||
}
|
||||
while ( pending ){
|
||||
if ( (pending & 1) && (handler=int_handlers[irq].handler) ){
|
||||
handler(irq,int_handlers[irq].arg);
|
||||
}
|
||||
irq++;
|
||||
pending = pending>>1;
|
||||
}
|
||||
|
||||
cc1.pcib->iclear = clr;
|
||||
cc1.pcib->iclear = clr;
|
||||
|
||||
/*LEON_Clear_interrupt( brd->irq );*/
|
||||
/*LEON_Clear_interrupt( brd->irq );*/
|
||||
}
|
||||
|
||||
@@ -47,7 +47,7 @@ extern int CLOCK_SPEED;
|
||||
#define Clock_driver_support_initialize_hardware() \
|
||||
do { \
|
||||
LEON_REG.Timer_Reload_1 = \
|
||||
rtems_configuration_get_microseconds_per_tick() - 1; \
|
||||
rtems_configuration_get_microseconds_per_tick() - 1; \
|
||||
\
|
||||
LEON_REG.Timer_Control_1 = ( \
|
||||
LEON_REG_TIMER_COUNTER_ENABLE_COUNTING | \
|
||||
|
||||
@@ -322,7 +322,7 @@ rtems_device_driver console_initialize(
|
||||
|
||||
LEON_REG.UART_Control_1 |= LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE;
|
||||
LEON_REG.UART_Control_2 |= LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE |
|
||||
LEON_REG_UART_CTRL_RI; /* rx irq default enable for remote debugger */
|
||||
LEON_REG_UART_CTRL_RI; /* rx irq default enable for remote debugger */
|
||||
LEON_REG.UART_Status_1 = 0;
|
||||
LEON_REG.UART_Status_2 = 0;
|
||||
#if (CONSOLE_USE_INTERRUPTS)
|
||||
|
||||
@@ -69,7 +69,7 @@ extern int rtems_leon_open_eth_driver_attach(
|
||||
extern int rtems_smc91111_driver_attach_leon2(
|
||||
struct rtems_bsdnet_ifconfig *config
|
||||
);
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_NAME "open_eth1"
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_NAME "open_eth1"
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_OPENETH \
|
||||
rtems_leon_open_eth_driver_attach
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_SMC91111 \
|
||||
|
||||
@@ -102,49 +102,49 @@ extern "C" {
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
volatile unsigned int Memory_Config_1;
|
||||
volatile unsigned int Memory_Config_2;
|
||||
volatile unsigned int Edac_Control;
|
||||
volatile unsigned int Failed_Address;
|
||||
volatile unsigned int Memory_Status;
|
||||
volatile unsigned int Cache_Control;
|
||||
volatile unsigned int Power_Down;
|
||||
volatile unsigned int Write_Protection_1;
|
||||
volatile unsigned int Write_Protection_2;
|
||||
volatile unsigned int Leon_Configuration;
|
||||
volatile unsigned int dummy2;
|
||||
volatile unsigned int dummy3;
|
||||
volatile unsigned int dummy4;
|
||||
volatile unsigned int dummy5;
|
||||
volatile unsigned int dummy6;
|
||||
volatile unsigned int dummy7;
|
||||
volatile unsigned int Timer_Counter_1;
|
||||
volatile unsigned int Timer_Reload_1;
|
||||
volatile unsigned int Timer_Control_1;
|
||||
volatile unsigned int Watchdog;
|
||||
volatile unsigned int Timer_Counter_2;
|
||||
volatile unsigned int Timer_Reload_2;
|
||||
volatile unsigned int Timer_Control_2;
|
||||
volatile unsigned int dummy8;
|
||||
volatile unsigned int Scaler_Counter;
|
||||
volatile unsigned int Scaler_Reload;
|
||||
volatile unsigned int dummy9;
|
||||
volatile unsigned int dummy10;
|
||||
volatile unsigned int UART_Channel_1;
|
||||
volatile unsigned int UART_Status_1;
|
||||
volatile unsigned int UART_Control_1;
|
||||
volatile unsigned int UART_Scaler_1;
|
||||
volatile unsigned int UART_Channel_2;
|
||||
volatile unsigned int UART_Status_2;
|
||||
volatile unsigned int UART_Control_2;
|
||||
volatile unsigned int UART_Scaler_2;
|
||||
volatile unsigned int Interrupt_Mask;
|
||||
volatile unsigned int Interrupt_Pending;
|
||||
volatile unsigned int Interrupt_Force;
|
||||
volatile unsigned int Interrupt_Clear;
|
||||
volatile unsigned int PIO_Data;
|
||||
volatile unsigned int PIO_Direction;
|
||||
volatile unsigned int PIO_Interrupt;
|
||||
volatile unsigned int Memory_Config_1;
|
||||
volatile unsigned int Memory_Config_2;
|
||||
volatile unsigned int Edac_Control;
|
||||
volatile unsigned int Failed_Address;
|
||||
volatile unsigned int Memory_Status;
|
||||
volatile unsigned int Cache_Control;
|
||||
volatile unsigned int Power_Down;
|
||||
volatile unsigned int Write_Protection_1;
|
||||
volatile unsigned int Write_Protection_2;
|
||||
volatile unsigned int Leon_Configuration;
|
||||
volatile unsigned int dummy2;
|
||||
volatile unsigned int dummy3;
|
||||
volatile unsigned int dummy4;
|
||||
volatile unsigned int dummy5;
|
||||
volatile unsigned int dummy6;
|
||||
volatile unsigned int dummy7;
|
||||
volatile unsigned int Timer_Counter_1;
|
||||
volatile unsigned int Timer_Reload_1;
|
||||
volatile unsigned int Timer_Control_1;
|
||||
volatile unsigned int Watchdog;
|
||||
volatile unsigned int Timer_Counter_2;
|
||||
volatile unsigned int Timer_Reload_2;
|
||||
volatile unsigned int Timer_Control_2;
|
||||
volatile unsigned int dummy8;
|
||||
volatile unsigned int Scaler_Counter;
|
||||
volatile unsigned int Scaler_Reload;
|
||||
volatile unsigned int dummy9;
|
||||
volatile unsigned int dummy10;
|
||||
volatile unsigned int UART_Channel_1;
|
||||
volatile unsigned int UART_Status_1;
|
||||
volatile unsigned int UART_Control_1;
|
||||
volatile unsigned int UART_Scaler_1;
|
||||
volatile unsigned int UART_Channel_2;
|
||||
volatile unsigned int UART_Status_2;
|
||||
volatile unsigned int UART_Control_2;
|
||||
volatile unsigned int UART_Scaler_2;
|
||||
volatile unsigned int Interrupt_Mask;
|
||||
volatile unsigned int Interrupt_Pending;
|
||||
volatile unsigned int Interrupt_Force;
|
||||
volatile unsigned int Interrupt_Clear;
|
||||
volatile unsigned int PIO_Data;
|
||||
volatile unsigned int PIO_Direction;
|
||||
volatile unsigned int PIO_Interrupt;
|
||||
} LEON_Register_Map;
|
||||
|
||||
#endif
|
||||
@@ -396,9 +396,9 @@ static __inline__ int bsp_irq_fixup(int irq)
|
||||
/* Load 32-bit word by forcing a cache-miss */
|
||||
static inline unsigned int leon_r32_no_cache(uintptr_t addr)
|
||||
{
|
||||
unsigned int tmp;
|
||||
__asm__ volatile (" lda [%1] 1, %0\n" : "=r"(tmp) : "r"(addr));
|
||||
return tmp;
|
||||
unsigned int tmp;
|
||||
__asm__ volatile (" lda [%1] 1, %0\n" : "=r"(tmp) : "r"(addr));
|
||||
return tmp;
|
||||
}
|
||||
|
||||
#endif /* !ASM */
|
||||
|
||||
@@ -100,18 +100,18 @@ struct uart_reg {
|
||||
|
||||
|
||||
void uart_register(unsigned int baseaddr);
|
||||
rtems_device_driver uart_initialize(rtems_device_major_number major,
|
||||
rtems_device_minor_number minor, void *arg);
|
||||
rtems_device_driver uart_initialize(rtems_device_major_number major,
|
||||
rtems_device_minor_number minor, void *arg);
|
||||
rtems_device_driver uart_open(rtems_device_major_number major,
|
||||
rtems_device_minor_number minor, void *arg);
|
||||
rtems_device_minor_number minor, void *arg);
|
||||
rtems_device_driver uart_close(rtems_device_major_number major,
|
||||
rtems_device_minor_number minor, void *arg);
|
||||
rtems_device_minor_number minor, void *arg);
|
||||
rtems_device_driver uart_read(rtems_device_major_number major,
|
||||
rtems_device_minor_number minor, void *arg);
|
||||
rtems_device_minor_number minor, void *arg);
|
||||
rtems_device_driver uart_write(rtems_device_major_number major,
|
||||
rtems_device_minor_number minor, void *arg);
|
||||
rtems_device_minor_number minor, void *arg);
|
||||
rtems_device_driver uart_control(rtems_device_major_number major,
|
||||
rtems_device_minor_number minor, void *arg);
|
||||
rtems_device_minor_number minor, void *arg);
|
||||
|
||||
|
||||
struct gpio_reg {
|
||||
|
||||
@@ -345,7 +345,7 @@ int rasta_register(void)
|
||||
/*brm_register(bar0 + BRM_OFFSET, bar1);*/
|
||||
/* register the BRM RASTA driver, use 128k on RASTA SRAM... */
|
||||
b1553brm_rasta_int_reg=rasta_interrrupt_register;
|
||||
if ( b1553brm_rasta_register(&abus,2,0,3,bar1,0x40000000) ){
|
||||
if ( b1553brm_rasta_register(&abus,2,0,3,bar1,0x40000000) ){
|
||||
printk("Failed to register BRM RASTA driver\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
@@ -148,8 +148,8 @@ void bsp_spurious_initialize()
|
||||
*/
|
||||
|
||||
if (( trap == 5 || trap == 6 ) ||
|
||||
(( trap >= 0x11 ) && ( trap <= 0x1f )) ||
|
||||
(( trap >= 0x70 ) && ( trap <= 0x83 )))
|
||||
(( trap >= 0x11 ) && ( trap <= 0x1f )) ||
|
||||
(( trap >= 0x70 ) && ( trap <= 0x83 )))
|
||||
continue;
|
||||
|
||||
set_vector(
|
||||
|
||||
@@ -79,13 +79,13 @@ extern int rtems_leon_greth_driver_attach(
|
||||
int attach
|
||||
);
|
||||
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_NAME_OPENETH "open_eth1"
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_OPENETH \
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_NAME_OPENETH "open_eth1"
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_OPENETH \
|
||||
rtems_leon_open_eth_driver_attach
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_NAME_SMC91111 "smc_eth1"
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_NAME_SMC91111 "smc_eth1"
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_SMC91111 \
|
||||
rtems_smc91111_driver_attach_leon3
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_NAME_GRETH "gr_eth1"
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_NAME_GRETH "gr_eth1"
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_GRETH \
|
||||
rtems_leon_greth_driver_attach
|
||||
|
||||
|
||||
@@ -287,9 +287,9 @@ extern rtems_interrupt_lock LEON3_IrqCtrl_Lock;
|
||||
/* Load 32-bit word by forcing a cache-miss */
|
||||
static inline unsigned int leon_r32_no_cache(uintptr_t addr)
|
||||
{
|
||||
unsigned int tmp;
|
||||
__asm__ volatile (" lda [%1] 1, %0\n" : "=r"(tmp) : "r"(addr));
|
||||
return tmp;
|
||||
unsigned int tmp;
|
||||
__asm__ volatile (" lda [%1] 1, %0\n" : "=r"(tmp) : "r"(addr));
|
||||
return tmp;
|
||||
}
|
||||
|
||||
/* Let user override which on-chip APBUART will be debug UART
|
||||
|
||||
@@ -36,7 +36,7 @@ scmv91111_configuration_t leon_scmv91111_configuration = {
|
||||
*/
|
||||
int
|
||||
rtems_smc91111_driver_attach_leon3 (struct rtems_bsdnet_ifconfig *config,
|
||||
int attach)
|
||||
int attach)
|
||||
{
|
||||
unsigned long addr_mctrl = 0;
|
||||
struct grgpio_regs *io;
|
||||
@@ -70,10 +70,8 @@ rtems_smc91111_driver_attach_leon3 (struct rtems_bsdnet_ifconfig *config,
|
||||
addr_mctrl = (unsigned long) apbmctrl.start;
|
||||
io = (struct grgpio_regs *) apbpio.start;
|
||||
|
||||
printk(
|
||||
"Activating Leon3 io port for smsc_lan91cxx (pio:%x mctrl:%x)\n",
|
||||
(unsigned int)io,
|
||||
(unsigned int)addr_mctrl);
|
||||
printk("Activating Leon3 io port for smsc_lan91cxx (pio:%x mctrl:%x)\n",
|
||||
(unsigned int)io, (unsigned int)addr_mctrl);
|
||||
|
||||
/* Setup PIO IRQ */
|
||||
io->imask |= (1 << leon_scmv91111_configuration.pio);
|
||||
@@ -83,7 +81,7 @@ rtems_smc91111_driver_attach_leon3 (struct rtems_bsdnet_ifconfig *config,
|
||||
|
||||
/* Setup memory controller I/O waitstates */
|
||||
*((volatile unsigned int *) addr_mctrl) |=
|
||||
0x10f80000; /* enable I/O area access */
|
||||
0x10f80000; /* enable I/O area access */
|
||||
|
||||
return _rtems_smc91111_driver_attach(config, &leon_scmv91111_configuration);
|
||||
};
|
||||
|
||||
@@ -44,9 +44,9 @@ extern unsigned int LEON3_Atomic_Swap(uint32_t value, uint32_t *address);
|
||||
__asm__ (
|
||||
".text\n"
|
||||
".align 4\n"
|
||||
"LEON3_Atomic_Swap:\n"
|
||||
" retl\n"
|
||||
" swapa [%o1] 1, %o0\n"
|
||||
"LEON3_Atomic_Swap:\n"
|
||||
" retl\n"
|
||||
" swapa [%o1] 1, %o0\n"
|
||||
);
|
||||
|
||||
|
||||
|
||||
@@ -152,8 +152,8 @@ void bsp_spurious_initialize()
|
||||
*/
|
||||
|
||||
if (( trap == 5 || trap == 6 ) ||
|
||||
(( trap >= 0x11 ) && ( trap <= 0x1f )) ||
|
||||
(( trap >= 0x70 ) && ( trap <= 0x83 )))
|
||||
(( trap >= 0x11 ) && ( trap <= 0x1f )) ||
|
||||
(( trap >= 0x70 ) && ( trap <= 0x83 )))
|
||||
continue;
|
||||
|
||||
set_vector(
|
||||
|
||||
Reference in New Issue
Block a user