bsps/sparc: Change tabs to spaces.

This commit is contained in:
Daniel Cederman
2014-05-08 17:08:04 +02:00
committed by Daniel Hellstrom
parent c903fc28a9
commit 9f058fb1c2
18 changed files with 291 additions and 293 deletions

View File

@@ -82,14 +82,14 @@ static CPU_Counter_ticks erc32_counter_difference(
rtems_configuration_get_microseconds_per_tick(); \
\
ERC32_MEC_Set_Real_Time_Clock_Timer_Control( \
ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | \
ERC32_MEC_TIMER_COUNTER_LOAD_SCALER | \
ERC32_MEC_TIMER_COUNTER_LOAD_COUNTER \
ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | \
ERC32_MEC_TIMER_COUNTER_LOAD_SCALER | \
ERC32_MEC_TIMER_COUNTER_LOAD_COUNTER \
); \
\
ERC32_MEC_Set_Real_Time_Clock_Timer_Control( \
ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | \
ERC32_MEC_TIMER_COUNTER_RELOAD_AT_ZERO \
ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | \
ERC32_MEC_TIMER_COUNTER_RELOAD_AT_ZERO \
); \
_SPARC_Counter_initialize( \
&ERC32_MEC.Real_Time_Clock_Counter, \

View File

@@ -148,7 +148,7 @@ static int erc32_console_first_open(int major, int minor, void *arg)
#if (CONSOLE_USE_INTERRUPTS)
static ssize_t erc32_console_write_support_int(
int minor, const char *buf, size_t len)
int minor, const char *buf, size_t len)
{
if (len > 0) {
console_data *cd = &Console_Port_Data[minor];
@@ -264,7 +264,7 @@ static void erc32_console_isr_b(
buf[i] = ERC32_MEC.UART_Channel_B;
++i;
}
if ( i )
if ( i )
rtems_termios_enqueue_raw_characters(cd->termios_data, buf, i);
/* dequeue transmitted chars */

View File

@@ -112,9 +112,9 @@ int rtems_erc32_sonic_driver_attach(struct rtems_bsdnet_ifconfig *config)
{
ERC32_MEC.IO_Configuration |=
(0x15 << (((SONIC_BASE_ADDRESS >> 24) & 0x3) * 8));
(0x15 << (((SONIC_BASE_ADDRESS >> 24) & 0x3) * 8));
ERC32_MEC.Control &= ~0x60001; /* Disable DMA time-out, parity & power-down */
ERC32_MEC.Control |= 0x10000; /* Enable DMA */
ERC32_MEC.Control |= 0x10000; /* Enable DMA */
ERC32_MEC.Interrupt_Mask &= ~(1 << (SONIC_VECTOR - 0x10));
return(rtems_sonic_driver_attach( config, &erc32_sonic_configuration ));

View File

@@ -63,8 +63,8 @@ struct rtems_bsdnet_ifconfig;
extern int rtems_erc32_sonic_driver_attach(
struct rtems_bsdnet_ifconfig *config
);
#define RTEMS_BSP_NETWORK_DRIVER_NAME "sonic1"
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_erc32_sonic_driver_attach
#define RTEMS_BSP_NETWORK_DRIVER_NAME "sonic1"
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_erc32_sonic_driver_attach
/* Constants */

View File

@@ -160,9 +160,9 @@ void bsp_spurious_initialize()
* paramaters to the program.
*/
if (( trap == 5 || trap == 6 ) ||
(( trap >= 0x11 ) && ( trap <= 0x1f )) ||
(( trap >= 0x70 ) && ( trap <= 0x83 )))
if (( trap == 5 || trap == 6 ) ||
(( trap >= 0x11 ) && ( trap <= 0x1f )) ||
(( trap >= 0x70 ) && ( trap <= 0x83 )))
continue;
set_vector( (rtems_isr_entry) bsp_spurious_handler,

View File

@@ -50,70 +50,70 @@ void cchip1_set_isr(void *handler, int irqno, void *arg);
#define READ_REG(address) _READ_REG((unsigned int)address)
static __inline__ unsigned int _READ_REG(unsigned int addr) {
unsigned int tmp;
__asm__ ("lda [%1]1, %0 "
: "=r"(tmp)
: "r"(addr)
);
return tmp;
unsigned int tmp;
__asm__ ("lda [%1]1, %0 "
: "=r"(tmp)
: "r"(addr)
);
return tmp;
}
/* PCI bride reg layout on AMBA side */
typedef struct {
unsigned int bar0;
unsigned int bar1;
unsigned int bar2;
unsigned int bar3;
unsigned int bar4;/* 0x10 */
unsigned int bar0;
unsigned int bar1;
unsigned int bar2;
unsigned int bar3;
unsigned int bar4;/* 0x10 */
unsigned int unused[4*3-1];
unsigned int unused[4*3-1];
unsigned int ambabars[1]; /* 0x40 */
unsigned int ambabars[1]; /* 0x40 */
} amba_bridge_regs;
/* PCI bride reg layout on PCI side */
typedef struct {
unsigned int bar0;
unsigned int bar1;
unsigned int bar2;
unsigned int bar3;
unsigned int bar4; /* 0x10 */
unsigned int bar0;
unsigned int bar1;
unsigned int bar2;
unsigned int bar3;
unsigned int bar4; /* 0x10 */
unsigned int ilevel;
unsigned int ipend;
unsigned int iforce;
unsigned int istatus;
unsigned int iclear;
unsigned int imask;
unsigned int ilevel;
unsigned int ipend;
unsigned int iforce;
unsigned int istatus;
unsigned int iclear;
unsigned int imask;
} pci_bridge_regs;
typedef struct {
pci_bridge_regs *pcib;
amba_bridge_regs *ambab;
pci_bridge_regs *pcib;
amba_bridge_regs *ambab;
/* AT697 PCI */
unsigned int bars[5];
int bus, dev, fun;
/* AT697 PCI */
unsigned int bars[5];
int bus, dev, fun;
/* AMBA bus */
struct ambapp_bus amba_bus;
struct ambapp_mmap amba_maps[2];
/* AMBA bus */
struct ambapp_bus amba_bus;
struct ambapp_mmap amba_maps[2];
/* FT AHB SRAM */
int ftsram_size; /* kb */
unsigned int ftsram_start;
unsigned int ftsram_end;
/* FT AHB SRAM */
int ftsram_size; /* kb */
unsigned int ftsram_start;
unsigned int ftsram_end;
} cchip1;
cchip1 cc1;
int init_pcif(void){
unsigned int com1;
int i,bus,dev,fun;
pci_bridge_regs *pcib;
amba_bridge_regs *ambab;
struct ambapp_bus *abus;
unsigned int com1;
int i,bus,dev,fun;
pci_bridge_regs *pcib;
amba_bridge_regs *ambab;
struct ambapp_bus *abus;
if ( BSP_pciFindDevice(0x1AC8, 0x0701, 0, &bus, &dev, &fun) == 0 ) {
;
@@ -126,247 +126,247 @@ int init_pcif(void){
/* found Companionship PCI board, Set it up: */
pci_read_config_dword(bus, dev, fun, 0x10, &cc1.bars[0]);
pci_read_config_dword(bus, dev, fun, 0x14, &cc1.bars[1]);
pci_read_config_dword(bus, dev, fun, 0x18, &cc1.bars[2]);
pci_read_config_dword(bus, dev, fun, 0x1c, &cc1.bars[3]);
pci_read_config_dword(bus, dev, fun, 0x20, &cc1.bars[4]);
pci_read_config_dword(bus, dev, fun, 0x10, &cc1.bars[0]);
pci_read_config_dword(bus, dev, fun, 0x14, &cc1.bars[1]);
pci_read_config_dword(bus, dev, fun, 0x18, &cc1.bars[2]);
pci_read_config_dword(bus, dev, fun, 0x1c, &cc1.bars[3]);
pci_read_config_dword(bus, dev, fun, 0x20, &cc1.bars[4]);
#ifdef DEBUG
for(i=0; i<5; i++){
printk("PCI: BAR%d: 0x%x\n\r",i,cc1.bars[i]);
}
for(i=0; i<5; i++){
printk("PCI: BAR%d: 0x%x\n\r",i,cc1.bars[i]);
}
#endif
/* Set up PCI ==> AMBA */
pcib = (void *)cc1.bars[0];
pcib->bar0 = 0xfc000000;
/* pcib->bar1 = 0xff000000;*/
/* Set up PCI ==> AMBA */
pcib = (void *)cc1.bars[0];
pcib->bar0 = 0xfc000000;
/* pcib->bar1 = 0xff000000;*/
#ifdef BOARD_INFO
printk("Found CCHIP1 Board at 0x%lx\n\r",(unsigned int)pcib);
printk("Found CCHIP1 Board at 0x%lx\n\r",(unsigned int)pcib);
#endif
/* AMBA MAP cc1.bars[1] (in CPU) ==> 0xf0000000(remote amba address) */
cc1.amba_maps[0].size = 0x04000000;
cc1.amba_maps[0].local_adr = cc1.bars[1];
cc1.amba_maps[0].remote_adr = 0xfc000000;
/* AMBA MAP cc1.bars[1] (in CPU) ==> 0xf0000000(remote amba address) */
cc1.amba_maps[0].size = 0x04000000;
cc1.amba_maps[0].local_adr = cc1.bars[1];
cc1.amba_maps[0].remote_adr = 0xfc000000;
/* Mark end of table */
cc1.amba_maps[1].size=0;
cc1.amba_maps[1].local_adr = 0;
cc1.amba_maps[1].remote_adr = 0;
/* Mark end of table */
cc1.amba_maps[1].size=0;
cc1.amba_maps[1].local_adr = 0;
cc1.amba_maps[1].remote_adr = 0;
/* Enable I/O and Mem accesses */
pci_read_config_dword(bus, dev, fun, 0x4, &com1);
com1 |= 0x3;
pci_write_config_dword(bus, dev, fun, 0x4, com1);
pci_read_config_dword(bus, dev, fun, 0x4, &com1);
/* Enable I/O and Mem accesses */
pci_read_config_dword(bus, dev, fun, 0x4, &com1);
com1 |= 0x3;
pci_write_config_dword(bus, dev, fun, 0x4, com1);
pci_read_config_dword(bus, dev, fun, 0x4, &com1);
/* Set up AMBA Masters ==> PCI */
ambab = (void *)(cc1.bars[1]+0x400);
/* Set up AMBA Masters ==> PCI */
ambab = (void *)(cc1.bars[1]+0x400);
#ifdef DEBUG
printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",0,ambab->bar0,pcib->bar0);
printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",1,ambab->bar1,pcib->bar1);
printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",2,ambab->bar2,pcib->bar2);
printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",0,ambab->bar0,pcib->bar0);
printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",1,ambab->bar1,pcib->bar1);
printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",2,ambab->bar2,pcib->bar2);
#endif
/* 0xe0000000(AMBA) ==> 0x40000000(PCI) ==> 0x40000000(AT697 AMBA) */
ambab->ambabars[0] = 0x40000000;
/* 0xe0000000(AMBA) ==> 0x40000000(PCI) ==> 0x40000000(AT697 AMBA) */
ambab->ambabars[0] = 0x40000000;
/* Scan bus for AMBA devices */
abus = &cc1.amba_bus;
memset(abus,0,sizeof(*abus));
ambapp_scan(abus, cc1.bars[1]+0x3f00000, NULL, &cc1.amba_maps[0]);
/* Scan bus for AMBA devices */
abus = &cc1.amba_bus;
memset(abus,0,sizeof(*abus));
ambapp_scan(abus, cc1.bars[1]+0x3f00000, NULL, &cc1.amba_maps[0]);
/* Init all msters, max 16 */
for(i=1; i<16; i++) {
ambab->ambabars[i] = 0x40000000;
if (READ_REG(&ambab->ambabars[i]) != 0x40000000)
break;
}
/* Init all msters, max 16 */
for(i=1; i<16; i++) {
ambab->ambabars[i] = 0x40000000;
if (READ_REG(&ambab->ambabars[i]) != 0x40000000)
break;
}
/* Enable PCI Master */
/* Enable PCI Master */
pci_read_config_dword(bus, dev, fun, 0x4, &com1);
com1 |= 0x4;
pci_write_config_dword(bus, dev, fun, 0x4, com1);
pci_read_config_dword(bus, dev, fun, 0x4, &com1);
cc1.pcib = pcib;
cc1.ambab = ambab;
cc1.bus = bus;
cc1.dev = dev;
cc1.fun = fun;
cc1.pcib = pcib;
cc1.ambab = ambab;
cc1.bus = bus;
cc1.dev = dev;
cc1.fun = fun;
return 0;
return 0;
}
#ifndef GAISLER_FTAHBRAM
#define GAISLER_FTAHBRAM 0x50
#endif
int init_onboard_sram(void){
struct ambapp_ahb_info ahb;
struct ambapp_apb_info apb;
unsigned int conf, size;
struct ambapp_ahb_info ahb;
struct ambapp_apb_info apb;
unsigned int conf, size;
/* Find SRAM controller
* 1. AHB slave interface
* 2. APB slave interface
*/
if ( ambapp_find_apbslv(&cc1.amba_bus, VENDOR_GAISLER, GAISLER_FTAHBRAM,
&apb) != 1 ){
printk("On Board FT SRAM not found (APB)\n");
return -1;
}
/* Find SRAM controller
* 1. AHB slave interface
* 2. APB slave interface
*/
if ( ambapp_find_apbslv(&cc1.amba_bus, VENDOR_GAISLER,
GAISLER_FTAHBRAM, &apb) != 1 ){
printk("On Board FT SRAM not found (APB)\n");
return -1;
}
if ( ambapp_find_ahbslv(&cc1.amba_bus, VENDOR_GAISLER, GAISLER_FTAHBRAM,
&ahb) != 1 ){
printk("On Board FT SRAM not found (AHB)\n");
return -1;
}
if ( ambapp_find_ahbslv(&cc1.amba_bus, VENDOR_GAISLER,
GAISLER_FTAHBRAM, &ahb) != 1 ){
printk("On Board FT SRAM not found (AHB)\n");
return -1;
}
/* We have found the controller.
* Get it going.
*
* Get size of SRAM
*/
conf = *(unsigned int *)apb.start;
size = (conf >>10) & 0x7;
/* We have found the controller.
* Get it going.
*
* Get size of SRAM
*/
conf = *(unsigned int *)apb.start;
size = (conf >>10) & 0x7;
/* 2^x kb */
cc1.ftsram_size = 1<<size;
cc1.ftsram_start = ahb.start[0];
cc1.ftsram_end = size*1024 + cc1.ftsram_start;
/* 2^x kb */
cc1.ftsram_size = 1<<size;
cc1.ftsram_start = ahb.start[0];
cc1.ftsram_end = size*1024 + cc1.ftsram_start;
#ifdef BOARD_INFO
printk("Found FT AHB SRAM %dkb at 0x%lx\n",cc1.ftsram_size,cc1.ftsram_start);
printk("Found FT AHB SRAM %dkb at 0x%lx\n",cc1.ftsram_size,cc1.ftsram_start);
#endif
return 0;
return 0;
}
int cchip1_register(void){
/* Init AT697 PCI Controller */
init_pci();
/* Init AT697 PCI Controller */
init_pci();
/* Find & init CChip board .
* Also scan AMBA Plug&Play info for us.
*/
if ( init_pcif() ){
printk("Failed to initialize CCHIP board\n\r");
return -1;
}
/* Find & init CChip board .
* Also scan AMBA Plug&Play info for us.
*/
if ( init_pcif() ){
printk("Failed to initialize CCHIP board\n\r");
return -1;
}
/* Set interrupt common board stuff */
cchip1_irq_init();
/* Set interrupt common board stuff */
cchip1_irq_init();
/* Find on board SRAM */
if ( init_onboard_sram() ){
printk("Failed to register On Board SRAM. It is needed by b1553BRM\n");
return -1;
}
/* Find on board SRAM */
if ( init_onboard_sram() ){
printk("Failed to register On Board SRAM. It is needed by b1553BRM\n");
return -1;
}
/* Register interrupt install functions */
b1553brm_pci_int_reg = cchip1_set_isr;
occan_pci_int_reg = cchip1_set_isr;
grspw_pci_int_reg = cchip1_set_isr;
apbuart_pci_int_reg = cchip1_set_isr;
/* Register interrupt install functions */
b1553brm_pci_int_reg = cchip1_set_isr;
occan_pci_int_reg = cchip1_set_isr;
grspw_pci_int_reg = cchip1_set_isr;
apbuart_pci_int_reg = cchip1_set_isr;
/* register the BRM PCI driver, use 16k FTSRAM... */
if ( b1553brm_pci_register(&cc1.amba_bus,0,0,3,cc1.ftsram_start,0xffa00000) ){
printk("Failed to register BRM PCI driver\n");
return -1;
}
/* register the BRM PCI driver, use 16k FTSRAM... */
if ( b1553brm_pci_register(&cc1.amba_bus,0,0,3,cc1.ftsram_start,0xffa00000) ){
printk("Failed to register BRM PCI driver\n");
return -1;
}
/* register the BRM PCI driver, no DMA memory... */
if ( occan_pci_register(&cc1.amba_bus) ){
printk("Failed to register OC_CAN PCI driver\n");
return -1;
}
/* register the BRM PCI driver, no DMA memory... */
if ( occan_pci_register(&cc1.amba_bus) ){
printk("Failed to register OC_CAN PCI driver\n");
return -1;
}
/* register the GRSPW PCI driver, use malloc... */
if ( grspw_pci_register(&cc1.amba_bus,0,0xe0000000) ){
printk("Failed to register GRSPW PCI driver\n");
return -1;
}
/* register the GRSPW PCI driver, use malloc... */
if ( grspw_pci_register(&cc1.amba_bus,0,0xe0000000) ){
printk("Failed to register GRSPW PCI driver\n");
return -1;
}
/* register the APBUART PCI driver, no DMA memory */
if ( apbuart_pci_register(&cc1.amba_bus) ){
printk("Failed to register APBUART PCI driver\n");
return -1;
}
/* register the APBUART PCI driver, no DMA memory */
if ( apbuart_pci_register(&cc1.amba_bus) ){
printk("Failed to register APBUART PCI driver\n");
return -1;
}
return 0;
return 0;
}
static rtems_isr cchip1_interrupt_dispatcher(rtems_vector_number v);
static unsigned int cchip1_spurious_cnt;
typedef struct {
unsigned int (*handler)(int irqno, void *arg);
void *arg;
unsigned int (*handler)(int irqno, void *arg);
void *arg;
} int_handler;
static int_handler int_handlers[16];
void cchip1_irq_init(void){
/* Configure AT697 ioport bit 7 to input pci irq */
/* Configure AT697 ioport bit 7 to input pci irq */
regs->PIO_Direction &= ~(1<<7);
regs->PIO_Interrupt = 0x87; /* level sensitive */
/* Set up irq controller (mask all IRQs) */
cc1.pcib->imask = 0x0000;
cc1.pcib->ipend = 0;
cc1.pcib->iclear = 0xffff;
cc1.pcib->iforce = 0;
cc1.pcib->ilevel = 0x0;
cc1.pcib->imask = 0x0000;
cc1.pcib->ipend = 0;
cc1.pcib->iclear = 0xffff;
cc1.pcib->iforce = 0;
cc1.pcib->ilevel = 0x0;
memset(int_handlers,0,sizeof(int_handlers));
memset(int_handlers,0,sizeof(int_handlers));
/* Reset spurious counter */
cchip1_spurious_cnt = 0;
/* Reset spurious counter */
cchip1_spurious_cnt = 0;
/* Register interrupt handler */
set_vector(cchip1_interrupt_dispatcher,LEON_TRAP_TYPE(CCHIP_IRQ),1);
/* Register interrupt handler */
set_vector(cchip1_interrupt_dispatcher,LEON_TRAP_TYPE(CCHIP_IRQ),1);
}
void cchip1_set_isr(void *handler, int irqno, void *arg){
int_handlers[irqno].handler = handler;
int_handlers[irqno].arg = arg;
int_handlers[irqno].handler = handler;
int_handlers[irqno].arg = arg;
#ifdef DEBUG
printk("Registering IRQ %d to 0x%lx(%d,0x%lx)\n\r",
irqno,(unsigned int)handler,irqno,(unsigned int)arg);
printk("Registering IRQ %d to 0x%lx(%d,0x%lx)\n\r",
irqno,(unsigned int)handler,irqno,(unsigned int)arg);
#endif
cc1.pcib->imask |= 1<<irqno; /* Enable the registered IRQ */
cc1.pcib->imask |= 1<<irqno; /* Enable the registered IRQ */
}
static rtems_isr cchip1_interrupt_dispatcher(rtems_vector_number v){
unsigned int pending = READ_REG(&cc1.pcib->ipend);
unsigned int (*handler)(int irqno, void *arg);
unsigned int clr = pending;
int irq=1;
unsigned int pending = READ_REG(&cc1.pcib->ipend);
unsigned int (*handler)(int irqno, void *arg);
unsigned int clr = pending;
int irq=1;
if ( !pending ){
if ( !pending ){
#ifdef PRINT_SPURIOUS
printk("Spurious IRQ %d: %d\n",v,cchip1_spurious_cnt);
printk("Spurious IRQ %d: %d\n",v,cchip1_spurious_cnt);
#endif
cchip1_spurious_cnt++;
return;
}
cchip1_spurious_cnt++;
return;
}
#ifdef DEBUG_IRQS
printk("CCIRQ: 0x%x\n",(unsigned int)pending);
#endif
/* IRQ 0 doesn't exist */
irq=1;
pending = pending>>1;
/* IRQ 0 doesn't exist */
irq=1;
pending = pending>>1;
while ( pending ){
if ( (pending & 1) && (handler=int_handlers[irq].handler) ){
handler(irq,int_handlers[irq].arg);
}
irq++;
pending = pending>>1;
}
while ( pending ){
if ( (pending & 1) && (handler=int_handlers[irq].handler) ){
handler(irq,int_handlers[irq].arg);
}
irq++;
pending = pending>>1;
}
cc1.pcib->iclear = clr;
cc1.pcib->iclear = clr;
/*LEON_Clear_interrupt( brd->irq );*/
/*LEON_Clear_interrupt( brd->irq );*/
}

View File

@@ -47,7 +47,7 @@ extern int CLOCK_SPEED;
#define Clock_driver_support_initialize_hardware() \
do { \
LEON_REG.Timer_Reload_1 = \
rtems_configuration_get_microseconds_per_tick() - 1; \
rtems_configuration_get_microseconds_per_tick() - 1; \
\
LEON_REG.Timer_Control_1 = ( \
LEON_REG_TIMER_COUNTER_ENABLE_COUNTING | \

View File

@@ -322,7 +322,7 @@ rtems_device_driver console_initialize(
LEON_REG.UART_Control_1 |= LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE;
LEON_REG.UART_Control_2 |= LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE |
LEON_REG_UART_CTRL_RI; /* rx irq default enable for remote debugger */
LEON_REG_UART_CTRL_RI; /* rx irq default enable for remote debugger */
LEON_REG.UART_Status_1 = 0;
LEON_REG.UART_Status_2 = 0;
#if (CONSOLE_USE_INTERRUPTS)

View File

@@ -69,7 +69,7 @@ extern int rtems_leon_open_eth_driver_attach(
extern int rtems_smc91111_driver_attach_leon2(
struct rtems_bsdnet_ifconfig *config
);
#define RTEMS_BSP_NETWORK_DRIVER_NAME "open_eth1"
#define RTEMS_BSP_NETWORK_DRIVER_NAME "open_eth1"
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_OPENETH \
rtems_leon_open_eth_driver_attach
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_SMC91111 \

View File

@@ -102,49 +102,49 @@ extern "C" {
*/
typedef struct {
volatile unsigned int Memory_Config_1;
volatile unsigned int Memory_Config_2;
volatile unsigned int Edac_Control;
volatile unsigned int Failed_Address;
volatile unsigned int Memory_Status;
volatile unsigned int Cache_Control;
volatile unsigned int Power_Down;
volatile unsigned int Write_Protection_1;
volatile unsigned int Write_Protection_2;
volatile unsigned int Leon_Configuration;
volatile unsigned int dummy2;
volatile unsigned int dummy3;
volatile unsigned int dummy4;
volatile unsigned int dummy5;
volatile unsigned int dummy6;
volatile unsigned int dummy7;
volatile unsigned int Timer_Counter_1;
volatile unsigned int Timer_Reload_1;
volatile unsigned int Timer_Control_1;
volatile unsigned int Watchdog;
volatile unsigned int Timer_Counter_2;
volatile unsigned int Timer_Reload_2;
volatile unsigned int Timer_Control_2;
volatile unsigned int dummy8;
volatile unsigned int Scaler_Counter;
volatile unsigned int Scaler_Reload;
volatile unsigned int dummy9;
volatile unsigned int dummy10;
volatile unsigned int UART_Channel_1;
volatile unsigned int UART_Status_1;
volatile unsigned int UART_Control_1;
volatile unsigned int UART_Scaler_1;
volatile unsigned int UART_Channel_2;
volatile unsigned int UART_Status_2;
volatile unsigned int UART_Control_2;
volatile unsigned int UART_Scaler_2;
volatile unsigned int Interrupt_Mask;
volatile unsigned int Interrupt_Pending;
volatile unsigned int Interrupt_Force;
volatile unsigned int Interrupt_Clear;
volatile unsigned int PIO_Data;
volatile unsigned int PIO_Direction;
volatile unsigned int PIO_Interrupt;
volatile unsigned int Memory_Config_1;
volatile unsigned int Memory_Config_2;
volatile unsigned int Edac_Control;
volatile unsigned int Failed_Address;
volatile unsigned int Memory_Status;
volatile unsigned int Cache_Control;
volatile unsigned int Power_Down;
volatile unsigned int Write_Protection_1;
volatile unsigned int Write_Protection_2;
volatile unsigned int Leon_Configuration;
volatile unsigned int dummy2;
volatile unsigned int dummy3;
volatile unsigned int dummy4;
volatile unsigned int dummy5;
volatile unsigned int dummy6;
volatile unsigned int dummy7;
volatile unsigned int Timer_Counter_1;
volatile unsigned int Timer_Reload_1;
volatile unsigned int Timer_Control_1;
volatile unsigned int Watchdog;
volatile unsigned int Timer_Counter_2;
volatile unsigned int Timer_Reload_2;
volatile unsigned int Timer_Control_2;
volatile unsigned int dummy8;
volatile unsigned int Scaler_Counter;
volatile unsigned int Scaler_Reload;
volatile unsigned int dummy9;
volatile unsigned int dummy10;
volatile unsigned int UART_Channel_1;
volatile unsigned int UART_Status_1;
volatile unsigned int UART_Control_1;
volatile unsigned int UART_Scaler_1;
volatile unsigned int UART_Channel_2;
volatile unsigned int UART_Status_2;
volatile unsigned int UART_Control_2;
volatile unsigned int UART_Scaler_2;
volatile unsigned int Interrupt_Mask;
volatile unsigned int Interrupt_Pending;
volatile unsigned int Interrupt_Force;
volatile unsigned int Interrupt_Clear;
volatile unsigned int PIO_Data;
volatile unsigned int PIO_Direction;
volatile unsigned int PIO_Interrupt;
} LEON_Register_Map;
#endif
@@ -396,9 +396,9 @@ static __inline__ int bsp_irq_fixup(int irq)
/* Load 32-bit word by forcing a cache-miss */
static inline unsigned int leon_r32_no_cache(uintptr_t addr)
{
unsigned int tmp;
__asm__ volatile (" lda [%1] 1, %0\n" : "=r"(tmp) : "r"(addr));
return tmp;
unsigned int tmp;
__asm__ volatile (" lda [%1] 1, %0\n" : "=r"(tmp) : "r"(addr));
return tmp;
}
#endif /* !ASM */

View File

@@ -100,18 +100,18 @@ struct uart_reg {
void uart_register(unsigned int baseaddr);
rtems_device_driver uart_initialize(rtems_device_major_number major,
rtems_device_minor_number minor, void *arg);
rtems_device_driver uart_initialize(rtems_device_major_number major,
rtems_device_minor_number minor, void *arg);
rtems_device_driver uart_open(rtems_device_major_number major,
rtems_device_minor_number minor, void *arg);
rtems_device_minor_number minor, void *arg);
rtems_device_driver uart_close(rtems_device_major_number major,
rtems_device_minor_number minor, void *arg);
rtems_device_minor_number minor, void *arg);
rtems_device_driver uart_read(rtems_device_major_number major,
rtems_device_minor_number minor, void *arg);
rtems_device_minor_number minor, void *arg);
rtems_device_driver uart_write(rtems_device_major_number major,
rtems_device_minor_number minor, void *arg);
rtems_device_minor_number minor, void *arg);
rtems_device_driver uart_control(rtems_device_major_number major,
rtems_device_minor_number minor, void *arg);
rtems_device_minor_number minor, void *arg);
struct gpio_reg {

View File

@@ -345,7 +345,7 @@ int rasta_register(void)
/*brm_register(bar0 + BRM_OFFSET, bar1);*/
/* register the BRM RASTA driver, use 128k on RASTA SRAM... */
b1553brm_rasta_int_reg=rasta_interrrupt_register;
if ( b1553brm_rasta_register(&abus,2,0,3,bar1,0x40000000) ){
if ( b1553brm_rasta_register(&abus,2,0,3,bar1,0x40000000) ){
printk("Failed to register BRM RASTA driver\n");
return -1;
}

View File

@@ -148,8 +148,8 @@ void bsp_spurious_initialize()
*/
if (( trap == 5 || trap == 6 ) ||
(( trap >= 0x11 ) && ( trap <= 0x1f )) ||
(( trap >= 0x70 ) && ( trap <= 0x83 )))
(( trap >= 0x11 ) && ( trap <= 0x1f )) ||
(( trap >= 0x70 ) && ( trap <= 0x83 )))
continue;
set_vector(

View File

@@ -79,13 +79,13 @@ extern int rtems_leon_greth_driver_attach(
int attach
);
#define RTEMS_BSP_NETWORK_DRIVER_NAME_OPENETH "open_eth1"
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_OPENETH \
#define RTEMS_BSP_NETWORK_DRIVER_NAME_OPENETH "open_eth1"
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_OPENETH \
rtems_leon_open_eth_driver_attach
#define RTEMS_BSP_NETWORK_DRIVER_NAME_SMC91111 "smc_eth1"
#define RTEMS_BSP_NETWORK_DRIVER_NAME_SMC91111 "smc_eth1"
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_SMC91111 \
rtems_smc91111_driver_attach_leon3
#define RTEMS_BSP_NETWORK_DRIVER_NAME_GRETH "gr_eth1"
#define RTEMS_BSP_NETWORK_DRIVER_NAME_GRETH "gr_eth1"
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH_GRETH \
rtems_leon_greth_driver_attach

View File

@@ -287,9 +287,9 @@ extern rtems_interrupt_lock LEON3_IrqCtrl_Lock;
/* Load 32-bit word by forcing a cache-miss */
static inline unsigned int leon_r32_no_cache(uintptr_t addr)
{
unsigned int tmp;
__asm__ volatile (" lda [%1] 1, %0\n" : "=r"(tmp) : "r"(addr));
return tmp;
unsigned int tmp;
__asm__ volatile (" lda [%1] 1, %0\n" : "=r"(tmp) : "r"(addr));
return tmp;
}
/* Let user override which on-chip APBUART will be debug UART

View File

@@ -36,7 +36,7 @@ scmv91111_configuration_t leon_scmv91111_configuration = {
*/
int
rtems_smc91111_driver_attach_leon3 (struct rtems_bsdnet_ifconfig *config,
int attach)
int attach)
{
unsigned long addr_mctrl = 0;
struct grgpio_regs *io;
@@ -70,10 +70,8 @@ rtems_smc91111_driver_attach_leon3 (struct rtems_bsdnet_ifconfig *config,
addr_mctrl = (unsigned long) apbmctrl.start;
io = (struct grgpio_regs *) apbpio.start;
printk(
"Activating Leon3 io port for smsc_lan91cxx (pio:%x mctrl:%x)\n",
(unsigned int)io,
(unsigned int)addr_mctrl);
printk("Activating Leon3 io port for smsc_lan91cxx (pio:%x mctrl:%x)\n",
(unsigned int)io, (unsigned int)addr_mctrl);
/* Setup PIO IRQ */
io->imask |= (1 << leon_scmv91111_configuration.pio);
@@ -83,7 +81,7 @@ rtems_smc91111_driver_attach_leon3 (struct rtems_bsdnet_ifconfig *config,
/* Setup memory controller I/O waitstates */
*((volatile unsigned int *) addr_mctrl) |=
0x10f80000; /* enable I/O area access */
0x10f80000; /* enable I/O area access */
return _rtems_smc91111_driver_attach(config, &leon_scmv91111_configuration);
};

View File

@@ -44,9 +44,9 @@ extern unsigned int LEON3_Atomic_Swap(uint32_t value, uint32_t *address);
__asm__ (
".text\n"
".align 4\n"
"LEON3_Atomic_Swap:\n"
" retl\n"
" swapa [%o1] 1, %o0\n"
"LEON3_Atomic_Swap:\n"
" retl\n"
" swapa [%o1] 1, %o0\n"
);

View File

@@ -152,8 +152,8 @@ void bsp_spurious_initialize()
*/
if (( trap == 5 || trap == 6 ) ||
(( trap >= 0x11 ) && ( trap <= 0x1f )) ||
(( trap >= 0x70 ) && ( trap <= 0x83 )))
(( trap >= 0x11 ) && ( trap <= 0x1f )) ||
(( trap >= 0x70 ) && ( trap <= 0x83 )))
continue;
set_vector(