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2010-04-15 Joel Sherrill <joel.sherrill@oarcorp.com>

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* cpuModel.S, cpuModel.h, displayCpu.c: Update to include more reserved
	bits and pick out a bit more information.
This commit is contained in:
Joel Sherrill
2010-04-15 14:09:57 +00:00
parent 5a0f2c7812
commit 9e95e540b9
4 changed files with 167 additions and 129 deletions
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5
c/src/lib/libcpu/i386/ChangeLog
View File

@@ -1,3 +1,8 @@
2010-04-15 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpuModel.S, cpuModel.h, displayCpu.c: Update to include more reserved
bits and pick out a bit more information.
2009-12-11 Joel Sherrill <joel.sherrill@oarcorp.com>
* page.c: Use bsp_mem_size.

17
c/src/lib/libcpu/i386/cpuModel.S
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@@ -87,6 +87,16 @@ isnew:
popfl
incl SYM(have_cpuid) /* we have CPUID instruction */
/*
* Addressable Processor Ids
*
* CPUID.(EAX=4, ECX=0):EAX[31:26] + 1 = Y)
*/
movl $4, eax
movl $0, ecx
cpuid
movl eax,SYM(x86_capability_cores)
/* use it to get :
* processor type,
* processor model,
@@ -95,6 +105,7 @@ isnew:
*/
movl $1, eax
cpuid
movl ebx,SYM(x86_capability_ebx) /* store ebx feature info */
movl ecx,SYM(x86_capability_x) /* store ecx feature flags */
movb al, cl /* save reg for future use */
@@ -235,7 +246,9 @@ BEGIN_DATA
PUBLIC(x86_model)
PUBLIC(x86_mask)
PUBLIC(x86_capability)
PUBLIC(x86_capability_ebx)
PUBLIC(x86_capability_x)
PUBLIC(x86_capability_cores)
PUBLIC(x86_vendor_id)
PUBLIC(hard_math)
@@ -249,8 +262,12 @@ SYM(x86_mask):
.byte 0
SYM(x86_capability):
.long 0
SYM(x86_capability_ebx):
.long 0
SYM(x86_capability_x):
.long 0
SYM(x86_capability_cores):
.long 0
SYM(x86_vendor_id):
.zero 13
SYM(hard_math):

2
c/src/lib/libcpu/i386/cpuModel.h
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@@ -26,6 +26,8 @@ extern char x86_model;
extern char x86_mask;
extern int x86_capability; /* cpuid:EDX */
extern int x86_capability_x; /* cpuid:ECX */
extern int x86_capability_ebx; /* cpuid:EBX */
extern int x86_capability_cores; /* cpuid.(EAX=4, ECX=0) - physical cores */
extern char x86_vendor_id[13];
extern int have_cpuid;
extern unsigned char Cx86_step; /* cyrix processor identification */

32
c/src/lib/libcpu/i386/displayCpu.c
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@@ -3,7 +3,12 @@
* This file contains code for displaying the Intel Cpu identification
* that has been performed by checkCPUtypeSetCr0 function.
*
* This file was updated by Joel Sherrill <joel.sherrill@oarcorp.com>
* to define more capability bits, pick up more CPU model information,
* and add more model strings. --joel (April 2010)
*
* COPYRIGHT (c) 1998 valette@crf.canon.fr
* COPYRIGHT (c) 2010 OAR Corporation
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
@@ -23,8 +28,10 @@
#include <rtems.h>
unsigned char Cx86_step = 0;
static const char *Cx86_type[] = {
"unknown", "1.3", "1.4", "1.5", "1.6", "2.4", "2.5", "2.6", "2.7 or 3.7", "4.2"
"unknown", "1.3", "1.4", "1.5", "1.6",
"2.4", "2.5", "2.6", "2.7 or 3.7", "4.2"
};
static const char *i486model(unsigned int nr)
@@ -33,6 +40,7 @@ static const char * i486model(unsigned int nr)
"0","DX","SX","DX/2","4","SX/2","6","DX/2-WB","DX/4","DX/4-WB",
"10","11","12","13","Am5x86-WT","Am5x86-WB"
};
if (nr < sizeof(model)/sizeof(char *))
return model[nr];
return NULL;
@@ -56,9 +64,11 @@ static const char * Cx86model(void)
static const char *model[] = {
"unknown", "6x86", "6x86L", "6x86MX", "MII"
};
switch (x86) {
case 5:
nr6x86 = ((x86_capability & (1 << 8)) ? 2 : 1); /* cx8 flag only on 6x86L */
/* cx8 flag only on 6x86L */
nr6x86 = ((x86_capability & (1 << 8)) ? 2 : 1);
break;
case 6:
nr6x86 = 3;
@@ -107,7 +117,8 @@ static const char * Cx86model(void)
static const char * i686model(unsigned int nr)
{
static const char *model[] = {
"PPro A-step", "Pentium Pro"
"PPro A-step",
"Pentium Pro"
};
if (nr < sizeof(model)/sizeof(char *))
return model[nr];
@@ -148,6 +159,7 @@ static const char * getmodel(int x86, int model)
{
const char *p = NULL;
static char nbuf[12];
if (strncmp(x86_vendor_id, "Cyrix", 5) == 0)
p = Cx86model();
else if(strcmp(x86_vendor_id, "AuthenticAMD")==0)
@@ -182,10 +194,10 @@ void printCpuInfo(void)
"fxsr", "sse", "sse2", "ss", "htt", "tm", "30", "pbe"
};
static const char *x86_cap_x_flags[] = {
"sse3", "1", "2", "monitor", "ds-cpl", "vmx", "6", "est",
"tm2", "9", "cnxt-id", "11", "12", "cmpxchg16b", "14", "15",
"16", "17", "18", "19", "20", "21", "22", "23"
"24", "25", "26", "27", "28", "29", "30", "31"
"sse3", "pclmulqdq", "dtes64", "monitor", "ds-cpl", "vmx", "smx", "est",
"tm2", "ssse3", "cnxt-id", "11", "12", "cmpxchg16b", "xtpr", "pdcm",
"16", "pcid", "dca", "sse4.1", "sse4.2", "x2APIC", "movbe", "popcnt"
"24", "aesni", "xsave", "xsave", "avx", "29", "30", "31"
};
printk("cpu : %c86\n", x86+'0');
@@ -195,14 +207,14 @@ void printCpuInfo(void)
strcpy(x86_vendor_id, "unknown");
printk("vendor_id : %s\n", x86_vendor_id);
if (x86_mask)
if (x86_mask) {
if (strncmp(x86_vendor_id, "Cyrix", 5) != 0) {
printk("stepping : %d\n", x86_mask);
}
else { /* we have a Cyrix */
printk("stepping : %s\n", Cx86_type[Cx86_step]);
}
else
} else
printk("stepping : unknown\n");
printk("fpu : %s\n", (hard_math ? "yes" : "no"));
@@ -227,4 +239,6 @@ void printCpuInfo(void)
}
}
printk("\n");
printk( "x86_capability_ebx=0x%08x\n", x86_capability_ebx);
printk( "x86_capability_cores=0x%08x\n", x86_capability_cores);
}