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2010-04-15 Joel Sherrill <joel.sherrill@oarcorp.com>

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* cpuModel.S, cpuModel.h, displayCpu.c: Update to include more reserved
	bits and pick out a bit more information.
This commit is contained in:
Joel Sherrill
2010-04-15 14:09:57 +00:00
parent 5a0f2c7812
commit 9e95e540b9
4 changed files with 167 additions and 129 deletions
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5
c/src/lib/libcpu/i386/ChangeLog
View File

@@ -1,3 +1,8 @@
2010-04-15 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpuModel.S, cpuModel.h, displayCpu.c: Update to include more reserved
bits and pick out a bit more information.
2009-12-11 Joel Sherrill <joel.sherrill@oarcorp.com> 2009-12-11 Joel Sherrill <joel.sherrill@oarcorp.com>
* page.c: Use bsp_mem_size. * page.c: Use bsp_mem_size.

17
c/src/lib/libcpu/i386/cpuModel.S
View File

@@ -87,6 +87,16 @@ isnew:
popfl popfl
incl SYM(have_cpuid) /* we have CPUID instruction */ incl SYM(have_cpuid) /* we have CPUID instruction */
/*
* Addressable Processor Ids
*
* CPUID.(EAX=4, ECX=0):EAX[31:26] + 1 = Y)
*/
movl $4, eax
movl $0, ecx
cpuid
movl eax,SYM(x86_capability_cores)
/* use it to get : /* use it to get :
* processor type, * processor type,
* processor model, * processor model,
@@ -95,6 +105,7 @@ isnew:
*/ */
movl $1, eax movl $1, eax
cpuid cpuid
movl ebx,SYM(x86_capability_ebx) /* store ebx feature info */
movl ecx,SYM(x86_capability_x) /* store ecx feature flags */ movl ecx,SYM(x86_capability_x) /* store ecx feature flags */
movb al, cl /* save reg for future use */ movb al, cl /* save reg for future use */
@@ -235,7 +246,9 @@ BEGIN_DATA
PUBLIC(x86_model) PUBLIC(x86_model)
PUBLIC(x86_mask) PUBLIC(x86_mask)
PUBLIC(x86_capability) PUBLIC(x86_capability)
PUBLIC(x86_capability_ebx)
PUBLIC(x86_capability_x) PUBLIC(x86_capability_x)
PUBLIC(x86_capability_cores)
PUBLIC(x86_vendor_id) PUBLIC(x86_vendor_id)
PUBLIC(hard_math) PUBLIC(hard_math)
@@ -249,8 +262,12 @@ SYM(x86_mask):
.byte 0 .byte 0
SYM(x86_capability): SYM(x86_capability):
.long 0 .long 0
SYM(x86_capability_ebx):
.long 0
SYM(x86_capability_x): SYM(x86_capability_x):
.long 0 .long 0
SYM(x86_capability_cores):
.long 0
SYM(x86_vendor_id): SYM(x86_vendor_id):
.zero 13 .zero 13
SYM(hard_math): SYM(hard_math):

6
c/src/lib/libcpu/i386/cpuModel.h
View File

@@ -24,8 +24,10 @@ extern char hard_math; /* floating point coprocessor present indicator */
extern char x86; /* type of cpu (3 = 386, 4 =486, ...) */ extern char x86; /* type of cpu (3 = 386, 4 =486, ...) */
extern char x86_model; extern char x86_model;
extern char x86_mask; extern char x86_mask;
extern int x86_capability; /* cpuid:EDX */ extern int x86_capability; /* cpuid:EDX */
extern int x86_capability_x; /* cpuid:ECX */ extern int x86_capability_x; /* cpuid:ECX */
extern int x86_capability_ebx; /* cpuid:EBX */
extern int x86_capability_cores; /* cpuid.(EAX=4, ECX=0) - physical cores */
extern char x86_vendor_id[13]; extern char x86_vendor_id[13];
extern int have_cpuid; extern int have_cpuid;
extern unsigned char Cx86_step; /* cyrix processor identification */ extern unsigned char Cx86_step; /* cyrix processor identification */

268
c/src/lib/libcpu/i386/displayCpu.c
View File

@@ -3,7 +3,12 @@
* This file contains code for displaying the Intel Cpu identification * This file contains code for displaying the Intel Cpu identification
* that has been performed by checkCPUtypeSetCr0 function. * that has been performed by checkCPUtypeSetCr0 function.
* *
* This file was updated by Joel Sherrill <joel.sherrill@oarcorp.com>
* to define more capability bits, pick up more CPU model information,
* and add more model strings. --joel (April 2010)
*
* COPYRIGHT (c) 1998 valette@crf.canon.fr * COPYRIGHT (c) 1998 valette@crf.canon.fr
* COPYRIGHT (c) 2010 OAR Corporation
* *
* The license and distribution terms for this file may be * The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at * found in the file LICENSE in this distribution or at
@@ -23,153 +28,160 @@
#include <rtems.h> #include <rtems.h>
unsigned char Cx86_step = 0; unsigned char Cx86_step = 0;
static const char *Cx86_type[] = {
"unknown", "1.3", "1.4", "1.5", "1.6", "2.4", "2.5", "2.6", "2.7 or 3.7", "4.2"
};
static const char * i486model(unsigned int nr) static const char *Cx86_type[] = {
"unknown", "1.3", "1.4", "1.5", "1.6",
"2.4", "2.5", "2.6", "2.7 or 3.7", "4.2"
};
static const char *i486model(unsigned int nr)
{ {
static const char *model[] = { static const char *model[] = {
"0","DX","SX","DX/2","4","SX/2","6","DX/2-WB","DX/4","DX/4-WB", "0","DX","SX","DX/2","4","SX/2","6","DX/2-WB","DX/4","DX/4-WB",
"10","11","12","13","Am5x86-WT","Am5x86-WB" "10","11","12","13","Am5x86-WT","Am5x86-WB"
}; };
if (nr < sizeof(model)/sizeof(char *))
return model[nr]; if (nr < sizeof(model)/sizeof(char *))
return NULL; return model[nr];
return NULL;
} }
static const char * i586model(unsigned int nr) static const char * i586model(unsigned int nr)
{ {
static const char *model[] = { static const char *model[] = {
"0", "Pentium 60/66","Pentium 75+","OverDrive PODP5V83", "0", "Pentium 60/66","Pentium 75+","OverDrive PODP5V83",
"Pentium MMX", NULL, NULL, "Mobile Pentium 75+", "Pentium MMX", NULL, NULL, "Mobile Pentium 75+",
"Mobile Pentium MMX" "Mobile Pentium MMX"
}; };
if (nr < sizeof(model)/sizeof(char *)) if (nr < sizeof(model)/sizeof(char *))
return model[nr]; return model[nr];
return NULL; return NULL;
} }
static const char * Cx86model(void) static const char *Cx86model(void)
{ {
unsigned char nr6x86 = 0; unsigned char nr6x86 = 0;
static const char *model[] = { static const char *model[] = {
"unknown", "6x86", "6x86L", "6x86MX", "MII" "unknown", "6x86", "6x86L", "6x86MX", "MII"
}; };
switch (x86) {
case 5:
nr6x86 = ((x86_capability & (1 << 8)) ? 2 : 1); /* cx8 flag only on 6x86L */
break;
case 6:
nr6x86 = 3;
break;
default:
nr6x86 = 0;
}
/* We must get the stepping number by reading DIR1 */ switch (x86) {
outport_byte(0x22,0xff); case 5:
inport_byte(0x23, x86_mask); /* cx8 flag only on 6x86L */
switch (x86_mask) { nr6x86 = ((x86_capability & (1 << 8)) ? 2 : 1);
case 0x03: break;
Cx86_step = 1; /* 6x86MX Rev 1.3 */ case 6:
break; nr6x86 = 3;
case 0x04: break;
Cx86_step = 2; /* 6x86MX Rev 1.4 */ default:
break; nr6x86 = 0;
case 0x05: }
Cx86_step = 3; /* 6x86MX Rev 1.5 */
break; /* We must get the stepping number by reading DIR1 */
case 0x06: outport_byte(0x22,0xff);
Cx86_step = 4; /* 6x86MX Rev 1.6 */ inport_byte(0x23, x86_mask);
break; switch (x86_mask) {
case 0x14: case 0x03:
Cx86_step = 5; /* 6x86 Rev 2.4 */ Cx86_step = 1; /* 6x86MX Rev 1.3 */
break; break;
case 0x15: case 0x04:
Cx86_step = 6; /* 6x86 Rev 2.5 */ Cx86_step = 2; /* 6x86MX Rev 1.4 */
break; break;
case 0x16: case 0x05:
Cx86_step = 7; /* 6x86 Rev 2.6 */ Cx86_step = 3; /* 6x86MX Rev 1.5 */
break; break;
case 0x17: case 0x06:
Cx86_step = 8; /* 6x86 Rev 2.7 or 3.7 */ Cx86_step = 4; /* 6x86MX Rev 1.6 */
break; break;
case 0x22: case 0x14:
Cx86_step = 9; /* 6x86L Rev 4.2 */ Cx86_step = 5; /* 6x86 Rev 2.4 */
break; break;
default: case 0x15:
Cx86_step = 0; Cx86_step = 6; /* 6x86 Rev 2.5 */
} break;
return model[nr6x86]; case 0x16:
Cx86_step = 7; /* 6x86 Rev 2.6 */
break;
case 0x17:
Cx86_step = 8; /* 6x86 Rev 2.7 or 3.7 */
break;
case 0x22:
Cx86_step = 9; /* 6x86L Rev 4.2 */
break;
default:
Cx86_step = 0;
}
return model[nr6x86];
} }
static const char * i686model(unsigned int nr) static const char * i686model(unsigned int nr)
{ {
static const char *model[] = { static const char *model[] = {
"PPro A-step", "Pentium Pro" "PPro A-step",
}; "Pentium Pro"
if (nr < sizeof(model)/sizeof(char *)) };
return model[nr]; if (nr < sizeof(model)/sizeof(char *))
return NULL; return model[nr];
return NULL;
} }
struct cpu_model_info { struct cpu_model_info {
int x86; int x86;
char *model_names[16]; char *model_names[16];
}; };
static struct cpu_model_info amd_models[] = { static struct cpu_model_info amd_models[] = {
{ 4, { 4,
{ NULL, NULL, NULL, "DX/2", NULL, NULL, NULL, "DX/2-WB", "DX/4", { NULL, NULL, NULL, "DX/2", NULL, NULL, NULL, "DX/2-WB", "DX/4",
"DX/4-WB", NULL, NULL, NULL, NULL, "Am5x86-WT", "Am5x86-WB" }}, "DX/4-WB", NULL, NULL, NULL, NULL, "Am5x86-WT", "Am5x86-WB" }},
{ 5, { 5,
{ "K5/SSA5 (PR-75, PR-90, PR-100)", "K5 (PR-120, PR-133)", { "K5/SSA5 (PR-75, PR-90, PR-100)", "K5 (PR-120, PR-133)",
"K5 (PR-166)", "K5 (PR-200)", NULL, NULL, "K5 (PR-166)", "K5 (PR-200)", NULL, NULL,
"K6 (166 - 266)", "K6 (166 - 300)", "K6-2 (200 - 450)", "K6 (166 - 266)", "K6 (166 - 300)", "K6-2 (200 - 450)",
"K6-3D-Plus (200 - 450)", NULL, NULL, NULL, NULL, NULL, NULL }}, "K6-3D-Plus (200 - 450)", NULL, NULL, NULL, NULL, NULL, NULL }},
}; };
static const char * AMDmodel(void) static const char * AMDmodel(void)
{ {
const char *p=NULL; const char *p=NULL;
int i; int i;
if (x86_model < 16) if (x86_model < 16)
for (i=0; i<sizeof(amd_models)/sizeof(struct cpu_model_info); i++) for (i=0; i<sizeof(amd_models)/sizeof(struct cpu_model_info); i++)
if (amd_models[i].x86 == x86) { if (amd_models[i].x86 == x86) {
p = amd_models[i].model_names[(int)x86_model]; p = amd_models[i].model_names[(int)x86_model];
break; break;
} }
return p; return p;
} }
static const char * getmodel(int x86, int model) static const char * getmodel(int x86, int model)
{ {
const char *p = NULL; const char *p = NULL;
static char nbuf[12]; static char nbuf[12];
if (strncmp(x86_vendor_id, "Cyrix", 5) == 0)
p = Cx86model();
else if(strcmp(x86_vendor_id, "AuthenticAMD")==0)
p = AMDmodel();
else {
switch (x86) {
case 4:
p = i486model(model);
break;
case 5:
p = i586model(model);
break;
case 6:
p = i686model(model);
break;
}
}
if (p)
return p;
sprintf(nbuf, "%d", model); if (strncmp(x86_vendor_id, "Cyrix", 5) == 0)
return nbuf; p = Cx86model();
else if(strcmp(x86_vendor_id, "AuthenticAMD")==0)
p = AMDmodel();
else {
switch (x86) {
case 4:
p = i486model(model);
break;
case 5:
p = i586model(model);
break;
case 6:
p = i686model(model);
break;
}
}
if (p)
return p;
sprintf(nbuf, "%d", model);
return nbuf;
} }
void printCpuInfo(void) void printCpuInfo(void)
@@ -182,27 +194,27 @@ void printCpuInfo(void)
"fxsr", "sse", "sse2", "ss", "htt", "tm", "30", "pbe" "fxsr", "sse", "sse2", "ss", "htt", "tm", "30", "pbe"
}; };
static const char *x86_cap_x_flags[] = { static const char *x86_cap_x_flags[] = {
"sse3", "1", "2", "monitor", "ds-cpl", "vmx", "6", "est", "sse3", "pclmulqdq", "dtes64", "monitor", "ds-cpl", "vmx", "smx", "est",
"tm2", "9", "cnxt-id", "11", "12", "cmpxchg16b", "14", "15", "tm2", "ssse3", "cnxt-id", "11", "12", "cmpxchg16b", "xtpr", "pdcm",
"16", "17", "18", "19", "20", "21", "22", "23" "16", "pcid", "dca", "sse4.1", "sse4.2", "x2APIC", "movbe", "popcnt"
"24", "25", "26", "27", "28", "29", "30", "31" "24", "aesni", "xsave", "xsave", "avx", "29", "30", "31"
}; };
printk("cpu : %c86\n", x86+'0'); printk("cpu : %c86\n", x86+'0');
printk("model : %s\n", printk("model : %s\n",
have_cpuid ? getmodel(x86, x86_model) : "unknown"); have_cpuid ? getmodel(x86, x86_model) : "unknown");
if (x86_vendor_id [0] == '\0') if (x86_vendor_id [0] == '\0')
strcpy(x86_vendor_id, "unknown"); strcpy(x86_vendor_id, "unknown");
printk("vendor_id : %s\n", x86_vendor_id); printk("vendor_id : %s\n", x86_vendor_id);
if (x86_mask) if (x86_mask) {
if (strncmp(x86_vendor_id, "Cyrix", 5) != 0) { if (strncmp(x86_vendor_id, "Cyrix", 5) != 0) {
printk("stepping : %d\n", x86_mask); printk("stepping : %d\n", x86_mask);
} }
else { /* we have a Cyrix */ else { /* we have a Cyrix */
printk("stepping : %s\n", Cx86_type[Cx86_step]); printk("stepping : %s\n", Cx86_type[Cx86_step]);
} }
else } else
printk("stepping : unknown\n"); printk("stepping : unknown\n");
printk("fpu : %s\n", (hard_math ? "yes" : "no")); printk("fpu : %s\n", (hard_math ? "yes" : "no"));
@@ -211,7 +223,7 @@ void printCpuInfo(void)
for ( i = j = 0 ; i < 32 ; i++ ) { for ( i = j = 0 ; i < 32 ; i++ ) {
if ( x86_capability & (1 << i) ) { if ( x86_capability & (1 << i) ) {
if ( j && 0 == (j & 7) ) if ( j && 0 == (j & 7) )
printk("\n "); printk("\n ");
printk(" %s", x86_cap_flags[i]); printk(" %s", x86_cap_flags[i]);
j++; j++;
} }
@@ -221,10 +233,12 @@ void printCpuInfo(void)
for ( i = j = 0 ; i < 32 ; i++ ) { for ( i = j = 0 ; i < 32 ; i++ ) {
if ( x86_capability_x & (1 << i) ) { if ( x86_capability_x & (1 << i) ) {
if ( j && 0 == (j & 7) ) if ( j && 0 == (j & 7) )
printk("\n "); printk("\n ");
printk(" %s", x86_cap_x_flags[i]); printk(" %s", x86_cap_x_flags[i]);
j++; j++;
} }
} }
printk("\n"); printk("\n");
printk( "x86_capability_ebx=0x%08x\n", x86_capability_ebx);
printk( "x86_capability_cores=0x%08x\n", x86_capability_cores);
} }