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mvme147s: Remove as obsoleted

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Updates #5031
This commit is contained in:
Joel Sherrill
2025-02-25 17:49:19 -06:00
committed by Gedare Bloom
parent 01d22874c2
commit 9e05cd72c5
14 changed files with 0 additions and 949 deletions
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86
bsps/m68k/mvme147s/README.md
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MVME147S
========
MVME147 port for TNI - Telecom Bretagne
by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
May 1996
This bsp is essentially based on the mvme136 bsp,
and is only an extention of the MVME147 bsp. There
are slight differences in the VMEchips used in the MVME147S and
the MVME147 that should prevent the shmsupport and the startup
code from running on a MVME147.
Summary
-------
* include
- bsp.h
Peripheral Channel Controller memory mapping
Z8530 memory mapping
VMEchip memory mapping
* startup
- bspstart.c
main () setup for VME roundrobin mode
setup for the PCC interrupt vector base
setup of the VME shared memory
- bspclean.c
bsp_cleanup () disable timer 1 & 2 interruptions
- linkcmds set the RAM start (0x7000) and size (4Meg - 0x7000)
- setvec.c unchanged
- sbrk.c unchanged
* console
- console.c taken from the dmv152 bsp (Zilog Z8530)
with no modification
* clock
- ckinit.c entirely rewritten for the PCC tick timer 2
* timer
- timerisr.s and timer.c
entirely rewritten for the PCC tick timer 1
now gives results un 6.25 us units (mininum timer delay,
suprising big grain)
* times
- updated results for the mvme147 (beware of the 6.25 us grain)
* shmsupp :
Specific to the S version of the MVME147
Only tested with 2 boards, in interrupt mode.
Uses the top 128k of the VME system controller board RAM
as the shared space.
- mpisr.c : uses the SIGLP interruption
- Makefile : unchanged
- getcfg.c : rewritten
- lock.c unchanged
- addrconv.c unchanged
* Makefiles
- unchanged
TODO
----
* update the overheads in coverhead.h
* add support for serial ports 2,3 and 4.
Other notes
-----------
* All the timing tests and sp tests have been run

17
bsps/m68k/mvme147s/config/mvme147s.cfg
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#
# Config file for the mvme147s BSP
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=m68k
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mcpu=68030
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

231
bsps/m68k/mvme147s/include/bsp.h
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/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsM68kMVME147s
*
* @brief Global BSP definitions.
*/
/* bsp.h
*
* This include file contains all MVME147 board IO definitions.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* MVME147 port for TNI - Telecom Bretagne
* by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
* May 1996
*/
#ifndef LIBBSP_M68K_MVME147S_BSP_H
#define LIBBSP_M68K_MVME147S_BSP_H
/**
* @defgroup RTEMSBSPsM68kMVME147s MVME147s
*
* @ingroup RTEMSBSPsM68k
*
* @brief MVME147s Board Support Package.
*
* @{
*/
#include <bspopts.h>
#include <bsp/default-initial-extension.h>
#include <rtems.h>
#ifdef __cplusplus
extern "C" {
#endif
/* Constants */
#define RAM_START 0x00007000
#define RAM_END 0x003e0000
#define DRAM_END 0x00400000
/* We leave 128k for the shared memory */
/* MVME 147 Peripheral controller chip
see MVME147/D1, 3.4 */
struct pcc_map {
/* 32 bit registers */
uint32_t dma_table_address; /* 0xfffe1000 */
uint32_t dma_data_address; /* 0xfffe1004 */
uint32_t dma_bytecount; /* 0xfffe1008 */
uint32_t dma_data_holding; /* 0xfffe100c */
/* 16 bit registers */
uint16_t timer1_preload; /* 0xfffe1010 */
uint16_t timer1_count; /* 0xfffe1012 */
uint16_t timer2_preload; /* 0xfffe1014 */
uint16_t timer2_count; /* 0xfffe1016 */
/* 8 bit registers */
uint8_t timer1_int_control; /* 0xfffe1018 */
uint8_t timer1_control; /* 0xfffe1019 */
uint8_t timer2_int_control; /* 0xfffe101a */
uint8_t timer2_control; /* 0xfffe101b */
uint8_t acfail_int_control; /* 0xfffe101c */
uint8_t watchdog_control; /* 0xfffe101d */
uint8_t printer_int_control; /* 0xfffe101e */
uint8_t printer_control; /* 0xfffe102f */
uint8_t dma_int_control; /* 0xfffe1020 */
uint8_t dma_control; /* 0xfffe1021 */
uint8_t bus_error_int_control; /* 0xfffe1022 */
uint8_t dma_status; /* 0xfffe1023 */
uint8_t abort_int_control; /* 0xfffe1024 */
uint8_t table_address_function_code; /* 0xfffe1025 */
uint8_t serial_port_int_control; /* 0xfffe1026 */
uint8_t general_purpose_control; /* 0xfffe1027 */
uint8_t lan_int_control; /* 0xfffe1028 */
uint8_t general_purpose_status; /* 0xfffe1029 */
uint8_t scsi_port_int_control; /* 0xfffe102a */
uint8_t slave_base_address; /* 0xfffe102b */
uint8_t software_int_1_control; /* 0xfffe102c */
uint8_t int_base_vector; /* 0xfffe102d */
uint8_t software_int_2_control; /* 0xfffe102e */
uint8_t revision_level; /* 0xfffe102f */
};
#define pcc ((volatile struct pcc_map * const) 0xfffe1000)
/* VME chip configuration registers */
struct vme_lcsr_map {
uint8_t unused_1;
uint8_t system_controller; /* 0xfffe2001 */
uint8_t unused_2;
uint8_t vme_bus_requester; /* 0xfffe2003 */
uint8_t unused_3;
uint8_t master_configuration; /* 0xfffe2005 */
uint8_t unused_4;
uint8_t slave_configuration; /* 0xfffe2007 */
uint8_t unused_5;
uint8_t timer_configuration; /* 0xfffe2009 */
uint8_t unused_6;
uint8_t slave_address_modifier; /* 0xfffe200b */
uint8_t unused_7;
uint8_t master_address_modifier; /* 0xfffe200d */
uint8_t unused_8;
uint8_t interrupt_handler_mask; /* 0xfffe200f */
uint8_t unused_9;
uint8_t utility_interrupt_mask; /* 0xfffe2011 */
uint8_t unused_10;
uint8_t utility_interrupt_vector; /* 0xfffe2013 */
uint8_t unused_11;
uint8_t interrupt_request; /* 0xfffe2015 */
uint8_t unused_12;
uint8_t vme_bus_status_id; /* 0xfffe2017 */
uint8_t unused_13;
uint8_t bus_error_status; /* 0xfffe2019 */
uint8_t unused_14;
uint8_t gcsr_base_address; /* 0xfffe201b */
};
#define vme_lcsr ((volatile struct vme_lcsr_map * const) 0xfffe2000)
struct vme_gcsr_map {
uint8_t unused_1;
uint8_t global_0; /* 0xfffe2021 */
uint8_t unused_2;
uint8_t global_1; /* 0xfffe2023 */
uint8_t unused_3;
uint8_t board_identification; /* 0xfffe2025 */
uint8_t unused_4;
uint8_t general_purpose_0; /* 0xfffe2027 */
uint8_t unused_5;
uint8_t general_purpose_1; /* 0xfffe2029 */
uint8_t unused_6;
uint8_t general_purpose_2; /* 0xfffe202b */
uint8_t unused_7;
uint8_t general_purpose_3; /* 0xfffe202d */
uint8_t unused_8;
uint8_t general_purpose_4; /* 0xfffe202f */
};
#define vme_gcsr ((volatile struct vme_gcsr_map * const) 0xfffe2020)
#define z8530 0xfffe3001
/* interrupt vectors - see MVME147/D1 4.14 */
#define PCC_BASE_VECTOR 0x40 /* First user int */
#define SCC_VECTOR PCC_BASE_VECTOR+3
#define TIMER_1_VECTOR PCC_BASE_VECTOR+8
#define TIMER_2_VECTOR PCC_BASE_VECTOR+9
#define SOFT_1_VECTOR PCC_BASE_VECTOR+10
#define SOFT_2_VECTOR PCC_BASE_VECTOR+11
#define VME_BASE_VECTOR 0x50
#define VME_SIGLP_VECTOR VME_BASE_VECTOR+1
#define USE_CHANNEL_A 1 /* 1 = use channel A for console */
#define USE_CHANNEL_B 0 /* 1 = use channel B for console */
#if (USE_CHANNEL_A == 1)
#define CONSOLE_CONTROL 0xfffe3002
#define CONSOLE_DATA 0xfffe3003
#elif (USE_CHANNEL_B == 1)
#define CONSOLE_CONTROL 0xfffe3000
#define CONSOLE_DATA 0xfffe3001
#endif
#define FOREVER 1 /* infinite loop */
#ifdef M147_INIT
#undef EXTERN
#define EXTERN
#else
#undef EXTERN
#define EXTERN extern
#endif
extern rtems_isr_entry M68Kvec[]; /* vector table address */
/*
* NOTE: Use the standard Clock driver entry
*/
/* functions */
rtems_isr_entry set_vector(
rtems_isr_entry handler,
rtems_vector_number vector,
int type
);
#ifdef __cplusplus
}
#endif
/** @} */
#endif

1
bsps/m68k/mvme147s/include/bsp/irq.h
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#include <bsp/irq-default.h>

40
bsps/m68k/mvme147s/include/tm27.h
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/*
* @file
* @ingroup m68k_mvme147s
* @brief Implementations for interrupt mechanisms for Time Test 27
*/
/*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif
#ifndef __tm27_h
#define __tm27_h
/*
* Define the interrupt mechanism for Time Test 27
*
* NOTE: Use the MPCSR vector for the MVME147
*/
#define MUST_WAIT_FOR_INTERRUPT 0
#define TM27_USE_VECTOR_HANDLER
#define Install_tm27_vector( handler ) set_vector( (handler), \
SOFT_1_VECTOR, 1 )
#define Cause_tm27_intr() pcc->software_int_1_control = 0x0c
/* generate level 4 sotware int. */
#define Clear_tm27_intr() pcc->software_int_1_control = 0x00
#define Lower_tm27_intr() /* empty */
#endif

52
bsps/m68k/mvme147s/mpci/addrconv.c
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/* SPDX-License-Identifier: BSD-2-Clause */
/* Shm_Convert_address
*
* This MVME147 has a "normal" view of the VME address space.
* No address range conversion is required.
*
* Input parameters:
* address - address to convert
*
* Output parameters:
* returns - converted address
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* MVME147 port for TNI - Telecom Bretagne
* by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
* June 1996
*/
#include <rtems.h>
#include <bsp.h>
#include <shm_driver.h>
void *Shm_Convert_address(
void *address
)
{
return ( address );
}

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bsps/m68k/mvme147s/mpci/getcfg.c
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/* SPDX-License-Identifier: BSD-2-Clause */
/* void Shm_Get_configuration( localnode, &shmcfg )
*
* This routine initializes, if necessary, and returns a pointer
* to the Shared Memory Configuration Table for the MVME147.
*
* INPUT PARAMETERS:
* localnode - local node number
* shmcfg - address of pointer to SHM Config Table
*
* OUTPUT PARAMETERS:
* *shmcfg - pointer to SHM Config Table
*
* NOTES: The SIGLP interrupt on the MVME147 is used as an interprocessor
* interrupt.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* MVME147 port for TNI - Telecom Bretagne
* by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
* June 1996
*/
#include <bsp.h>
#include <rtems.h>
#include "shm_driver.h"
#define INTERRUPT 1 /* MVME147 target supports both */
#define POLLING 0 /* polling and interrupt modes */
shm_config_table BSP_shm_cfgtbl;
static uint32_t *BSP_int_address(void)
{
uint32_t id, offset;
id = (uint32_t) vme_lcsr->gcsr_base_address;
offset = (id << 4) & 0xF0;
offset |= 0xffff0003; /* points to GCSR global 1 */
return( (uint32_t * ) offset );
}
void Shm_Get_configuration(
uint32_t localnode,
shm_config_table **shmcfg
)
{
/* A shared mem space has bee left between RAM_END and DRAM_END
on the first node*/
if (localnode == 1)
BSP_shm_cfgtbl.base = (vol_u32 *) RAM_END;
else
BSP_shm_cfgtbl.base = (vol_u32 *) (DRAM_END + RAM_END);
BSP_shm_cfgtbl.length = DRAM_END - RAM_END;
BSP_shm_cfgtbl.format = SHM_BIG;
BSP_shm_cfgtbl.cause_intr = Shm_Cause_interrupt;
#ifdef NEUTRAL_BIG
BSP_shm_cfgtbl.convert = NULL_CONVERT;
#else
BSP_shm_cfgtbl.convert = CPU_swap_u32;
#endif
#if (POLLING==1)
BSP_shm_cfgtbl.poll_intr = POLLED_MODE;
BSP_shm_cfgtbl.Intr.address = NO_INTERRUPT;
BSP_shm_cfgtbl.Intr.value = NO_INTERRUPT;
BSP_shm_cfgtbl.Intr.length = NO_INTERRUPT;
#else
BSP_shm_cfgtbl.poll_intr = INTR_MODE;
BSP_shm_cfgtbl.Intr.address = BSP_int_address(); /* GCSR global 1 */
BSP_shm_cfgtbl.Intr.value = 0x01; /* SIGLP */
BSP_shm_cfgtbl.Intr.length = BYTE;
#endif
*shmcfg = &BSP_shm_cfgtbl;
}

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bsps/m68k/mvme147s/mpci/lock.c
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/* SPDX-License-Identifier: BSD-2-Clause */
/* Shared Memory Lock Routines
*
* This shared memory locked queue support routine need to be
* able to lock the specified locked queue. Interrupts are
* disabled while the queue is locked to prevent preemption
* and deadlock when two tasks poll for the same lock.
* previous level.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems.h>
#include <bsp.h>
#include <shm_driver.h>
/*
* Shm_Initialize_lock
*
* Initialize the lock for the specified locked queue.
*/
void Shm_Initialize_lock(
Shm_Locked_queue_Control *lq_cb
)
{
lq_cb->lock = LQ_UNLOCKED;
}
/* void _Shm_Lock( &lq_cb )
*
* This shared memory locked queue support routine locks the
* specified locked queue. It disables interrupts to prevent
* a deadlock condition.
*/
void Shm_Lock(
Shm_Locked_queue_Control *lq_cb
)
{
uint32_t isr_level;
uint32_t *lockptr = (uint32_t*)&lq_cb->lock;
rtems_interrupt_disable( isr_level );
Shm_isrstat = isr_level;
__asm__ volatile( "lockit:" : : );
__asm__ volatile( "tas %0@" : "=a" (lockptr) : "0" (lockptr) );
__asm__ volatile( "bne lockit" : : );
/* should delay */
}
/*
* Shm_Unlock
*
* Unlock the lock for the specified locked queue.
*/
void Shm_Unlock(
Shm_Locked_queue_Control *lq_cb
)
{
uint32_t isr_level;
lq_cb->lock = SHM_UNLOCK_VALUE;
isr_level = Shm_isrstat;
rtems_interrupt_enable( isr_level );
}

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bsps/m68k/mvme147s/mpci/mpisr.c
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/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* NOTE: This routine is not used when in polling mode. Either
* this routine OR Shm_clockisr is used in a particular system.
*/
/*
* COPYRIGHT (c) 1989-1999, 2016.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* MVME147 port for TNI - Telecom Bretagne
* by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
* June 1996
*/
#include <rtems.h>
#include <bsp.h>
#include <shm_driver.h>
static rtems_isr Shm_isr_mvme147(rtems_vector_number vector)
{
(void) vector;
Shm_Interrupt_count += 1;
rtems_multiprocessing_announce();
vme_gcsr->global_1 = 1; /* clear SIGLP intr */
}
/*
* This driver routine sets the SHM interrupt vector to point to the
* driver's SHM interrupt service routine.
*/
void Shm_setvec(void)
{
/* may need to disable intr */
set_vector( Shm_isr_mvme147, VME_SIGLP_VECTOR, 1 );
}

127
bsps/m68k/mvme147s/start/bspstart.c
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/* SPDX-License-Identifier: BSD-2-Clause */
/*
* This routine does the bulk of the system initialization.
*/
/*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* MVME147 port for TNI - Telecom Bretagne
* by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
* May 1996
*/
#include <bsp.h>
#include <bsp/bootcard.h>
void bsp_start( void )
{
rtems_isr_entry *monitors_vector_table;
int index;
uint8_t node_number;
monitors_vector_table = (rtems_isr_entry *)0; /* 147Bug Vectors are at 0 */
m68k_set_vbr( monitors_vector_table );
for ( index=2 ; index<=255 ; index++ )
M68Kvec[ index ] = monitors_vector_table[ 32 ];
M68Kvec[ 2 ] = monitors_vector_table[ 2 ]; /* bus error vector */
M68Kvec[ 4 ] = monitors_vector_table[ 4 ]; /* breakpoints vector */
M68Kvec[ 9 ] = monitors_vector_table[ 9 ]; /* trace vector */
M68Kvec[ 47 ] = monitors_vector_table[ 47 ]; /* system call vector */
m68k_set_vbr( &M68Kvec );
pcc->int_base_vector = PCC_BASE_VECTOR & 0xF0;
/* Set the PCC int vectors base */
/* VME shared memory configuration */
/* Only the first node shares its top 128k DRAM */
vme_lcsr->utility_interrupt_vector = VME_BASE_VECTOR & 0xF8;
/* Set VMEchip base interrupt vector */
vme_lcsr->utility_interrupt_mask |= 0x02;
/* Enable SIGLP interruption (see shm support) */
pcc->general_purpose_control &= 0x10;
/* Enable VME master interruptions */
if (vme_lcsr->system_controller & 0x01) {
/* the board is system controller */
vme_lcsr->system_controller = 0x08;
/* Make VME access round-robin */
}
#if defined(RTEMS_MULTIPROCESSING)
node_number = (uint8_t)
(rtems_configuration_get_user_multiprocessing_table()->node - 1) & 0xF;
#else
node_number = 1;
#endif
/* Get and store node ID, first node_number = 0 */
vme_gcsr->board_identification = node_number;
vme_lcsr->gcsr_base_address = node_number;
/* Setup the base address of this board's gcsr */
vme_lcsr->timer_configuration = 0x6a;
/* Enable VME time outs, maximum periods */
if (node_number == 0) {
pcc->slave_base_address = 0x01;
/* Set local DRAM base address on the VME bus to the DRAM size */
vme_lcsr->vme_bus_requester = 0x80;
while (! (vme_lcsr->vme_bus_requester & 0x40));
/* Get VMEbus mastership */
vme_lcsr->slave_address_modifier = 0xfb;
/* Share everything */
vme_lcsr->slave_configuration = 0x80;
/* Share local DRAM */
vme_lcsr->vme_bus_requester = 0x0;
/* release bus */
} else {
pcc->slave_base_address = 0;
/* Set local DRAM base address on the VME bus to 0 */
vme_lcsr->vme_bus_requester = 0x80;
while (! (vme_lcsr->vme_bus_requester & 0x40));
/* Get VMEbus mastership */
vme_lcsr->slave_address_modifier = 0x08;
/* Share only the short adress range */
vme_lcsr->slave_configuration = 0;
/* Don't share local DRAM */
vme_lcsr->vme_bus_requester = 0x0;
/* release bus */
}
vme_lcsr->master_address_modifier = 0;
/* Automatically set the address modifier */
vme_lcsr->master_configuration = 1;
/* Disable D32 transfers : they don't work on my VMEbus rack */
rtems_cache_enable_instruction();
rtems_cache_enable_data();
}

49
bsps/m68k/mvme147s/start/linkcmds
View File

@@ -1,49 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/*
* This file contains directives for the GNU linker which are specific
* to the Motorola MVME147s boards.
*/
/*
* COPYRIGHT (c) 1989-2007,2016.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* MVME147 port for TNI - Telecom Bretagne
* by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
* May 1996
*/
MEMORY
{
bootrom_reserved : ORIGIN = 0x00000000, LENGTH = 0x7000
ram : ORIGIN = 0x00007000, LENGTH = 4M - 0x7000
}
REGION_ALIAS ("REGION_TEXT", ram);
REGION_ALIAS ("REGION_TEXT_LOAD", ram);
REGION_ALIAS ("REGION_DATA", ram);
REGION_ALIAS ("REGION_DATA_LOAD", ram);
INCLUDE linkcmds.base

18
spec/build/bsps/m68k/mvme147s/abi.yml
View File

@@ -1,18 +0,0 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-string: null
- split: null
- env-append: null
build-type: option
copyrights:
- Copyright (C) 2020 embedded brains GmbH & Co. KG
default:
- enabled-by: true
value:
- -mcpu=68030
description: |
ABI flags
enabled-by: true
links: []
name: ABI_FLAGS
type: build

57
spec/build/bsps/m68k/mvme147s/bspmvme147s.yml
View File

@@ -1,57 +0,0 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
arch: m68k
bsp: mvme147s
build-type: bsp
cflags: []
copyrights:
- Copyright (C) 2020 embedded brains GmbH & Co. KG
cppflags: []
enabled-by: true
family: mvme147s
includes: []
install:
- destination: ${BSP_INCLUDEDIR}
source:
- bsps/m68k/mvme147s/include/bsp.h
- destination: ${BSP_INCLUDEDIR}/bsp
source:
- bsps/m68k/mvme147s/include/bsp/irq.h
- destination: ${BSP_LIBDIR}
source:
- bsps/m68k/mvme147s/start/linkcmds
- bsps/m68k/shared/start/linkcmds.base
links:
- role: build-dependency
uid: ../grp
- role: build-dependency
uid: abi
- role: build-dependency
uid: objmpci
- role: build-dependency
uid: ../start
- role: build-dependency
uid: ../../obj
- role: build-dependency
uid: ../../objirqdflt
- role: build-dependency
uid: ../../objmem
- role: build-dependency
uid: ../../opto2
- role: build-dependency
uid: ../../bspopts
source:
- bsps/m68k/mvme147/btimer/btimer.c
- bsps/m68k/mvme147/btimer/timerisr.S
- bsps/m68k/mvme147/clock/ckinit.c
- bsps/m68k/mvme147/console/console.c
- bsps/m68k/mvme147s/start/bspstart.c
- bsps/m68k/shared/cache/cache.c
- bsps/m68k/shared/m68kidle.c
- bsps/m68k/shared/memProbe.c
- bsps/shared/dev/getentropy/getentropy-cpucounter.c
- bsps/shared/dev/serial/printk-dummy.c
- bsps/shared/start/bspreset-loop.c
- bsps/shared/start/gettargethash-default.c
- bsps/shared/start/sbrk.c
- bsps/shared/start/setvec.c
type: build

18
spec/build/bsps/m68k/mvme147s/objmpci.yml
View File

@@ -1,18 +0,0 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
build-type: objects
cflags: []
copyrights:
- Copyright (C) 2020 embedded brains GmbH & Co. KG
cppflags: []
cxxflags: []
enabled-by:
- RTEMS_MULTIPROCESSING
includes: []
install: []
links: []
source:
- bsps/m68k/mvme147s/mpci/addrconv.c
- bsps/m68k/mvme147s/mpci/getcfg.c
- bsps/m68k/mvme147s/mpci/lock.c
- bsps/m68k/mvme147s/mpci/mpisr.c
type: build