2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>

PR 1573/cpukit
	* irq.c, rtems/score/cpu.h: Add a per cpu data structure which contains
	the information required by RTEMS for each CPU core. This
	encapsulates information such as thread executing, heir, idle and
	dispatch needed.
This commit is contained in:
Joel Sherrill
2010-06-29 00:31:47 +00:00
parent 1ef0afe60a
commit 9939ecc412
6 changed files with 22 additions and 46 deletions

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@@ -1,3 +1,11 @@
2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* irq.c, rtems/score/cpu.h: Add a per cpu data structure which contains
the information required by RTEMS for each CPU core. This
encapsulates information such as thread executing, heir, idle and
dispatch needed.
2010-05-29 Ralf Corsépius <ralf.corsepius@rtems.org> 2010-05-29 Ralf Corsépius <ralf.corsepius@rtems.org>
* irq.c: Change _exception_stack_frame into void*. * irq.c: Change _exception_stack_frame into void*.

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@@ -19,8 +19,9 @@
#include <rtems/system.h> #include <rtems/system.h>
#include <rtems/score/cpu.h> #include <rtems/score/cpu.h>
#include <rtems/score/isr.h>
#include <rtems/score/thread.h> #include <rtems/score/thread.h>
#include <rtems/score/isr.h>
#include <rtems/score/percpu.h>
/* /*
* This routine provides the RTEMS interrupt management. * This routine provides the RTEMS interrupt management.
@@ -77,13 +78,7 @@ void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr)
if ( _ISR_Nest_level ) if ( _ISR_Nest_level )
return; return;
if ( _Thread_Dispatch_disable_level ) { if ( _Context_Switch_necessary ) {
_ISR_Signals_to_thread_executing = FALSE;
return;
}
if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) {
_ISR_Signals_to_thread_executing = FALSE;
/* save off our stack frame so the context switcher can get to it */ /* save off our stack frame so the context switcher can get to it */
_exception_stack_frame = ifr; _exception_stack_frame = ifr;

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@@ -560,20 +560,6 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
* XXX document implementation including references if appropriate * XXX document implementation including references if appropriate
*/ */
/**
* @ingroup CPUInterrupt
* This variable points to the lowest physical address of the interrupt
* stack.
*/
SCORE_EXTERN void *_CPU_Interrupt_stack_low;
/**
* @ingroup CPUInterrupt
* This variable points to the lowest physical address of the interrupt
* stack.
*/
SCORE_EXTERN void *_CPU_Interrupt_stack_high;
/* /*
* Nothing prevents the porter from declaring more CPU specific variables. * Nothing prevents the porter from declaring more CPU specific variables.
* *

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@@ -1,3 +1,11 @@
2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit
* irq.c, rtems/score/cpu.h: Add a per cpu data structure which contains
the information required by RTEMS for each CPU core. This
encapsulates information such as thread executing, heir, idle and
dispatch needed.
2010-03-27 Joel Sherrill <joel.sherrill@oarcorp.com> 2010-03-27 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu.c, cpu_asm.S, irq.c: Add include of config.h * cpu.c, cpu_asm.S, irq.c: Add include of config.h

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@@ -64,28 +64,21 @@ void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr)
_ISR_Nest_level--; _ISR_Nest_level--;
if( _ISR_Nest_level == 0) if( _ISR_Nest_level == 0) {
{
#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) #if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
stack_ptr = _old_stack_ptr; stack_ptr = _old_stack_ptr;
#endif #endif
if( _Thread_Dispatch_disable_level == 0 ) if( _Thread_Dispatch_disable_level == 0 )
{ {
if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) if ( _Context_Switch_necessary ) {
{
_ISR_Signals_to_thread_executing = FALSE;
_CPU_ISR_Enable( level ); _CPU_ISR_Enable( level );
_Thread_Dispatch(); _Thread_Dispatch();
/* may have switched to another task and not return here immed. */ /* may have switched to another task and not return here immed. */
_CPU_ISR_Disable( level ); /* Keep _pairs_ of Enable/Disable */ _CPU_ISR_Disable( level ); /* Keep _pairs_ of Enable/Disable */
} }
} }
else }
{
_ISR_Signals_to_thread_executing = FALSE;
};
};
_CPU_ISR_Enable( level ); _CPU_ISR_Enable( level );
} }

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@@ -590,20 +590,6 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context;
* XXX document implementation including references if appropriate * XXX document implementation including references if appropriate
*/ */
/**
* @ingroup CPUInterrupt
* This variable points to the lowest physical address of the interrupt
* stack.
*/
SCORE_EXTERN void *_CPU_Interrupt_stack_low;
/**
* @ingroup CPUInterrupt
* This variable points to the lowest physical address of the interrupt
* stack.
*/
SCORE_EXTERN void *_CPU_Interrupt_stack_high;
/* /*
* Nothing prevents the porter from declaring more CPU specific variables. * Nothing prevents the porter from declaring more CPU specific variables.
* *