Patches from Eric Norum:

Here are some patches to the gen68360 BSP.  The improvements include:
        Boot prom run-time selection of DRAM size (1/4/16 Mbytes)
        Full 32-bit ethernet address obtained from boot prom.
        Updated README.
This commit is contained in:
Joel Sherrill
1998-03-23 18:35:41 +00:00
parent 61bbe54311
commit 98bcbda39d
9 changed files with 81 additions and 170 deletions

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@@ -3,17 +3,7 @@
# #
# #
# This package works best with a version of GCC that has been modified # This package requires a version of GCC that supports the `-mcpu32' option.
# to support the `-mcpu32' argument. I have submitted the required
# changes to the GCC maintainers.
#
#
# As of 1998/01/22, no gcc version (gcc 2.8.0 and egcs 1.0 are current)
# includes proper multilib support for the 68360. This is basically
# a m68020 without bitfields from gcc's perspective and there is
# no multilib entry which corresponds to this. See the tool build
# INSTRUCTIONS for information on how to address this.
# #
# #
@@ -30,7 +20,7 @@
# #
# This board support package works with several different versions of # This board support package works with several different versions of
# MC68360 systems. The choice of hardware is made at the final link-edit # MC68360 systems. The choice of hardware is made at the final link-edit
# phase by setting the Makefile LDFLAGS definition appropriately. # phase by setting the Makefile CLAGS_LD definition appropriately.
# #
# Decisions made at compile time include: # Decisions made at compile time include:
# - If the CPU is a member of the 68040 family, the BSP is # - If the CPU is a member of the 68040 family, the BSP is
@@ -42,19 +32,12 @@
# as described in Chapter 9 of the MC68360 User's Manual. # as described in Chapter 9 of the MC68360 User's Manual.
# #
# Decisions to be made a link-edit time are: # Decisions to be made a link-edit time are:
# - The amount of dynamic RAM in the system. This value applies
# only to hardware versions which support different sizes of RAM.
# The default value is 4 Mbytes. To specify 16 Mbytes of memory,
# --defsym RamSize=0x1000000
#
# - The size of the memory allocator heap. The default value is # - The size of the memory allocator heap. The default value is
# 64 kbytes. If the KA9Q network package is used the heap # 64 kbytes. If the KA9Q network package is used the heap
# should be at least 256 kbytes. If your network is large, or # should be at least 256 kbytes. If your network is large, or
# busy, the heap should be even larger. # busy, the heap should be even larger.
# To choose a heap size of 256 kbytes, # To choose a heap size of 256 kbytes,
# --defsym HeapSize=0x40000 # CFLAGS_LD += -Wl,--defsym -Wl,HeapSize=0x40000
#
# - The Ethernet address for network boot proms.
BSP NAME: gen68360 or gen68360_040 BSP NAME: gen68360 or gen68360_040
BOARD: Generic 68360 as described in Motorola MC68360 User's Manual BOARD: Generic 68360 as described in Motorola MC68360 User's Manual
@@ -103,13 +86,11 @@ Board description
clock rate: 25 MHz clock rate: 25 MHz
bus width: 8-bit PROM, 32-bit DRAM bus width: 8-bit PROM, 32-bit DRAM
ROM: To 1 MByte, 180 nsec (3 wait states), chip select 0 ROM: To 1 MByte, 180 nsec (3 wait states), chip select 0
RAM: 1 to 64 MByte DRAM SIMM, 60 nsec (0 wait states), parity or nonparity RAM: 1 to 16 MByte DRAM SIMM, 60 nsec (0 wait states), parity or nonparity
Host System Host System
----------- -----------
NEXTSTEP 3.3 (Intel and Motorola), Solaris 2.5 OPENSTEP 4.2 (Intel and Motorola), Solaris 2.5, Linux 2.0.29
gcc-2.7.2
binutils-2.6
Verification (Standalone 68360) Verification (Standalone 68360)
------------------------------- -------------------------------

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@@ -124,7 +124,7 @@ m68k_isr_entry set_vector(
/* /*
* Values assigned by link editor * Values assigned by link editor
*/ */
extern void *_RomBase, *_RamBase, *_RamSize; extern void *_RomBase, *_RamBase;
/* /*
* Definitions for Atlas Computer Equipment Inc. High Speed Bridge (HSB) * Definitions for Atlas Computer Equipment Inc. High Speed Bridge (HSB)

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@@ -817,29 +817,17 @@ rtems_ka9q_driver_attach (int argc, char *argv[], void *p)
* pointer as part of the CPU32's hardware * pointer as part of the CPU32's hardware
* reset exception handler. The following * reset exception handler. The following
* 4 bytes contain the value loaded into the * 4 bytes contain the value loaded into the
* program counter. The low order three * program counter. The boards' Ethernet
* octets of the boards' Ethernet address are * address is stored in the six bytes
* stored in the three bytes immediately * immediately preceding this initial
* preceding this initial program counter value. * program counter value.
* *
* See startup/linkcmds and start360/start360.s * See start360/start360.s.
* for details on how this is done.
*
* The high order three octets of the Ethernet
* address are fixed and indicate that the
* address is that of a Motorola device.
*/ */
extern void *_RomBase; /* From linkcmds */ extern void *_RomBase; /* From linkcmds */
const unsigned long *ExceptionVectors; const unsigned long *ExceptionVectors;
const unsigned char *entryPoint; const unsigned char *entryPoint;
/*
* Set up the fixed portion of the address
*/
iface->hwaddr[0] = 0x08;
iface->hwaddr[1] = 0x00;
iface->hwaddr[2] = 0x3e;
/* /*
* Sanity check -- assume entry point must be * Sanity check -- assume entry point must be
* within 1 MByte of beginning of boot ROM. * within 1 MByte of beginning of boot ROM.
@@ -849,14 +837,15 @@ rtems_ka9q_driver_attach (int argc, char *argv[], void *p)
if (((unsigned long)entryPoint - (unsigned long)ExceptionVectors) if (((unsigned long)entryPoint - (unsigned long)ExceptionVectors)
>= (1 * 1024 * 1024)) { >= (1 * 1024 * 1024)) {
printf ("Warning -- Ethernet address can not be found in bootstrap PROM.\n"); printf ("Warning -- Ethernet address can not be found in bootstrap PROM.\n");
iface->hwaddr[0] = 0x08;
iface->hwaddr[1] = 0xF3;
iface->hwaddr[2] = 0x3E;
iface->hwaddr[3] = 0xC2; iface->hwaddr[3] = 0xC2;
iface->hwaddr[4] = 0xE7; iface->hwaddr[4] = 0xE7;
iface->hwaddr[5] = 0x08; iface->hwaddr[5] = 0x08;
} }
else { else {
iface->hwaddr[3] = entryPoint[-3]; memcpy (iface->hwaddr, entryPoint - 6, 6);
iface->hwaddr[4] = entryPoint[-2];
iface->hwaddr[5] = entryPoint[-1];
} }
} }
else { else {

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@@ -308,16 +308,14 @@ SYM(_spuriousInterrupt):
/* /*
* Place the low-order 3 octets of the board's ethernet address at * Place the low-order 3 octets of the board's ethernet address at
* a `well-known' fixed location relative to the beginning of ROM. * a `well-known' fixed location relative to the startup location.
*/ */
.align 2 .align 2
.long ETHERNET_ADDRESS | Low-order 3 octets of ethernet address .word 0 | Padding
ethernet_address_buffer:
/* .word 0x08F3 | Default address
* For some reason, the symbol start must not be global. .word 0xDEAD
* .word 0xCAFE
* .global start
*/
/* /*
* Initial PC * Initial PC

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@@ -308,16 +308,14 @@ SYM(_spuriousInterrupt):
/* /*
* Place the low-order 3 octets of the board's ethernet address at * Place the low-order 3 octets of the board's ethernet address at
* a `well-known' fixed location relative to the beginning of ROM. * a `well-known' fixed location relative to the startup location.
*/ */
.align 2 .align 2
.long ETHERNET_ADDRESS | Low-order 3 octets of ethernet address .word 0 | Padding
ethernet_address_buffer:
/* .word 0x08F3 | Default address
* For some reason, the symbol start must not be global. .word 0xDEAD
* .word 0xCAFE
* .global start
*/
/* /*
* Initial PC * Initial PC

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@@ -38,7 +38,7 @@ void _Init68360 (void)
m68k_isr_entry *vbr; m68k_isr_entry *vbr;
extern void _CopyDataClearBSSAndStart (void); extern void _CopyDataClearBSSAndStart (void);
#if (defined (m68040) || defined (m68lc040) || defined (m68ec040)) #if (defined (__mc68040__))
/* /*
******************************************* *******************************************
* Motorola 68040 and companion-mode 68360 * * Motorola 68040 and companion-mode 68360 *
@@ -407,35 +407,19 @@ void _Init68360 (void)
/* /*
* Step 11: Remap Chip Select 0 (CS0*), set up GMR * Step 11: Remap Chip Select 0 (CS0*), set up GMR
* 32-bit DRAM
* Internal DRAM address multiplexing
* 60 nsec DRAM
* 180 nsec ROM (3 wait states)
* 15.36 usec DRAM refresh interval
* The DRAM page size selection is not modified since this
* startup code may be running in a bootstrap PROM or in
* a program downloaded by the bootstrap PROM.
*/ */
/* m360.gmr = (m360.gmr & 0x001C0000) | M360_GMR_RCNT(23) |
* 1024/2048/4096 addresses per DRAM page (1M/4M/16M DRAM chips) M360_GMR_RFEN | M360_GMR_RCYC(0) |
* 60 nsec DRAM
* 180 nsec ROM (3 wait states)
*/
switch ((unsigned long)&_RamSize) {
default:
case 4*1024*1024:
m360.gmr = M360_GMR_RCNT(23) | M360_GMR_RFEN |
M360_GMR_RCYC(0) | M360_GMR_PGS(3) |
M360_GMR_DPS_32BIT | M360_GMR_NCS | M360_GMR_DPS_32BIT | M360_GMR_NCS |
M360_GMR_GAMX; M360_GMR_GAMX;
break;
case 16*1024*1024:
m360.gmr = M360_GMR_RCNT(23) | M360_GMR_RFEN |
M360_GMR_RCYC(0) | M360_GMR_PGS(5) |
M360_GMR_DPS_32BIT | M360_GMR_NCS |
M360_GMR_GAMX;
break;
case 64*1024*1024:
m360.gmr = M360_GMR_RCNT(23) | M360_GMR_RFEN |
M360_GMR_RCYC(0) | M360_GMR_PGS(7) |
M360_GMR_DPS_32BIT | M360_GMR_NCS |
M360_GMR_GAMX;
break;
}
m360.memc[0].br = (unsigned long)&_RomBase | M360_MEMC_BR_WP | m360.memc[0].br = (unsigned long)&_RomBase | M360_MEMC_BR_WP |
M360_MEMC_BR_V; M360_MEMC_BR_V;
m360.memc[0].or = M360_MEMC_OR_WAITS(3) | M360_MEMC_OR_1MB | m360.memc[0].or = M360_MEMC_OR_WAITS(3) | M360_MEMC_OR_1MB |
@@ -443,48 +427,54 @@ void _Init68360 (void)
/* /*
* Step 12: Initialize the system RAM * Step 12: Initialize the system RAM
* Do this only if the DRAM has not already been set up
*/ */
/* if ((m360.memc[1].br & M360_MEMC_BR_V) == 0) {
* Set up option/base registers /*
* 4M/16M/64M DRAM * Set up GMR DRAM page size, option and base registers
* 60 nsec DRAM * Assume 16Mbytes of DRAM
* Wait for chips to power up * 60 nsec DRAM
* Perform 8 read cycles */
* Set all parity bits to correct state m360.gmr = (m360.gmr & ~0x001C0000) | M360_GMR_PGS(5);
* Enable parity checking
*/
switch ((unsigned long)&_RamSize) {
default:
case 4*1024*1024:
m360.memc[1].or = M360_MEMC_OR_TCYC(0) | m360.memc[1].or = M360_MEMC_OR_TCYC(0) |
M360_MEMC_OR_4MB | M360_MEMC_OR_16MB |
M360_MEMC_OR_DRAM; M360_MEMC_OR_DRAM;
break; m360.memc[1].br = (unsigned long)&_RamBase | M360_MEMC_BR_V;
case 16*1024*1024: /*
m360.memc[1].or = M360_MEMC_OR_TCYC(0) | * Wait for chips to power up
M360_MEMC_OR_16MB | * Perform 8 read cycles
M360_MEMC_OR_DRAM; */
break; for (i = 0; i < 50000; i++)
continue;
for (i = 0; i < 8; ++i)
*((volatile unsigned long *)(unsigned long)&_RamBase);
case 64*1024*1024: /*
m360.memc[1].or = M360_MEMC_OR_TCYC(0) | * Determine memory size (1, 4, or 16 Mbytes)
M360_MEMC_OR_64MB | * Set GMR DRAM page size appropriately.
M360_MEMC_OR_DRAM; * The OR is left at 16 Mbytes. The bootstrap PROM places its
break; * .data and .bss segments at the top of the 16 Mbyte space.
* A 1 Mbyte or 4 Mbyte DRAM will show up several times in
* the memory map, but will work with the same bootstrap PROM.
*/
*(volatile char *)&_RamBase = 0;
*((volatile char *)&_RamBase+0x00C01800) = 1;
if (*(volatile char *)&_RamBase) {
m360.gmr = (m360.gmr & ~0x001C0000) | M360_GMR_PGS(1);
}
else {
*((volatile char *)&_RamBase+0x00801000) = 1;
if (*(volatile char *)&_RamBase) {
m360.gmr = (m360.gmr & ~0x001C0000) | M360_GMR_PGS(3);
}
}
/*
* Enable parity checking
*/
m360.memc[1].br |= M360_MEMC_BR_PAREN;
} }
m360.memc[1].br = (unsigned long)&_RamBase | M360_MEMC_BR_V;
for (i = 0; i < 50000; i++)
continue;
for (i = 0; i < 8; ++i)
*((volatile unsigned long *)(unsigned long)&_RamBase);
for (i = 0 ; i < (unsigned long)&_RamSize ; i += sizeof (unsigned long)) {
volatile unsigned long *lp;
lp = (unsigned long *)((unsigned char *)&_RamBase + i);
*lp = *lp;
}
m360.memc[1].br = (unsigned long)&_RamBase |
M360_MEMC_BR_PAREN | M360_MEMC_BR_V;
/* /*
* Step 13: Copy the exception vector table to system RAM * Step 13: Copy the exception vector table to system RAM

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@@ -17,15 +17,11 @@
* number used there is not constant. If this happens to you, edit * number used there is not constant. If this happens to you, edit
* the lines marked XXX below to use a constant value. * the lines marked XXX below to use a constant value.
*/ */
RamSize = DEFINED(RamSize) ? RamSize : 4M;
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x10000; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x10000;
StackSize = DEFINED(StackSize) ? StackSize : 0x1000; StackSize = DEFINED(StackSize) ? StackSize : 0x1000;
/* /*
* Declare on-board memory. * Declare on-board memory.
* It would be nice if the ram length could be given as
* LENGTH=RamSize, but gld doesn't allow non-constant
* values in the LENGTH expression.
*/ */
MEMORY { MEMORY {
ram : ORIGIN = 0x00000000, LENGTH = 64M ram : ORIGIN = 0x00000000, LENGTH = 64M
@@ -33,21 +29,10 @@ MEMORY {
dpram : ORIGIN = 0x0E000000, LENGTH = 8k dpram : ORIGIN = 0x0E000000, LENGTH = 8k
} }
/*
* Declare low-order three octets of Ethernet address.
*/
ETHERNET_ADDRESS = DEFINED(ETHERNET_ADDRESS) ? ETHERNET_ADDRESS : 0xDEAD12;
/* /*
* Load objects * Load objects
*/ */
SECTIONS { SECTIONS {
/*
* Hardware variations
*/
_RamSize = RamSize;
__RamSize = RamSize;
/* /*
* Boot PROM * Boot PROM
*/ */

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@@ -21,15 +21,11 @@
* number used there is not constant. If this happens to you, edit * number used there is not constant. If this happens to you, edit
* the lines marked XXX below to use a constant value. * the lines marked XXX below to use a constant value.
*/ */
RamSize = DEFINED(RamSize) ? RamSize : 4M;
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x10000; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x10000;
StackSize = DEFINED(StackSize) ? StackSize : 0x1000; StackSize = DEFINED(StackSize) ? StackSize : 0x1000;
/* /*
* Declare on-board memory. * Declare on-board memory.
* It would be nice if the ram length could be given as
* LENGTH=RamSize, but gld doesn't allow non-constant
* values in the LENGTH expression.
*/ */
MEMORY { MEMORY {
ram : ORIGIN = 0x00000000, LENGTH = 64M ram : ORIGIN = 0x00000000, LENGTH = 64M
@@ -38,21 +34,10 @@ MEMORY {
dpram : ORIGIN = 0x0E000000, LENGTH = 8k dpram : ORIGIN = 0x0E000000, LENGTH = 8k
} }
/*
* Declare low-order three octets of Ethernet address.
*/
ETHERNET_ADDRESS = DEFINED(ETHERNET_ADDRESS) ? ETHERNET_ADDRESS : 0xDEAD12;
/* /*
* Load objects * Load objects
*/ */
SECTIONS { SECTIONS {
/*
* Hardware variations
*/
_RamSize = RamSize;
__RamSize = RamSize;
/* /*
* Boot PROM * Boot PROM
*/ */

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@@ -28,15 +28,11 @@ OUTPUT_FORMAT(coff-m68k)
* number used there is not constant. If this happens to you, edit * number used there is not constant. If this happens to you, edit
* the lines marked XXX below to use a constant value. * the lines marked XXX below to use a constant value.
*/ */
RamSize = DEFINED(RamSize) ? RamSize : 4M;
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x10000; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x10000;
StackSize = DEFINED(StackSize) ? StackSize : 0x1000; StackSize = DEFINED(StackSize) ? StackSize : 0x1000;
/* /*
* Declare on-board memory. * Declare on-board memory.
* It would be nice if the ram length could be given as
* LENGTH=RamSize, but gld doesn't allow non-constant
* values in the LENGTH expression.
*/ */
MEMORY { MEMORY {
ram : ORIGIN = 0x00000000, LENGTH = 64M ram : ORIGIN = 0x00000000, LENGTH = 64M
@@ -44,21 +40,10 @@ MEMORY {
dpram : ORIGIN = 0xFE000000, LENGTH = 8k dpram : ORIGIN = 0xFE000000, LENGTH = 8k
} }
/*
* Declare low-order three octets of Ethernet address.
*/
ETHERNET_ADDRESS = DEFINED(ETHERNET_ADDRESS) ? ETHERNET_ADDRESS : 0xDEAD12;
/* /*
* Load objects * Load objects
*/ */
SECTIONS { SECTIONS {
/*
* Hardware variations
*/
_RamSize = RamSize;
__RamSize = RamSize;
/* /*
* Boot PROM * Boot PROM
*/ */