diff --git a/bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c b/bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c
index c71cb4b546..01b4ef856c 100644
--- a/bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c
+++ b/bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c
@@ -39,12 +39,26 @@
 
 void bsp_reset( rtems_fatal_source source, rtems_fatal_code code )
 {
+  /* CRL_APB_RESET_CTRL */
+  volatile uint32_t *reset_ctrl = (volatile uint32_t *) 0xff5e0218;
+
   (void) source;
   (void) code;
 
   zynqmp_debug_console_flush();
 
+  /*
+   * This is a workaround for:
+   *
+   * https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108658
+   */
+  __asm__ volatile ("");
+
   while (true) {
-    /* Wait */
+    /*
+     * Request a soft system reset.  This is a system-level reset which is the
+     * equivalent to asserting the external PS_SRST_B reset signal pin.
+     */
+    *reset_ctrl |= UINT32_C(0x10);
   }
 }