forked from Imagelibrary/rtems
bsps: Move interrupt controller support to bsps
This patch is a part of the BSP source reorganization. Update #3285.
This commit is contained in:
Sebastian Huber
168
bsps/arm/raspberrypi/irq/irq.c
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168
bsps/arm/raspberrypi/irq/irq.c
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/**
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* @file irq.c
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*
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* @ingroup raspberrypi_interrupt
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*
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* @brief Interrupt support.
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*/
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/*
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* Copyright (c) 2014 Andre Marques <andre.lousa.marques at gmail.com>
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*
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* Copyright (c) 2009
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* embedded brains GmbH
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* Obere Lagerstr. 30
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* D-82178 Puchheim
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* Germany
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* <rtems@embedded-brains.de>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#include <rtems/score/armv4.h>
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#include <bsp.h>
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#include <bsp/irq.h>
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#include <bsp/irq-generic.h>
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#include <bsp/raspberrypi.h>
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#include <bsp/linker-symbols.h>
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#include <bsp/mmu.h>
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#include <rtems/bspIo.h>
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#include <strings.h>
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#ifdef RTEMS_SMP
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#include <rtems/score/smp.h>
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#include <rtems/score/smpimpl.h>
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#endif
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typedef struct {
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unsigned long enable_reg_addr;
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unsigned long disable_reg_addr;
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} bcm2835_irq_ctrl_reg_t;
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static const bcm2835_irq_ctrl_reg_t bcm2835_irq_ctrl_reg_table[] = {
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{ BCM2835_IRQ_ENABLE1, BCM2835_IRQ_DISABLE1 },
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{ BCM2835_IRQ_ENABLE2, BCM2835_IRQ_DISABLE2 },
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{ BCM2835_IRQ_ENABLE_BASIC, BCM2835_IRQ_DISABLE_BASIC }
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};
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static inline const bcm2835_irq_ctrl_reg_t *
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bsp_vector_to_reg(rtems_vector_number vector)
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{
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return bcm2835_irq_ctrl_reg_table + (vector >> 5);
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}
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static inline uint32_t
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bsp_vector_to_mask(rtems_vector_number vector)
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{
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return 1 << (vector & 0x1f);
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}
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static const int bcm2835_irq_speedup_table[] =
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{
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/* 0 */ BCM2835_IRQ_ID_BASIC_BASE_ID + 0,
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/* 1 */ BCM2835_IRQ_ID_BASIC_BASE_ID + 1,
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/* 2 */ BCM2835_IRQ_ID_BASIC_BASE_ID + 2,
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/* 3 */ BCM2835_IRQ_ID_BASIC_BASE_ID + 3,
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/* 4 */ BCM2835_IRQ_ID_BASIC_BASE_ID + 4,
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/* 5 */ BCM2835_IRQ_ID_BASIC_BASE_ID + 5,
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/* 6 */ BCM2835_IRQ_ID_BASIC_BASE_ID + 6,
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/* 7 */ BCM2835_IRQ_ID_BASIC_BASE_ID + 7,
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/* 8 */ -1, /* One or more bits set in pending register 1 */
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/* 9 */ -2, /* One or more bits set in pending register 2 */
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/* 10 */ 7, /* GPU IRQ 7 */
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/* 11 */ 9, /* GPU IRQ 9 */
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/* 12 */ 10, /* GPU IRQ 10 */
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/* 13 */ 18, /* GPU IRQ 18 */
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/* 14 */ 19, /* GPU IRQ 19 */
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/* 15 */ 53, /* GPU IRQ 53 */
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/* 16 */ 54, /* GPU IRQ 54 */
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/* 17 */ 55, /* GPU IRQ 55 */
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/* 18 */ 56, /* GPU IRQ 56 */
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/* 19 */ 57, /* GPU IRQ 57 */
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/* 20 */ 62, /* GPU IRQ 62 */
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};
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/*
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* Define which basic peding register (BCM2835_IRQ_BASIC) bits
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* should be processed through bcm2835_irq_speedup_table
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*/
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#define BCM2835_IRQ_BASIC_SPEEDUP_USED_BITS 0x1ffcff
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/*
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* Determine the source of the interrupt and dispatch the correct handler.
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*/
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void bsp_interrupt_dispatch(void)
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{
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unsigned int pend;
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unsigned int pend_bit;
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rtems_vector_number vector = 255;
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#ifdef RTEMS_SMP
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uint32_t cpu_index_self = _SMP_Get_current_processor();
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uint32_t local_source = BCM2835_REG(BCM2836_IRQ_SOURCE_REG(cpu_index_self));
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if ( local_source & BCM2836_IRQ_SOURCE_MBOX3 ) {
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/* reset mailbox 3 contents to zero */
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BCM2835_REG(BCM2836_MAILBOX_3_READ_CLEAR_BASE + 0x10 * cpu_index_self) = 0xffffffff;
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_SMP_Inter_processor_interrupt_handler();
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}
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if ( cpu_index_self != 0 )
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return;
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#endif /* RTEMS_SMP */
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pend = BCM2835_REG(BCM2835_IRQ_BASIC);
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if ( pend & BCM2835_IRQ_BASIC_SPEEDUP_USED_BITS ) {
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pend_bit = ffs(pend) - 1;
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vector = bcm2835_irq_speedup_table[pend_bit];
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} else {
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pend = BCM2835_REG(BCM2835_IRQ_PENDING1);
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if ( pend != 0 ) {
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pend_bit = ffs(pend) - 1;
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vector = pend_bit;
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} else {
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pend = BCM2835_REG(BCM2835_IRQ_PENDING2);
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if ( pend != 0 ) {
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pend_bit = ffs(pend) - 1;
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vector = pend_bit + 32;
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}
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}
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}
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if ( vector < 255 )
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{
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bsp_interrupt_handler_dispatch(vector);
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}
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}
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void bsp_interrupt_vector_enable(rtems_vector_number vector)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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BCM2835_REG(bsp_vector_to_reg(vector)->enable_reg_addr) =
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bsp_vector_to_mask(vector);
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}
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void bsp_interrupt_vector_disable(rtems_vector_number vector)
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{
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bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
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BCM2835_REG(bsp_vector_to_reg(vector)->disable_reg_addr) =
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bsp_vector_to_mask(vector);
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}
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void bsp_interrupt_handler_default(rtems_vector_number vector)
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{
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printk("spurious interrupt: %lu\n", vector);
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}
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rtems_status_code bsp_interrupt_facility_initialize(void)
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{
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BCM2835_REG(BCM2835_IRQ_DISABLE1) = 0xffffffff;
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BCM2835_REG(BCM2835_IRQ_DISABLE2) = 0xffffffff;
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BCM2835_REG(BCM2835_IRQ_DISABLE_BASIC) = 0xffffffff;
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BCM2835_REG(BCM2835_IRQ_FIQ_CTRL) = 0;
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return RTEMS_SUCCESSFUL;
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}
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