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riscv: Implement _CPU_Context_volatile_clobber()

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Update #3433.
This commit is contained in:
Sebastian Huber
2018-06-27 08:57:08 +02:00
parent b706b4a3c0
commit 8f035cb85a
2 changed files with 16 additions and 16 deletions
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5
cpukit/score/cpu/riscv/include/rtems/score/cpu.h
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@@ -415,10 +415,7 @@ static inline uint32_t CPU_swap_u32(
#define CPU_swap_u16( value ) \ #define CPU_swap_u16( value ) \
(((value&0xff) << 8) | ((value >> 8)&0xff)) (((value&0xff) << 8) | ((value >> 8)&0xff))
static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) void _CPU_Context_volatile_clobber( uintptr_t pattern );
{
/* TODO */
}
static inline void _CPU_Context_validate( uintptr_t pattern ) static inline void _CPU_Context_validate( uintptr_t pattern )
{ {

27
cpukit/score/cpu/riscv/riscv-context-volatile-clobber.S
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@@ -1,4 +1,5 @@
/* /*
* Copyright (c) 2018 embedded brains GmbH
* Copyright (c) 2015 Hesham Almatary <hesham@alumni.york.ac.uk> * Copyright (c) 2015 Hesham Almatary <hesham@alumni.york.ac.uk>
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@@ -35,17 +36,19 @@
PUBLIC(_CPU_Context_volatile_clobber) PUBLIC(_CPU_Context_volatile_clobber)
SYM(_CPU_Context_volatile_clobber): SYM(_CPU_Context_volatile_clobber):
.macro clobber_register reg addi a1, a0, 1
addi t0, t0, -1 addi a2, a0, 2
mv \reg, t0 addi a3, a0, 3
.endm addi a4, a0, 4
addi a5, a0, 5
clobber_register a0 addi a6, a0, 6
clobber_register a1 addi a7, a0, 7
clobber_register a2 addi t0, a0, 8
clobber_register a3 addi t1, a0, 9
clobber_register a4 addi t2, a0, 10
clobber_register a5 addi t3, a0, 11
clobber_register a6 addi t4, a0, 12
addi t5, a0, 13
addi t6, a0, 14
ret ret