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Patch from John Cotton <john.cotton@nrc.ca>, Charles-Antoine Gauthier

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<charles.gauthier@iit.nrc.ca>, and Darlene A. Stewart
<Darlene.Stewart@nrc.ca> to add support for a number of very
significant things:

  + BSPs for many variations on the Motorola MBX8xx board series
  + Cache Manager including initial support for m68040
    and PowerPC
  + Rework of mpc8xx libcpu code so all mpc8xx CPUs now use
    same code base.
  + Rework of eth_comm BSP to utiltize above.

John reports this works on the 821 and 860
This commit is contained in:
Joel Sherrill
2000-06-12 19:57:02 +00:00
parent f481c39c01
commit 8ef38186fa
125 changed files with 13345 additions and 503 deletions
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30
c/src/lib/libcpu/i386/page.c
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@@ -45,7 +45,7 @@ extern rtems_unsigned32 rtemsFreeMemStart;
void _CPU_disable_paging() {
cr0 regCr0;
flush_cache();
rtems_flush_entire_data_cache();
regCr0.i = i386_get_cr0();
regCr0.cr0.paging = 0;
i386_set_cr0( regCr0.i );
@@ -60,7 +60,7 @@ void _CPU_enable_paging() {
regCr0.i = i386_get_cr0();
regCr0.cr0.paging = 1;
i386_set_cr0( regCr0.i );
flush_cache();
rtems_flush_entire_data_cache();
}
@@ -153,32 +153,6 @@ int init_paging() {
return 0;
}
/*
* Disable the entire cache
*/
void _CPU_disable_cache() {
cr0 regCr0;
regCr0.i = i386_get_cr0();
regCr0.cr0.page_level_cache_disable = 1;
regCr0.cr0.no_write_through = 1;
i386_set_cr0( regCr0.i );
flush_cache();
}
/*
* Disable the entire cache
*/
void _CPU_enable_cache() {
cr0 regCr0;
regCr0.i = i386_get_cr0();
regCr0.cr0.page_level_cache_disable = 0;
regCr0.cr0.no_write_through = 0;
i386_set_cr0( regCr0.i );
/*flush_cache();*/
}
/*
* Is cache enable
*/