riscv: Rework exception handling

Remove _CPU_ISR_install_raw_handler() and _CPU_ISR_install_vector()
functions.  Applications can install an exception handler via the fatal
error handler to handle synchronous exceptions.

Handle interrupt exceptions via _RISCV_Interrupt_dispatch() which must
be provided by the BSP.

Update #3433.
This commit is contained in:
Sebastian Huber
2018-07-19 12:11:19 +02:00
parent 5694b0cce4
commit 8db3f0e878
15 changed files with 120 additions and 170 deletions

View File

@@ -142,7 +142,9 @@ typedef enum {
/* RISC-V fatal codes */
RISCV_FATAL_NO_TIMEBASE_FREQUENCY_IN_DEVICE_TREE = BSP_FATAL_CODE_BLOCK(13),
RISCV_FATAL_NO_NS16550_REG_IN_DEVICE_TREE,
RISCV_FATAL_NO_NS16550_CLOCK_FREQUENCY_IN_DEVICE_TREE
RISCV_FATAL_NO_NS16550_CLOCK_FREQUENCY_IN_DEVICE_TREE,
RISCV_FATAL_UNEXPECTED_INTERRUPT_EXCEPTION,
RISCV_FATAL_CLOCK_IRQ_INSTALL
} bsp_fatal_code;
RTEMS_NO_RETURN static inline void