bsp/genmcf548x: Add initial values for INTC_ICRn

According to the manual the application must use unique and
non-overlapping level and priority definitions for enabled interrupts.

c/src/lib/libbsp/m68k/genmcf548x/Makefile.am

@@ -55,6 +55,7 @@ libbsp_a_SOURCES += ../../shared/src/irq-legacy.c
 libbsp_a_SOURCES += ../../shared/src/irq-server.c
 libbsp_a_SOURCES += ../../shared/src/irq-shell.c
 libbsp_a_SOURCES += irq/irq.c
+libbsp_a_SOURCES += irq/intc-icr-init-values.c
 
 if HAS_NETWORKING
 network_CPPFLAGS = -D__INSIDE_RTEMS_BSD_TCPIP_STACK__

c/src/lib/libbsp/m68k/genmcf548x/clock/clock.c

@@ -90,8 +90,6 @@
 #define Clock_driver_support_initialize_hardware()			\
   do {									\
     int level;								\
-    MCF548X_INTC_ICR54 =   MCF548X_INTC_ICRn_IL(SLT0_IRQ_LEVEL) |	\
-      MCF548X_INTC_ICRn_IP(SLT0_IRQ_PRIORITY);				\
     rtems_interrupt_disable( level );					\
     MCF548X_INTC_IMRH &= ~(MCF548X_INTC_IMRH_INT_MASK54);		\
     rtems_interrupt_enable( level );					\

c/src/lib/libbsp/m68k/genmcf548x/console/console.c

@@ -487,26 +487,18 @@ IntUartInitialize(void)
 		rtems_interrupt_disable(level);
         switch(chan) {
         case 0:
-            MCF548X_INTC_ICR35 =   MCF548X_INTC_ICRn_IL(PSC0_IRQ_LEVEL) |
-                               MCF548X_INTC_ICRn_IP(PSC0_IRQ_PRIORITY);
             MCF548X_INTC_IMRH &= ~(MCF548X_INTC_IMRH_INT_MASK35);
             break;
 
         case 1:
-            MCF548X_INTC_ICR34 =   MCF548X_INTC_ICRn_IL(PSC1_IRQ_LEVEL) |
-                               MCF548X_INTC_ICRn_IP(PSC1_IRQ_PRIORITY);
             MCF548X_INTC_IMRH &= ~(MCF548X_INTC_IMRH_INT_MASK34);
             break;
 
         case 2:
-            MCF548X_INTC_ICR33 =   MCF548X_INTC_ICRn_IL(PSC2_IRQ_LEVEL) |
-                               MCF548X_INTC_ICRn_IP(PSC2_IRQ_PRIORITY);
             MCF548X_INTC_IMRH &= ~(MCF548X_INTC_IMRH_INT_MASK33);
             break;
 
         case 3:
-            MCF548X_INTC_ICR32 =   MCF548X_INTC_ICRn_IL(PSC3_IRQ_LEVEL) |
-                               MCF548X_INTC_ICRn_IP(PSC3_IRQ_PRIORITY);
             MCF548X_INTC_IMRH &= ~(MCF548X_INTC_IMRH_INT_MASK32);
             break;
         }

c/src/lib/libbsp/m68k/genmcf548x/include/bsp.h

@@ -86,24 +86,8 @@ rtems_isr_entry set_vector(
   int                 type
 );
 
-/*
+/* Initial values for the interrupt level and priority registers (INTC_ICRn) */
- * Interrupt assignments
+extern const uint8_t mcf548x_intc_icr_init_values[64];
- *  Highest-priority listed first
- */
-#define SLT0_IRQ_LEVEL      4
-#define SLT0_IRQ_PRIORITY   0
-
-#define PSC0_IRQ_LEVEL      3
-#define PSC0_IRQ_PRIORITY   7
-#define PSC1_IRQ_LEVEL      3
-#define PSC1_IRQ_PRIORITY   6
-#define PSC2_IRQ_LEVEL      3
-#define PSC2_IRQ_PRIORITY   5
-#define PSC3_IRQ_LEVEL      3
-#define PSC3_IRQ_PRIORITY   4
-
-#define FEC_IRQ_LEVEL       2
-#define FEC_IRQ_PRIORITY    3
 
 /*
  * Network driver configuration

c/src/lib/libbsp/m68k/genmcf548x/irq/intc-icr-init-values.c

@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/irq.h>
+
+#define ICR(lvl, prio) (MCF548X_INTC_ICRn_IL(lvl) | MCF548X_INTC_ICRn_IP(prio))
+
+const uint8_t mcf548x_intc_icr_init_values[64] = {
+  [MCF548X_IRQ_SLT0] = ICR(4, 7),
+  [MCF548X_IRQ_SLT1] = ICR(4, 6),
+  [MCF548X_IRQ_PSC0] = ICR(3, 7),
+  [MCF548X_IRQ_PSC1] = ICR(3, 6),
+  [MCF548X_IRQ_PSC2] = ICR(3, 5),
+  [MCF548X_IRQ_PSC3] = ICR(3, 4),
+  [MCF548X_IRQ_FEC0] = ICR(2, 7),
+  [MCF548X_IRQ_FEC1] = ICR(2, 6)
+};

c/src/lib/libbsp/m68k/genmcf548x/network/network.c

@@ -1288,10 +1288,6 @@ static void mcf548x_fec_init(void *arg)
 	rtems_panic ("Can't attach MFC54xx FEX interrupt handler\n");
       }
 
-      MCF548X_INTC_ICRn(MCF548X_FEC_IRQ_VECTOR(chan) % 64) =
-	MCF548X_INTC_ICRn_IL(FEC_IRQ_LEVEL) |
-	MCF548X_INTC_ICRn_IP(FEC_IRQ_PRIORITY);
-
       MCF548X_INTC_IMRH &= ~(1 << (MCF548X_FEC_IRQ_VECTOR(chan) % 32));
 
       MCF548X_FEC_EIMR(chan) = FEC_INTR_MASK_USED;

c/src/lib/libbsp/m68k/genmcf548x/startup/init548x.c

@@ -77,7 +77,9 @@ void mcf548x_init(void);
 
 
 void mcf548x_init(void)
-    {
+{
+    size_t i;
+
 #if defined(HAS_LOW_LEVEL_INIT)
     /* set XLB arbiter timeouts */
     MCF548X_XLB_ADRTO = 0x00000100;
@@ -108,6 +110,12 @@ void mcf548x_init(void)
 
     /* Zero uninitialized data */
     memset(bsp_section_bss_begin, 0, (size_t) bsp_section_bss_size);
+
+    for (i = 8; i < RTEMS_ARRAY_SIZE(mcf548x_intc_icr_init_values); ++i) {
+      volatile uint8_t *icr = &MCF548X_INTC_ICR0;
+
+      icr[i] = mcf548x_intc_icr_init_values[i];
+    }
 }
 /********************************************************************/
 #if defined(HAS_LOW_LEVEL_INIT)