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updates from Tony Bennett

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This commit is contained in:
Joel Sherrill
1996-05-23 15:37:38 +00:00
parent 64b976a960
commit 8b2ecf8546
17 changed files with 160 additions and 105 deletions
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2
c/src/exec/libcsupport/src/libio.c
View File

@@ -15,7 +15,7 @@
#if defined(solaris2)
#define O_NDELAY O_NONBLOCK
#elif defined(RTEMS_NEWLIB)
#elif defined(RTEMS_NEWLIB)
#define O_NDELAY _FNBIO
#endif

3
c/src/exec/libcsupport/src/malloc.c
View File

@@ -252,6 +252,9 @@ void *realloc(
}
new_area = malloc( size );
MSBUMP(malloc_calls, -1); /* subtract off the malloc */
if ( !new_area ) {
free( ptr );
return (void *) 0;

4
c/src/exec/libcsupport/src/newlibc.c
View File

@@ -131,7 +131,7 @@ libc_start_hook(rtems_tcb *current_task,
* real target.
*/
#ifdef RTEMS_UNIX
#ifdef NEED_SETVBUF
rtems_extension
libc_begin_hook(rtems_tcb *current_task)
{
@@ -274,7 +274,7 @@ libc_init(int reentrant)
libc_extension.thread_create = libc_create_hook;
libc_extension.thread_start = libc_start_hook;
#ifdef RTEMS_UNIX
#ifdef NEED_SETVBUF
libc_extension.thread_begin = libc_begin_hook;
#endif
libc_extension.thread_switch = libc_switch_hook;

46
c/src/exec/score/cpu/hppa1.1/cpu.h
View File

@@ -267,13 +267,13 @@ EXTERN void *_CPU_Interrupt_stack_high;
#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
/*
* HPPA has 32 interrupts, then 32 external interrupts
* HPPA has 32 traps, then 32 external interrupts
* Rtems (_ISR_Vector_Table) is aware ONLY of the first 32
* The BSP is aware of the external interrupts and possibly more.
*
*/
#define CPU_INTERRUPT_NUMBER_OF_VECTORS (HPPA_INTERNAL_INTERRUPTS)
#define CPU_INTERRUPT_NUMBER_OF_VECTORS (HPPA_INTERNAL_TRAPS)
#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1)
/*
@@ -318,25 +318,32 @@ EXTERN void *_CPU_Interrupt_stack_high;
* + set a particular level
*/
/* Disable interrupts; returning previous level in _level */
#define _CPU_ISR_Disable( _isr_cookie ) \
/* Disable interrupts; returning previous psw bits in _isr_level */
#define _CPU_ISR_Disable( _isr_level ) \
do { \
HPPA_ASM_RSM(HPPA_PSW_I, _isr_cookie); \
HPPA_ASM_RSM(HPPA_PSW_I, _isr_level); \
if (_isr_level & HPPA_PSW_I) _isr_level = 0; \
else _isr_level = 1; \
} while(0)
/* Enable interrupts to previous level from _CPU_ISR_Disable
* does not change 'level' */
#define _CPU_ISR_Enable( _isr_cookie ) \
#define _CPU_ISR_Enable( _isr_level ) \
{ \
HPPA_ASM_MTSM( _isr_cookie ); \
register int _ignore; \
if (_isr_level == 0) HPPA_ASM_SSM(HPPA_PSW_I, _ignore); \
else HPPA_ASM_RSM(HPPA_PSW_I, _ignore); \
}
/* restore, then disable interrupts; does not change level */
#define _CPU_ISR_Flash( _isr_cookie ) \
#define _CPU_ISR_Flash( _isr_level ) \
{ \
register int _ignore; \
_CPU_ISR_Enable( _isr_cookie ); \
_CPU_ISR_Disable( _ignore ); \
if (_isr_level == 0) \
{ \
register int _ignore; \
HPPA_ASM_SSM(HPPA_PSW_I, _ignore); \
HPPA_ASM_RSM(HPPA_PSW_I, _ignore); \
} \
}
/*
@@ -568,6 +575,15 @@ void _CPU_Restore_float_context(
);
/*
* The raw interrupt handler for external interrupts
*/
extern void _Generic_ISR_Handler(
void
);
/* The following routine swaps the endian format of an unsigned int.
* It must be static so it can be referenced indirectly.
*/
@@ -582,14 +598,6 @@ CPU_swap_u32(unsigned32 value)
return( swapped );
}
/*
* Unused; I think it should go away
*/
#if 0
#define enable_tracing()
#endif
#endif /* ! ASM */
#ifdef __cplusplus

7
c/src/exec/score/cpu/hppa1.1/cpu_asm.s
View File

@@ -424,12 +424,15 @@ _CPU_Context_restore:
ldw R27_OFFSET(arg0),%r27
ldw R28_OFFSET(arg0),%r28
ldw R29_OFFSET(arg0),%r29
ldw R30_OFFSET(arg0),%r30
# skipping r30 (sp) until we turn off interrupts
ldw R31_OFFSET(arg0),%r31
# Turn off Q & R & I so we can write interrupt control registers
# Turn off Q & R & I so we can write r30 and interrupt control registers
rsm HPPA_PSW_Q + HPPA_PSW_R + HPPA_PSW_I, %r0
# now safe to restore r30
ldw R30_OFFSET(arg0),%r30
ldw IPSW_OFFSET(arg0), %r25
mtctl %r25, ipsw

150
c/src/exec/score/cpu/hppa1.1/hppa.h
View File

@@ -124,93 +124,90 @@ extern "C" {
* basic layout. Note numbers do not denote priority
*
* 0-31 basic traps and interrupts defined by HPPA architecture
* 32-63 32 external interrupts
* 64-... bsp defined
* 0-31 32 external interrupts
* 32-... bsp defined
*/
#define HPPA_INTERRUPT_NON_EXISTENT 0
#define HPPA_TRAP_NON_EXISTENT 0
/* group 1 */
#define HPPA_INTERRUPT_HIGH_PRIORITY_MACHINE_CHECK 1
#define HPPA_TRAP_HIGH_PRIORITY_MACHINE_CHECK 1
/* group 2 */
#define HPPA_INTERRUPT_POWER_FAIL 2
#define HPPA_INTERRUPT_RECOVERY_COUNTER 3
#define HPPA_INTERRUPT_EXTERNAL_INTERRUPT 4
#define HPPA_INTERRUPT_LOW_PRIORITY_MACHINE_CHECK 5
#define HPPA_INTERRUPT_PERFORMANCE_MONITOR 29
#define HPPA_TRAP_POWER_FAIL 2
#define HPPA_TRAP_RECOVERY_COUNTER 3
#define HPPA_TRAP_EXTERNAL_INTERRUPT 4
#define HPPA_TRAP_LOW_PRIORITY_MACHINE_CHECK 5
#define HPPA_TRAP_PERFORMANCE_MONITOR 29
/* group 3 */
#define HPPA_INTERRUPT_INSTRUCTION_TLB_MISS 6
#define HPPA_INTERRUPT_INSTRUCTION_MEMORY_PROTECTION 7
#define HPPA_INTERRUPT_INSTRUCTION_DEBUG 30
#define HPPA_INTERRUPT_ILLEGAL_INSTRUCTION 8
#define HPPA_INTERRUPT_BREAK_INSTRUCTION 9
#define HPPA_INTERRUPT_PRIVILEGED_OPERATION 10
#define HPPA_INTERRUPT_PRIVILEGED_REGISTER 11
#define HPPA_INTERRUPT_OVERFLOW 12
#define HPPA_INTERRUPT_CONDITIONAL 13
#define HPPA_INTERRUPT_ASSIST_EXCEPTION 14
#define HPPA_INTERRUPT_DATA_TLB_MISS 15
#define HPPA_INTERRUPT_NON_ACCESS_INSTRUCTION_TLB_MISS 16
#define HPPA_INTERRUPT_NON_ACCESS_DATA_TLB_MISS 17
#define HPPA_INTERRUPT_DATA_MEMORY_ACCESS_RIGHTS 26
#define HPPA_INTERRUPT_DATA_MEMORY_PROTECTION_ID 27
#define HPPA_INTERRUPT_UNALIGNED_DATA_REFERENCE 28
#define HPPA_INTERRUPT_DATA_MEMORY_PROTECTION 18
#define HPPA_INTERRUPT_DATA_MEMORY_BREAK 19
#define HPPA_INTERRUPT_TLB_DIRTY_BIT 20
#define HPPA_INTERRUPT_PAGE_REFERENCE 21
#define HPPA_INTERRUPT_DATA_DEBUG 31
#define HPPA_INTERRUPT_ASSIST_EMULATION 22
#define HPPA_TRAP_INSTRUCTION_TLB_MISS 6
#define HPPA_TRAP_INSTRUCTION_MEMORY_PROTECTION 7
#define HPPA_TRAP_INSTRUCTION_DEBUG 30
#define HPPA_TRAP_ILLEGAL_INSTRUCTION 8
#define HPPA_TRAP_BREAK_INSTRUCTION 9
#define HPPA_TRAP_PRIVILEGED_OPERATION 10
#define HPPA_TRAP_PRIVILEGED_REGISTER 11
#define HPPA_TRAP_OVERFLOW 12
#define HPPA_TRAP_CONDITIONAL 13
#define HPPA_TRAP_ASSIST_EXCEPTION 14
#define HPPA_TRAP_DATA_TLB_MISS 15
#define HPPA_TRAP_NON_ACCESS_INSTRUCTION_TLB_MISS 16
#define HPPA_TRAP_NON_ACCESS_DATA_TLB_MISS 17
#define HPPA_TRAP_DATA_MEMORY_ACCESS_RIGHTS 26
#define HPPA_TRAP_DATA_MEMORY_PROTECTION_ID 27
#define HPPA_TRAP_UNALIGNED_DATA_REFERENCE 28
#define HPPA_TRAP_DATA_MEMORY_PROTECTION 18
#define HPPA_TRAP_DATA_MEMORY_BREAK 19
#define HPPA_TRAP_TLB_DIRTY_BIT 20
#define HPPA_TRAP_PAGE_REFERENCE 21
#define HPPA_TRAP_DATA_DEBUG 31
#define HPPA_TRAP_ASSIST_EMULATION 22
/* group 4 */
#define HPPA_INTERRUPT_HIGHER_PRIVILEGE_TRANSFER 23
#define HPPA_INTERRUPT_LOWER_PRIVILEGE_TRANSFER 24
#define HPPA_INTERRUPT_TAKEN_BRANCH 25
#define HPPA_TRAP_HIGHER_PRIVILEGE_TRANSFER 23
#define HPPA_TRAP_LOWER_PRIVILEGE_TRANSFER 24
#define HPPA_TRAP_TAKEN_BRANCH 25
#define HPPA_INTERRUPT_ON_CHIP_MAX 31
#define HPPA_INTERNAL_TRAPS 32
/* External Interrupts via interrupt 4 */
#define HPPA_INTERRUPT_EXTERNAL_BASE 32
#define HPPA_INTERRUPT_EXTERNAL_0 0
#define HPPA_INTERRUPT_EXTERNAL_1 1
#define HPPA_INTERRUPT_EXTERNAL_2 2
#define HPPA_INTERRUPT_EXTERNAL_3 3
#define HPPA_INTERRUPT_EXTERNAL_4 4
#define HPPA_INTERRUPT_EXTERNAL_5 5
#define HPPA_INTERRUPT_EXTERNAL_6 6
#define HPPA_INTERRUPT_EXTERNAL_7 7
#define HPPA_INTERRUPT_EXTERNAL_8 8
#define HPPA_INTERRUPT_EXTERNAL_9 9
#define HPPA_INTERRUPT_EXTERNAL_10 10
#define HPPA_INTERRUPT_EXTERNAL_11 11
#define HPPA_INTERRUPT_EXTERNAL_12 12
#define HPPA_INTERRUPT_EXTERNAL_13 13
#define HPPA_INTERRUPT_EXTERNAL_14 14
#define HPPA_INTERRUPT_EXTERNAL_15 15
#define HPPA_INTERRUPT_EXTERNAL_16 16
#define HPPA_INTERRUPT_EXTERNAL_17 17
#define HPPA_INTERRUPT_EXTERNAL_18 18
#define HPPA_INTERRUPT_EXTERNAL_19 19
#define HPPA_INTERRUPT_EXTERNAL_20 20
#define HPPA_INTERRUPT_EXTERNAL_21 21
#define HPPA_INTERRUPT_EXTERNAL_22 22
#define HPPA_INTERRUPT_EXTERNAL_23 23
#define HPPA_INTERRUPT_EXTERNAL_24 24
#define HPPA_INTERRUPT_EXTERNAL_25 25
#define HPPA_INTERRUPT_EXTERNAL_26 26
#define HPPA_INTERRUPT_EXTERNAL_27 27
#define HPPA_INTERRUPT_EXTERNAL_28 28
#define HPPA_INTERRUPT_EXTERNAL_29 29
#define HPPA_INTERRUPT_EXTERNAL_30 30
#define HPPA_INTERRUPT_EXTERNAL_31 31
#define HPPA_INTERRUPT_EXTERNAL_0 32
#define HPPA_INTERRUPT_EXTERNAL_1 33
#define HPPA_INTERRUPT_EXTERNAL_2 34
#define HPPA_INTERRUPT_EXTERNAL_3 35
#define HPPA_INTERRUPT_EXTERNAL_4 36
#define HPPA_INTERRUPT_EXTERNAL_5 37
#define HPPA_INTERRUPT_EXTERNAL_6 38
#define HPPA_INTERRUPT_EXTERNAL_7 39
#define HPPA_INTERRUPT_EXTERNAL_8 40
#define HPPA_INTERRUPT_EXTERNAL_9 41
#define HPPA_INTERRUPT_EXTERNAL_10 42
#define HPPA_INTERRUPT_EXTERNAL_11 43
#define HPPA_INTERRUPT_EXTERNAL_12 44
#define HPPA_INTERRUPT_EXTERNAL_13 45
#define HPPA_INTERRUPT_EXTERNAL_14 46
#define HPPA_INTERRUPT_EXTERNAL_15 47
#define HPPA_INTERRUPT_EXTERNAL_16 48
#define HPPA_INTERRUPT_EXTERNAL_17 49
#define HPPA_INTERRUPT_EXTERNAL_18 50
#define HPPA_INTERRUPT_EXTERNAL_19 51
#define HPPA_INTERRUPT_EXTERNAL_20 52
#define HPPA_INTERRUPT_EXTERNAL_21 53
#define HPPA_INTERRUPT_EXTERNAL_22 54
#define HPPA_INTERRUPT_EXTERNAL_23 55
#define HPPA_INTERRUPT_EXTERNAL_24 56
#define HPPA_INTERRUPT_EXTERNAL_25 57
#define HPPA_INTERRUPT_EXTERNAL_26 58
#define HPPA_INTERRUPT_EXTERNAL_27 59
#define HPPA_INTERRUPT_EXTERNAL_28 60
#define HPPA_INTERRUPT_EXTERNAL_29 61
#define HPPA_INTERRUPT_EXTERNAL_30 62
#define HPPA_INTERRUPT_EXTERNAL_31 63
#define HPPA_INTERRUPT_EXTERNAL_INTERVAL_TIMER HPPA_INTERRUPT_EXTERNAL_0
#define HPPA_EXTERNAL_INTERRUPTS 32
#define HPPA_INTERNAL_INTERRUPTS 32
#define HPPA_INTERRUPT_EXTERNAL_INTERVAL_TIMER HPPA_INTERRUPT_EXTERNAL_0
#define HPPA_EXTERNAL_INTERRUPTS 32
/* BSP defined interrupts begin here */
#define HPPA_INTERRUPT_MAX 64
#define HPPA_INTERRUPT_MAX 32
/*
* Cache characteristics
@@ -219,6 +216,13 @@ extern "C" {
#define HPPA_CACHELINE_SIZE 32
#define HPPA_CACHELINE_MASK (HPPA_CACHELINE_SIZE - 1)
/*
* page size characteristics
*/
#define HPPA_PAGE_SIZE 4096
#define HPPA_PAGE_MASK (0xfffff000)
/*
* TLB characteristics

2
c/src/lib/libc/libio.c
View File

@@ -15,7 +15,7 @@
#if defined(solaris2)
#define O_NDELAY O_NONBLOCK
#elif defined(RTEMS_NEWLIB)
#elif defined(RTEMS_NEWLIB)
#define O_NDELAY _FNBIO
#endif

3
c/src/lib/libc/malloc.c
View File

@@ -252,6 +252,9 @@ void *realloc(
}
new_area = malloc( size );
MSBUMP(malloc_calls, -1); /* subtract off the malloc */
if ( !new_area ) {
free( ptr );
return (void *) 0;

4
c/src/lib/libc/newlibc.c
View File

@@ -131,7 +131,7 @@ libc_start_hook(rtems_tcb *current_task,
* real target.
*/
#ifdef RTEMS_UNIX
#ifdef NEED_SETVBUF
rtems_extension
libc_begin_hook(rtems_tcb *current_task)
{
@@ -274,7 +274,7 @@ libc_init(int reentrant)
libc_extension.thread_create = libc_create_hook;
libc_extension.thread_start = libc_start_hook;
#ifdef RTEMS_UNIX
#ifdef NEED_SETVBUF
libc_extension.thread_begin = libc_begin_hook;
#endif
libc_extension.thread_switch = libc_switch_hook;

1
c/src/lib/libcpu/hppa1.1/timer/timer.c
View File

@@ -24,6 +24,7 @@ rtems_boolean Timer_driver_Find_average_overhead;
void Timer_initialize()
{
Timer_starting = get_itimer();
set_eiem(0x80000000);
}
#define AVG_OVERHEAD 0 /* It typically takes 3.0 microseconds */

10
c/src/tests/mptests/mp07/task1.c
View File

@@ -72,7 +72,7 @@ rtems_task Test_task(
directive_failed( status, "rtems_timer_fire_after" );
while ( Stop_Test == FALSE ) {
for ( count=DOT_COUNT ; count ; count-- ) {
for ( count=DOT_COUNT ; count && (Stop_Test == FALSE) ; count-- ) {
status = rtems_event_receive(
RTEMS_EVENT_16,
RTEMS_DEFAULT_OPTIONS,
@@ -90,6 +90,14 @@ rtems_task Test_task(
}
put_dot('.');
}
/*
* Wait a bit before shutting down so we don't screw up the other node
* when our MPCI shuts down
*/
rtems_task_wake_after(10);
puts( "\n*** END OF TEST 7 ***" );
exit( 0 );
}

7
c/src/tests/mptests/mp14/exit.c
View File

@@ -24,6 +24,13 @@ void Exit_test( void )
rtems_status_code status;
rtems_mode old_mode;
/*
* Wait a bit before shutting down so we don't screw up the other node
* when our MPCI shuts down
*/
rtems_task_wake_after(20);
status = rtems_task_mode( RTEMS_NO_PREEMPT, RTEMS_PREEMPT_MASK, &old_mode );
directive_failed( status, "rtems_task_mode" );

2
cpukit/libcsupport/src/libio.c
View File

@@ -15,7 +15,7 @@
#if defined(solaris2)
#define O_NDELAY O_NONBLOCK
#elif defined(RTEMS_NEWLIB)
#elif defined(RTEMS_NEWLIB)
#define O_NDELAY _FNBIO
#endif

3
cpukit/libcsupport/src/malloc.c
View File

@@ -252,6 +252,9 @@ void *realloc(
}
new_area = malloc( size );
MSBUMP(malloc_calls, -1); /* subtract off the malloc */
if ( !new_area ) {
free( ptr );
return (void *) 0;

4
cpukit/libcsupport/src/newlibc.c
View File

@@ -131,7 +131,7 @@ libc_start_hook(rtems_tcb *current_task,
* real target.
*/
#ifdef RTEMS_UNIX
#ifdef NEED_SETVBUF
rtems_extension
libc_begin_hook(rtems_tcb *current_task)
{
@@ -274,7 +274,7 @@ libc_init(int reentrant)
libc_extension.thread_create = libc_create_hook;
libc_extension.thread_start = libc_start_hook;
#ifdef RTEMS_UNIX
#ifdef NEED_SETVBUF
libc_extension.thread_begin = libc_begin_hook;
#endif
libc_extension.thread_switch = libc_switch_hook;

10
testsuites/mptests/mp07/task1.c
View File

@@ -72,7 +72,7 @@ rtems_task Test_task(
directive_failed( status, "rtems_timer_fire_after" );
while ( Stop_Test == FALSE ) {
for ( count=DOT_COUNT ; count ; count-- ) {
for ( count=DOT_COUNT ; count && (Stop_Test == FALSE) ; count-- ) {
status = rtems_event_receive(
RTEMS_EVENT_16,
RTEMS_DEFAULT_OPTIONS,
@@ -90,6 +90,14 @@ rtems_task Test_task(
}
put_dot('.');
}
/*
* Wait a bit before shutting down so we don't screw up the other node
* when our MPCI shuts down
*/
rtems_task_wake_after(10);
puts( "\n*** END OF TEST 7 ***" );
exit( 0 );
}

7
testsuites/mptests/mp14/exit.c
View File

@@ -24,6 +24,13 @@ void Exit_test( void )
rtems_status_code status;
rtems_mode old_mode;
/*
* Wait a bit before shutting down so we don't screw up the other node
* when our MPCI shuts down
*/
rtems_task_wake_after(20);
status = rtems_task_mode( RTEMS_NO_PREEMPT, RTEMS_PREEMPT_MASK, &old_mode );
directive_failed( status, "rtems_task_mode" );