bsps/xil: Adjust Xilinx support code for Cortex-R5

This fixes some issues in the Xilinx support code that are critical to
support the Cortex-R5F cores present in my Xilinx SoCs. The imported
Cortex-R5 xil_cache.c matches the existing information in
bsps/shared/xil/VERSION.

bsps/shared/xil/arm/cortexr5/xil_mpu.c

@@ -115,12 +115,16 @@ static const struct {
 	{ 0x100000000, REGION_4G },
 };
 
+#ifndef __rtems__
 #if defined (__GNUC__)
 XMpu_Config Mpu_Config __attribute__((section(".bootdata")));
 #elif defined (__ICCARM__)
 #pragma default_function_attributes = @ ".bootdata"
 XMpu_Config Mpu_Config;
 #endif
+#else
+XMpu_Config Mpu_Config __attribute__((section(".bsp_start_data")));
+#endif
 
 /************************** Function Prototypes ******************************/
 void Xil_InitializeExistingMPURegConfig(void);