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2008-09-18 Joel Sherrill <joel.sherrill@oarcorp.com>

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* include/bsp.h, include/tm27.h: Remove unnecessary boilerplate
	comments.
This commit is contained in:
Joel Sherrill
2008-09-18 17:40:14 +00:00
parent 75c9e48d48
commit 89fc9341b7
3 changed files with 23 additions and 51 deletions
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5
c/src/lib/libbsp/mips/csb350/ChangeLog
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@@ -1,3 +1,8 @@
2008-09-18 Joel Sherrill <joel.sherrill@oarcorp.com>
* include/bsp.h, include/tm27.h: Remove unnecessary boilerplate
comments.
2008-09-16 Joel Sherrill <joel.sherrill@oarcorp.com> 2008-09-16 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am, startup/linkcmds: Use top level shared * Makefile.am, startup/linkcmds: Use top level shared

46
c/src/lib/libbsp/mips/csb350/include/bsp.h
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@@ -28,52 +28,6 @@ extern "C" {
#include <rtems/clockdrv.h> #include <rtems/clockdrv.h>
#include <libcpu/au1x00.h> #include <libcpu/au1x00.h>
/*
* Define the interrupt mechanism for Time Test 27
*/
int assert_sw_irw(uint32_t irqnum);
int negate_sw_irw(uint32_t irqnum);
#define MUST_WAIT_FOR_INTERRUPT 0
#define Install_tm27_vector( handler ) \
(void) set_vector(handler, AU1X00_IRQ_SW0, 1);
#define Cause_tm27_intr() \
do { \
assert_sw_irq(0); \
} while(0)
#define Clear_tm27_intr() \
do { \
negate_sw_irq(0); \
} while(0)
#if 0
#define Lower_tm27_intr() \
mips_enable_in_interrupt_mask( 0xff01 );
#else
#define Lower_tm27_intr() \
do { \
continue;\
} while(0)
#endif
/* Constants */
/* miscellaneous stuff assumed to exist */
/*
* Device Driver Table Entries
*/
/*
* NOTE: Use the standard Console driver entry
*/
/*
* NOTE: Use the standard Clock driver entry
*/
/* /*
* Network driver configuration * Network driver configuration

23
c/src/lib/libbsp/mips/csb350/include/tm27.h
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@@ -19,20 +19,33 @@
* Define the interrupt mechanism for Time Test 27 * Define the interrupt mechanism for Time Test 27
*/ */
#define MUST_WAIT_FOR_INTERRUPT 1 int assert_sw_irw(uint32_t irqnum);
int negate_sw_irw(uint32_t irqnum);
#define Install_tm27_vector( handler ) #define MUST_WAIT_FOR_INTERRUPT 0
#define Install_tm27_vector( handler ) \
(void) set_vector(handler, AU1X00_IRQ_SW0, 1);
#define Cause_tm27_intr() \ #define Cause_tm27_intr() \
do { \ do { \
; \ assert_sw_irq(0); \
} while(0) } while(0)
#define Clear_tm27_intr() \ #define Clear_tm27_intr() \
do { \ do { \
; \ negate_sw_irq(0); \
} while(0) } while(0)
#define Lower_tm27_intr() #if 0
#define Lower_tm27_intr() \
mips_enable_in_interrupt_mask( 0xff01 );
#else
#define Lower_tm27_intr() \
do { \
continue;\
} while(0)
#endif
#endif
#endif #endif