forked from Imagelibrary/rtems
m68k/mrm332: changes required to get the mrm332 bsp working again.
Changed console driver to use interrupts instead of polling. Change to avoid overwriting CPU32Bug interrupt vector when setting up the Sci interrupt handler. Fixed type for boolean flag in bsp.h. Changed mrm332.h to use 25Mhz clock. Fixes to mrm332.cfg to use correct mcpu32 value for RTEMS_CPU_MODEL instead of m68332 which is no longer supported. Added -mcpu=cpu32 to compiler options. Removed broken ROM linker script and replaced broken RAM linker script with working ROM linker script. Removed no longer required file except_vect_332_ROM.S. Enabled 0xbeefbeef magic string in start.S to allow MRM version of CPU32Bug to auto run RTEMS. Removed old code from start.S Changed compiler optimization flag to optimize for size.
This commit is contained in:
James Fitzsimons
committed by
Gedare Bloom
Gedare Bloom
parent
8c26e79867
commit
89aa1ec87d
@@ -22,7 +22,7 @@ noinst_LIBRARIES = libbspstart.a
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libbspstart_a_SOURCES = start/start.S
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project_lib_DATA = start.$(OBJEXT)
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dist_project_lib_DATA += startup/linkcmds startup/linkcmds_ROM
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dist_project_lib_DATA += startup/linkcmds
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noinst_LIBRARIES += libbsp.a
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libbsp_a_SOURCES =
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@@ -33,8 +33,7 @@ libbsp_a_SOURCES += startup/start_c.c ../../shared/bsplibc.c \
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../../shared/bootcard.c ../../shared/sbrk.c \
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../../shared/bspclean.c \
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../../shared/setvec.c ../../shared/bsppretaskinghook.c \
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../../shared/bspgetworkarea.c ../../shared/gnatinstallhandler.c \
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startup/except_vect_332_ROM.S
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../../shared/bspgetworkarea.c ../../shared/gnatinstallhandler.c
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# clock
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libbsp_a_SOURCES += clock/ckinit.c
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# console
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@@ -42,7 +42,7 @@ rtems_device_driver console_open(
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/* SCI internal uart */
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status = rtems_termios_open( major, minor, arg, SciGetTermiosHandlers( TRUE ) );
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status = rtems_termios_open( major, minor, arg, SciGetTermiosHandlers( FALSE ) );
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return status;
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}
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@@ -351,8 +351,8 @@ rtems_isr SciIsr( rtems_vector_number vector )
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if ( (*SCSR) & SCI_ERROR_OVERRUN ) SciErrorsOverrun ++;
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/* see if it was a transmit interrupt */
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if ( (*SCSR) & SCI_XMTR_AVAILABLE ) /* data reg empty, xmt complete */
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/* data reg empty, xmt complete */
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if ( ( *SCCR1 & SCI_ENABLE_INT_TX ) && ( (*SCSR) & SCI_XMTR_AVAILABLE ) )
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{
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SciDisableTransmitInterrupts();
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@@ -554,12 +554,17 @@ int SciInterruptOpen(
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SciSetDataBits(SCI_8_DATA_BITS); /* set data bits to 8 */
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/* Install our interrupt handler into RTEMS, where does 66 come from? */
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/* Install our interrupt handler into RTEMS. */
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/* 68 is an unused user-defined vector. Note that the vector must be */
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/* even - it sets the low bit for SPI interrupts, and clears it for */
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/* SCI interrupts. Also note that vector 66 is used by CPU32bug on */
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/* the mrm332. */
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rtems_interrupt_catch( SciIsr, 66, &old_vector );
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rtems_interrupt_catch( SciIsr, 68, &old_vector );
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*QIVR = 66;
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*QIVR &= 0xf8;
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*QSMCR = (*QSMCR & ~IARB) | 1; // Is 1 a good value for qsm iarb?
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*QIVR = 68;
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*QILR &= 0xf8;
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*QILR |= 0x06 & 0x07;
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SciEnableTransmitter(); /* enable the transmitter */
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@@ -1382,7 +1387,7 @@ void SciWriteCharWait(uint8_t c)
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{
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/* poll the fifo, waiting for room for another character */
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while ( ( *SCSR & SCI_XMTR_AVAILABLE ) == 0 )
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while ( ( *SCSR & SCI_XMTR_AVAILABLE ) != SCI_XMTR_AVAILABLE )
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{
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/* Either we are writing to the fifo faster than
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* the uart can clock bytes out onto the cable,
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@@ -42,7 +42,7 @@ extern char _copy_start[];
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extern char _edata[];
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extern char _clear_start[];
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extern char end[];
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extern char _copy_data_from_rom[];
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extern bool _copy_data_from_rom;
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/* constants */
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@@ -27,6 +27,8 @@
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/* System Clock definitions */
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#define XTAL 32768.0 /* crystal frequency in Hz */
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/* Specify the CPU frequency. Do not specify a faster clock than your */
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/* CPU is rated for! */
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#if 0
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/* Default MRM clock rate (8.388688 MHz) set by CPU32: */
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#define MRM_W 0 /* system clock parameters */
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@@ -34,18 +36,19 @@
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#define MRM_Y 0x3f
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#endif
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#if 1
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#if 0
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/* 16.77722 MHz: */
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#define MRM_W 1 /* system clock parameters */
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#define MRM_X 1
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#define MRM_Y 0x0f
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#endif
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#if 0
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#if 1
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/* 25.16582 MHz: */
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#define MRM_W 1 /* system clock parameters */
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#define MRM_X 1
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#define MRM_Y 0x17
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#define SET_EDIV
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#endif
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#define SYS_CLOCK (XTAL*4.0*(MRM_Y+1)*(1 << (2*MRM_W+MRM_X)))
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@@ -5,41 +5,15 @@
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include $(RTEMS_ROOT)/make/custom/default.cfg
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RTEMS_CPU=m68k
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RTEMS_CPU_MODEL=m68332
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RTEMS_CPU_MODEL=mcpu32
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# This contains the compiler options necessary to select the CPU model
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# and (hopefully) optimize for it.
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CPU_CFLAGS = -mcpu=cpu32
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# optimize flag: typically -O2
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CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer
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# using optimise for size due to small memory on target board.
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CFLAGS_OPTIMIZE_V = -Os -g -fomit-frame-pointer
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ifeq ($(MRM_IN_ROM),yes)
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# Build a rommable image - move the .data section after the .text section
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# in the image.
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CPU_CFLAGS += -qnolinkcmds -T $(exec_prefix)/mrm332/lib/linkcmds_ROM
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endif
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ifeq ($(MRM_IN_ROM),yes)
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define bsp-post-link
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$(OBJCOPY) --adjust-section-vma \
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.data=`m68k-rtems-objdump --section-headers $(basename $@).pxe | \
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awk 'function h2d(x) { x=toupper(x); digits=length(x); s=0 ; \
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for (p=digits; p>0; p--) \
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s += (16^(p-1)) * ( index("0123456789ABCDEF",\
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substr(x,1+digits-p,1)) -1 );\
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return s } ;\
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/\.text/ { base = $$4 ; size = $$3 };\
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END { printf("0x%x", h2d(base) + h2d(size)) }'\
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` $(basename $@).pxe $(basename $@)$(EXEEXT)
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$(OBJCOPY) -O srec $(basename $@)$(EXEEXT) $(basename $@).srec
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sed -e 's/.$$//' -e '/^S0/d' $(basename $@).srec | \
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$(PACKHEX) > $(basename $@)$(DOWNEXT)
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$(NM) -g -n $(basename $@).pxe > $(basename $@).pnum
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rm -f $(basename $@).srec $(basename $@).srec
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$(default-bsp-post-link)
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endef
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else
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define bsp-post-link
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$(OBJCOPY) -O srec $(basename $@)$(EXEEXT) $(basename $@).srec
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sed -e 's/.$$//' -e '/^S0/d' $(basename $@).srec | \
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@@ -47,4 +21,4 @@ define bsp-post-link
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rm -f $(basename $@).srec
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$(default-bsp-post-link)
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endef
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endif
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@@ -69,7 +69,3 @@ $(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
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$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
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PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
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$(PROJECT_LIB)/linkcmds_ROM: startup/linkcmds_ROM $(PROJECT_LIB)/$(dirstamp)
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$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds_ROM
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PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds_ROM
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@@ -22,7 +22,7 @@ BEGIN_CODE
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/* Put the header necessary for the modified CPU32bug to automatically
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start up rtems: */
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#if 0
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#if 1
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.long 0xbeefbeef ;
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#endif
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.long 0 ;
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@@ -31,11 +31,16 @@ BEGIN_CODE
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.global start
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start:
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oriw #0x0700,sr
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movel #end, d0
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addl #_StackSize,d0
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oriw #0x0700,sr /* Mask off interupts */
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// Set VBR to CPU32Bug vector table address
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movel #0x0,d0 /* Use the initial vectors until we get going */
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movecl d0,vbr
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movel #end, d0 /* Next 3 instructions set stack pointer */
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addl #_StackSize,d0 /* sp = end + _StackSize from linker script */
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movel d0,sp
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movel d0,a6
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movel d0,a6
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/* include in ram_init.S */
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/*
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@@ -46,6 +51,13 @@ BEGIN_CODE
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/* Module Configuration Register */
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/* see section(s) 3.1.3-3.1.6 of the SIM Reference Manual */
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/* SIMCR etc and SAM macro all defined in sim.h found at */
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/* /cpukit/score/cpu/m68k/rtems/m68k/sim.h */
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/* The code below does the following: */
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/* - Sets Freeze Software Enable */
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/* - Turns off Show Cycle Enable */
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/* - Sets the location of SIM module mapping */
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/* - Sets the SIM Interrupt Arbitration Field */
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lea SIMCR, a0
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movew #FRZSW,d0
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oriw #SAM(0,8,SHEN),d0
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@@ -57,106 +69,3 @@ BEGIN_CODE
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END_CODE
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#if 0
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/* Synthesizer Control Register */
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/* see section(s) 4.8 */
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/* end include in ram_init.S */
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*SYNCR = (unsigned short int)
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( SAM(MRM_W,15,VCO) | SAM(0x0,14,PRESCALE) | SAM(MRM_Y,8,COUNTER) );
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while (! (*SYNCR & SLOCK)); /* protect from clock overshoot */
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/* include in ram_init.S */
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*SYNCR = (unsigned short int)
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( SAM(MRM_W,15,VCO) | SAM(MRM_X,14,PRESCALE) | SAM(MRM_Y,8,COUNTER) );
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/* System Protection Control Register */
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/* !!! can only write to once after reset !!! */
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/* see section 3.8.4 of the SIM Reference Manual */
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*SYPCR = (unsigned char)( HME | BME );
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/* Periodic Interrupr Control Register */
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/* see section 3.8.2 of the SIM Reference Manual */
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*PICR = (unsigned short int)
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( SAM(0,8,PIRQL) | SAM(MRM_PIV,0,PIV) );
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/* ^^^ zero disables interrupt, don't enable here or ram_init will
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be wrong. It's enabled below. */
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/* Periodic Interrupt Timer Register */
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/* see section 3.8.3 of the SIM Reference Manual */
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*PITR = (unsigned short int)( SAM(0x09,0,PITM) );
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/* 1.098mS interrupt, assuming 32.768 KHz input clock */
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/* Port C Data */
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/* load values before enabled */
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*PORTC = (unsigned char) 0x0;
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/* Port E and F Data Register */
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/* see section 9 of the SIM Reference Manual */
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*PORTE0 = (unsigned char) 0;
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*PORTF0 = (unsigned char) 0;
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/* Port E and F Data Direction Register */
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/* see section 9 of the SIM Reference Manual */
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*DDRE = (unsigned char) 0xff;
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*DDRF = (unsigned char) 0xfd;
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/* Port E and F Pin Assignment Register */
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/* see section 9 of the SIM Reference Manual */
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*PEPAR = (unsigned char) 0;
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*PFPAR = (unsigned char) 0;
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/* end of SIM initalization code */
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/* end include in ram_init.S */
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/*
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* Initialize RAM by copying the .data section out of ROM (if
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* needed) and "zero-ing" the .bss section.
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*/
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{
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register char *src = _etext;
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register char *dst = _copy_start;
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if (_copy_data_from_rom)
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/* ROM has data at end of text; copy it. */
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while (dst < _edata)
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*dst++ = *src++;
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/* Zero bss */
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for (dst = _clear_start; dst< end; dst++)
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{
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*dst = 0;
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}
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}
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/*
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* Initialize vector table.
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*/
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{
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rtems_isr_entry *monitors_vector_table;
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m68k_get_vbr(monitors_vector_table);
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M68Kvec[ 4 ] = monitors_vector_table[ 4 ]; /* breakpoints vector */
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M68Kvec[ 9 ] = monitors_vector_table[ 9 ]; /* trace vector */
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M68Kvec[ 31 ] = monitors_vector_table[ 31 ]; /* level 7 interrupt */
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M68Kvec[ 47 ] = monitors_vector_table[ 47 ]; /* system call vector */
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M68Kvec[ 66 ] = monitors_vector_table[ 66 ]; /* user defined */
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m68k_set_vbr(&M68Kvec);
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}
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/*
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* Initalize the board.
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*/
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Spurious_Initialize();
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console_init();
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/*
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* Execute main with arguments argc and agrv.
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*/
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boot_card((void*)0);
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reboot();
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}
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#endif
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@@ -1,289 +0,0 @@
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/* Exception Vector definitions follow */
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/* !!! Warning !!! This table is not tested, and
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the user must make sure it is complete. */
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/* If we use TRAP #15 for reboot, note that group 0 and 1 exceptions
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will have priority. */
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/* This is the "magic word" that CPU32bug uses to indicate that
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there is a bootable image here. */
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.long 0xBEEFBEEF
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/* Vector 0: RESET: Initial SSP */
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.long _RamEnd
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/* Vector 1: RESET: Initial PC */
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.long start
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/* default action for undefined vectors is to re-boot */
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/* Note group 0 and 1 exception (like trace) have priority
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over other exceptions (like trap #15) that may call this. */
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/* Vectors 2-255 */
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.long reboot /* exception vector: 2 */
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.long reboot /* exception vector: 3 */
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.long reboot /* exception vector: 4 */
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.long reboot /* exception vector: 5 */
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.long reboot /* exception vector: 6 */
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.long reboot /* exception vector: 7 */
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.long reboot /* exception vector: 8 */
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.long reboot /* exception vector: 9 */
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.long reboot /* exception vector: 10 */
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.long reboot /* exception vector: 11 */
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.long reboot /* exception vector: 12 */
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.long reboot /* exception vector: 13 */
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.long reboot /* exception vector: 14 */
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.long reboot /* exception vector: 15 */
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.long reboot /* exception vector: 16 */
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.long reboot /* exception vector: 17 */
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.long reboot /* exception vector: 18 */
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.long reboot /* exception vector: 19 */
|
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.long reboot /* exception vector: 20 */
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.long reboot /* exception vector: 21 */
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.long reboot /* exception vector: 22 */
|
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.long reboot /* exception vector: 23 */
|
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.long reboot /* exception vector: 24 */
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.long reboot /* exception vector: 25 */
|
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.long reboot /* exception vector: 26 */
|
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.long reboot /* exception vector: 27 */
|
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.long reboot /* exception vector: 28 */
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.long reboot /* exception vector: 29 */
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.long reboot /* exception vector: 30 */
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.long reboot /* exception vector: 31 */
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.long reboot /* exception vector: 32 */
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.long reboot /* exception vector: 33 */
|
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.long reboot /* exception vector: 34 */
|
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.long reboot /* exception vector: 35 */
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.long reboot /* exception vector: 36 */
|
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.long reboot /* exception vector: 37 */
|
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.long reboot /* exception vector: 38 */
|
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.long reboot /* exception vector: 39 */
|
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.long reboot /* exception vector: 40 */
|
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.long reboot /* exception vector: 41 */
|
||||
.long reboot /* exception vector: 42 */
|
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.long reboot /* exception vector: 43 */
|
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.long reboot /* exception vector: 44 */
|
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.long reboot /* exception vector: 45 */
|
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.long reboot /* exception vector: 46 */
|
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.long _reboot /* the reboot trap: 47 */
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.long reboot /* exception vector: 48 */
|
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.long reboot /* exception vector: 49 */
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.long reboot /* exception vector: 50 */
|
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.long reboot /* exception vector: 51 */
|
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.long reboot /* exception vector: 52 */
|
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.long reboot /* exception vector: 53 */
|
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.long reboot /* exception vector: 54 */
|
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.long reboot /* exception vector: 55 */
|
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.long reboot /* exception vector: 56 */
|
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.long reboot /* exception vector: 57 */
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.long reboot /* exception vector: 58 */
|
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.long reboot /* exception vector: 59 */
|
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.long reboot /* exception vector: 60 */
|
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.long reboot /* exception vector: 61 */
|
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.long reboot /* exception vector: 62 */
|
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.long reboot /* exception vector: 63 */
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.long reboot /* exception vector: 64 */
|
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.long reboot /* exception vector: 65 */
|
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.long reboot /* exception vector: 66 */
|
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.long reboot /* exception vector: 67 */
|
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.long reboot /* exception vector: 68 */
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.long reboot /* exception vector: 69 */
|
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.long reboot /* exception vector: 70 */
|
||||
.long reboot /* exception vector: 71 */
|
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.long reboot /* exception vector: 72 */
|
||||
.long reboot /* exception vector: 73 */
|
||||
.long reboot /* exception vector: 74 */
|
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.long reboot /* exception vector: 75 */
|
||||
.long reboot /* exception vector: 76 */
|
||||
.long reboot /* exception vector: 77 */
|
||||
.long reboot /* exception vector: 78 */
|
||||
.long reboot /* exception vector: 79 */
|
||||
.long reboot /* exception vector: 80 */
|
||||
.long reboot /* exception vector: 81 */
|
||||
.long reboot /* exception vector: 82 */
|
||||
.long reboot /* exception vector: 83 */
|
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.long reboot /* exception vector: 84 */
|
||||
.long reboot /* exception vector: 85 */
|
||||
.long reboot /* exception vector: 86 */
|
||||
.long reboot /* exception vector: 87 */
|
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.long reboot /* exception vector: 88 */
|
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.long reboot /* exception vector: 89 */
|
||||
.long reboot /* exception vector: 90 */
|
||||
.long reboot /* exception vector: 91 */
|
||||
.long reboot /* exception vector: 92 */
|
||||
.long reboot /* exception vector: 93 */
|
||||
.long reboot /* exception vector: 94 */
|
||||
.long reboot /* exception vector: 95 */
|
||||
.long reboot /* exception vector: 96 */
|
||||
.long reboot /* exception vector: 97 */
|
||||
.long reboot /* exception vector: 98 */
|
||||
.long reboot /* exception vector: 99 */
|
||||
.long reboot /* exception vector: 100 */
|
||||
.long reboot /* exception vector: 101 */
|
||||
.long reboot /* exception vector: 102 */
|
||||
.long reboot /* exception vector: 103 */
|
||||
.long reboot /* exception vector: 104 */
|
||||
.long reboot /* exception vector: 105 */
|
||||
.long reboot /* exception vector: 106 */
|
||||
.long reboot /* exception vector: 107 */
|
||||
.long reboot /* exception vector: 108 */
|
||||
.long reboot /* exception vector: 109 */
|
||||
.long reboot /* exception vector: 110 */
|
||||
.long reboot /* exception vector: 111 */
|
||||
.long reboot /* exception vector: 112 */
|
||||
.long reboot /* exception vector: 113 */
|
||||
.long reboot /* exception vector: 114 */
|
||||
.long reboot /* exception vector: 115 */
|
||||
.long reboot /* exception vector: 116 */
|
||||
.long reboot /* exception vector: 117 */
|
||||
.long reboot /* exception vector: 118 */
|
||||
.long reboot /* exception vector: 119 */
|
||||
.long reboot /* exception vector: 120 */
|
||||
.long reboot /* exception vector: 121 */
|
||||
.long reboot /* exception vector: 122 */
|
||||
.long reboot /* exception vector: 123 */
|
||||
.long reboot /* exception vector: 124 */
|
||||
.long reboot /* exception vector: 125 */
|
||||
.long reboot /* exception vector: 126 */
|
||||
.long reboot /* exception vector: 127 */
|
||||
.long reboot /* exception vector: 128 */
|
||||
.long reboot /* exception vector: 129 */
|
||||
.long reboot /* exception vector: 130 */
|
||||
.long reboot /* exception vector: 131 */
|
||||
.long reboot /* exception vector: 132 */
|
||||
.long reboot /* exception vector: 133 */
|
||||
.long reboot /* exception vector: 134 */
|
||||
.long reboot /* exception vector: 135 */
|
||||
.long reboot /* exception vector: 136 */
|
||||
.long reboot /* exception vector: 137 */
|
||||
.long reboot /* exception vector: 138 */
|
||||
.long reboot /* exception vector: 139 */
|
||||
.long reboot /* exception vector: 140 */
|
||||
.long reboot /* exception vector: 141 */
|
||||
.long reboot /* exception vector: 142 */
|
||||
.long reboot /* exception vector: 143 */
|
||||
.long reboot /* exception vector: 144 */
|
||||
.long reboot /* exception vector: 145 */
|
||||
.long reboot /* exception vector: 146 */
|
||||
.long reboot /* exception vector: 147 */
|
||||
.long reboot /* exception vector: 148 */
|
||||
.long reboot /* exception vector: 149 */
|
||||
.long reboot /* exception vector: 150 */
|
||||
.long reboot /* exception vector: 151 */
|
||||
.long reboot /* exception vector: 152 */
|
||||
.long reboot /* exception vector: 153 */
|
||||
.long reboot /* exception vector: 154 */
|
||||
.long reboot /* exception vector: 155 */
|
||||
.long reboot /* exception vector: 156 */
|
||||
.long reboot /* exception vector: 157 */
|
||||
.long reboot /* exception vector: 158 */
|
||||
.long reboot /* exception vector: 159 */
|
||||
.long reboot /* exception vector: 160 */
|
||||
.long reboot /* exception vector: 161 */
|
||||
.long reboot /* exception vector: 162 */
|
||||
.long reboot /* exception vector: 163 */
|
||||
.long reboot /* exception vector: 164 */
|
||||
.long reboot /* exception vector: 165 */
|
||||
.long reboot /* exception vector: 166 */
|
||||
.long reboot /* exception vector: 167 */
|
||||
.long reboot /* exception vector: 168 */
|
||||
.long reboot /* exception vector: 169 */
|
||||
.long reboot /* exception vector: 170 */
|
||||
.long reboot /* exception vector: 171 */
|
||||
.long reboot /* exception vector: 172 */
|
||||
.long reboot /* exception vector: 173 */
|
||||
.long reboot /* exception vector: 174 */
|
||||
.long reboot /* exception vector: 175 */
|
||||
.long reboot /* exception vector: 176 */
|
||||
.long reboot /* exception vector: 177 */
|
||||
.long reboot /* exception vector: 178 */
|
||||
.long reboot /* exception vector: 179 */
|
||||
.long reboot /* exception vector: 180 */
|
||||
.long reboot /* exception vector: 181 */
|
||||
.long reboot /* exception vector: 182 */
|
||||
.long reboot /* exception vector: 183 */
|
||||
.long reboot /* exception vector: 184 */
|
||||
.long reboot /* exception vector: 185 */
|
||||
.long reboot /* exception vector: 186 */
|
||||
.long reboot /* exception vector: 187 */
|
||||
.long reboot /* exception vector: 188 */
|
||||
.long reboot /* exception vector: 189 */
|
||||
.long reboot /* exception vector: 190 */
|
||||
.long reboot /* exception vector: 191 */
|
||||
.long reboot /* exception vector: 192 */
|
||||
.long reboot /* exception vector: 193 */
|
||||
.long reboot /* exception vector: 194 */
|
||||
.long reboot /* exception vector: 195 */
|
||||
.long reboot /* exception vector: 196 */
|
||||
.long reboot /* exception vector: 197 */
|
||||
.long reboot /* exception vector: 198 */
|
||||
.long reboot /* exception vector: 199 */
|
||||
.long reboot /* exception vector: 200 */
|
||||
.long reboot /* exception vector: 201 */
|
||||
.long reboot /* exception vector: 202 */
|
||||
.long reboot /* exception vector: 203 */
|
||||
.long reboot /* exception vector: 204 */
|
||||
.long reboot /* exception vector: 205 */
|
||||
.long reboot /* exception vector: 206 */
|
||||
.long reboot /* exception vector: 207 */
|
||||
.long reboot /* exception vector: 208 */
|
||||
.long reboot /* exception vector: 209 */
|
||||
.long reboot /* exception vector: 210 */
|
||||
.long reboot /* exception vector: 211 */
|
||||
.long reboot /* exception vector: 212 */
|
||||
.long reboot /* exception vector: 213 */
|
||||
.long reboot /* exception vector: 214 */
|
||||
.long reboot /* exception vector: 215 */
|
||||
.long reboot /* exception vector: 216 */
|
||||
.long reboot /* exception vector: 217 */
|
||||
.long reboot /* exception vector: 218 */
|
||||
.long reboot /* exception vector: 219 */
|
||||
.long reboot /* exception vector: 220 */
|
||||
.long reboot /* exception vector: 221 */
|
||||
.long reboot /* exception vector: 222 */
|
||||
.long reboot /* exception vector: 223 */
|
||||
.long reboot /* exception vector: 224 */
|
||||
.long reboot /* exception vector: 225 */
|
||||
.long reboot /* exception vector: 226 */
|
||||
.long reboot /* exception vector: 227 */
|
||||
.long reboot /* exception vector: 228 */
|
||||
.long reboot /* exception vector: 229 */
|
||||
.long reboot /* exception vector: 230 */
|
||||
.long reboot /* exception vector: 231 */
|
||||
.long reboot /* exception vector: 232 */
|
||||
.long reboot /* exception vector: 233 */
|
||||
.long reboot /* exception vector: 234 */
|
||||
.long reboot /* exception vector: 235 */
|
||||
.long reboot /* exception vector: 236 */
|
||||
.long reboot /* exception vector: 237 */
|
||||
.long reboot /* exception vector: 238 */
|
||||
.long reboot /* exception vector: 239 */
|
||||
.long reboot /* exception vector: 240 */
|
||||
.long reboot /* exception vector: 241 */
|
||||
.long reboot /* exception vector: 242 */
|
||||
.long reboot /* exception vector: 243 */
|
||||
.long reboot /* exception vector: 244 */
|
||||
.long reboot /* exception vector: 245 */
|
||||
.long reboot /* exception vector: 246 */
|
||||
.long reboot /* exception vector: 247 */
|
||||
.long reboot /* exception vector: 248 */
|
||||
.long reboot /* exception vector: 249 */
|
||||
.long reboot /* exception vector: 250 */
|
||||
.long reboot /* exception vector: 251 */
|
||||
.long reboot /* exception vector: 252 */
|
||||
.long reboot /* exception vector: 253 */
|
||||
.long reboot /* exception vector: 254 */
|
||||
.long reboot /* exception vector: 255 */
|
||||
|
||||
_reboot:
|
||||
move #0x2700,%sr /* mask interrupts */
|
||||
movea.l (0x0).w,%a7 /* load stack */
|
||||
movea.l (0x4).w,%a0 /* jmp to location of reset vector */
|
||||
jmp (%a0)
|
||||
|
||||
reboot:
|
||||
trap #15 /* use trap exception to enter supervisor
|
||||
state. Trace mode ( and other group 0
|
||||
and 1 exceptions) *could* screw this up if
|
||||
not vectored to reboot or did not return. */
|
||||
@@ -5,20 +5,26 @@ OUTPUT_ARCH(m68k)
|
||||
__DYNAMIC = 0;
|
||||
|
||||
/*
|
||||
* The memory map looks like this:
|
||||
* ROM:
|
||||
* +--------------------+ <- low memory
|
||||
* | .text |
|
||||
* | etext |
|
||||
* | ctor list | the ctor and dtor lists are for
|
||||
* | dtor list | C++ support
|
||||
* | _endtext |
|
||||
* +--------------------+
|
||||
* | temporary .data | .data is moved to RAM by crt0
|
||||
* | |
|
||||
* +--------------------+ <- high memory
|
||||
*
|
||||
*
|
||||
* RAM:
|
||||
* +--------------------+ <- low memory
|
||||
* | .data | initialized data goes here
|
||||
* | _sdata |
|
||||
* | _edata |
|
||||
* +--------------------+
|
||||
* | .bss |
|
||||
* | _clear_start| start of bss, cleared by crt0
|
||||
* | __bss_start | start of bss, cleared by crt0
|
||||
* | _end | start of heap, used by sbrk()
|
||||
* +--------------------+
|
||||
* | heap space |
|
||||
@@ -31,150 +37,170 @@ __DYNAMIC = 0;
|
||||
/*
|
||||
* Declare some sizes.
|
||||
*/
|
||||
RamBase = DEFINED(RamBase) ? RamBase : 0x10000;
|
||||
RamSize = DEFINED(RamSize) ? RamSize : 0x70000;
|
||||
RomBase = DEFINED(RomBase) ? RomBase : 0x90000;
|
||||
RamBase = DEFINED(RamBase) ? RamBase : 0x03000;
|
||||
RamSize = DEFINED(RamSize) ? RamSize : 0x7d000;
|
||||
_RamEnd = RamBase + RamSize;
|
||||
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
|
||||
_StackSize = DEFINED(_StackSize) ? _StackSize : 0x2000;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
ram : ORIGIN = 0x10000, LENGTH = 0x70000
|
||||
rom : ORIGIN = 0x90000, LENGTH = 0x70000
|
||||
ram : ORIGIN = 0x03000, LENGTH = 0x7d000
|
||||
}
|
||||
|
||||
_copy_data_from_rom = 0;
|
||||
_copy_data_from_rom = 1;
|
||||
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
|
||||
_StackSize = DEFINED(_StackSize) ? _StackSize : 0x2000;
|
||||
|
||||
|
||||
/*
|
||||
* stick everything in ram (of course)
|
||||
*
|
||||
*/
|
||||
SECTIONS
|
||||
{
|
||||
ram : {
|
||||
. = .;
|
||||
} >ram
|
||||
.text :
|
||||
{
|
||||
. = .;
|
||||
text_start = .;
|
||||
_text_start = .;
|
||||
*(.text*)
|
||||
. = ALIGN (16);
|
||||
|
||||
/*
|
||||
* Text, data and bss segments
|
||||
*/
|
||||
.text : {
|
||||
*(.text*)
|
||||
/*
|
||||
* C++ constructors/destructors
|
||||
*/
|
||||
*(.gnu.linkonce.t.*)
|
||||
|
||||
/*
|
||||
* C++ constructors/destructors
|
||||
*/
|
||||
*(.gnu.linkonce.t.*)
|
||||
/*
|
||||
* Initialization and finalization code.
|
||||
*
|
||||
* Various files can provide initialization and finalization
|
||||
* functions. crtbegin.o and crtend.o are two instances. The
|
||||
* body of these functions are in .init and .fini sections. We
|
||||
* accumulate the bodies here, and prepend function prologues
|
||||
* from crti.o and function epilogues from crtn.o. crti.o must
|
||||
* be linked first; crtn.o must be linked last. Because these
|
||||
* are wildcards, it doesn't matter if the user does not
|
||||
* actually link against crti.o and crtn.o; the linker won't
|
||||
* look for a file to match a wildcard. The wildcard also
|
||||
* means that it doesn't matter which directory crti.o and
|
||||
* crtn.o are in.
|
||||
*/
|
||||
PROVIDE (_init = .);
|
||||
*crti.o(.init)
|
||||
*(.init)
|
||||
*crtn.o(.init)
|
||||
PROVIDE (_fini = .);
|
||||
*crti.o(.fini)
|
||||
*(.fini)
|
||||
*crtn.o(.fini)
|
||||
|
||||
/*
|
||||
* Initialization and finalization code.
|
||||
*
|
||||
* Various files can provide initialization and finalization
|
||||
* functions. crtbegin.o and crtend.o are two instances. The
|
||||
* body of these functions are in .init and .fini sections. We
|
||||
* accumulate the bodies here, and prepend function prologues
|
||||
* from crti.o and function epilogues from crtn.o. crti.o must
|
||||
* be linked first; crtn.o must be linked last. Because these
|
||||
* are wildcards, it doesn't matter if the user does not
|
||||
* actually link against crti.o and crtn.o; the linker won't
|
||||
* look for a file to match a wildcard. The wildcard also
|
||||
* means that it doesn't matter which directory crti.o and
|
||||
* crtn.o are in.
|
||||
*/
|
||||
PROVIDE (_init = .);
|
||||
*crti.o(.init)
|
||||
*(.init)
|
||||
*crtn.o(.init)
|
||||
PROVIDE (_fini = .);
|
||||
*crti.o(.fini)
|
||||
*(.fini)
|
||||
*crtn.o(.fini)
|
||||
/*
|
||||
* Special FreeBSD sysctl sections.
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
__start_set_sysctl_set = .;
|
||||
*(set_sysctl_*);
|
||||
__stop_set_sysctl_set = ABSOLUTE(.);
|
||||
*(set_domain_*);
|
||||
*(set_pseudo_*);
|
||||
|
||||
/*
|
||||
* Special FreeBSD sysctl sections.
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
__start_set_sysctl_set = .;
|
||||
*(set_sysctl_*);
|
||||
__stop_set_sysctl_set = ABSOLUTE(.);
|
||||
*(set_domain_*);
|
||||
*(set_pseudo_*);
|
||||
/*
|
||||
* C++ constructors/destructors
|
||||
*
|
||||
* gcc uses crtbegin.o to find the start of the constructors
|
||||
* and destructors so we make sure it is first. Because this
|
||||
* is a wildcard, it doesn't matter if the user does not
|
||||
* actually link against crtbegin.o; the linker won't look for
|
||||
* a file to match a wildcard. The wildcard also means that
|
||||
* it doesn't matter which directory crtbegin.o is in. The
|
||||
* constructor and destructor list are terminated in
|
||||
* crtend.o. The same comments apply to it.
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
*crtbegin.o(.ctors)
|
||||
*(.ctors)
|
||||
*crtend.o(.ctors)
|
||||
*crtbegin.o(.dtors)
|
||||
*(.dtors)
|
||||
*crtend.o(.dtors)
|
||||
|
||||
/*
|
||||
* C++ constructors/destructors
|
||||
*
|
||||
* gcc uses crtbegin.o to find the start of the constructors
|
||||
* and destructors so we make sure it is first. Because this
|
||||
* is a wildcard, it doesn't matter if the user does not
|
||||
* actually link against crtbegin.o; the linker won't look for
|
||||
* a file to match a wildcard. The wildcard also means that
|
||||
* it doesn't matter which directory crtbegin.o is in. The
|
||||
* constructor and destructor list are terminated in
|
||||
* crtend.o. The same comments apply to it.
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
*crtbegin.o(.ctors)
|
||||
*(.ctors)
|
||||
*crtend.o(.ctors)
|
||||
*crtbegin.o(.dtors)
|
||||
*(.dtors)
|
||||
*crtend.o(.dtors)
|
||||
/*
|
||||
* Exception frame info
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
*(.eh_frame)
|
||||
|
||||
/*
|
||||
* Exception frame info
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
*(.eh_frame)
|
||||
/*
|
||||
* Read-only data
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
_rodata_start = . ;
|
||||
*(.rodata*)
|
||||
*(.gnu.linkonce.r*)
|
||||
|
||||
/*
|
||||
* Read-only data
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
_rodata_start = .;
|
||||
*(.rodata*)
|
||||
*(.gnu.linkonce.r*)
|
||||
. = ALIGN (16);
|
||||
PROVIDE (_etext = .);
|
||||
_endtext = .;
|
||||
__data_start_rom = .;
|
||||
} > rom
|
||||
.tdata : {
|
||||
_TLS_Data_begin = .;
|
||||
*(.tdata .tdata.* .gnu.linkonce.td.*)
|
||||
_TLS_Data_end = .;
|
||||
} > rom
|
||||
.tbss : {
|
||||
_TLS_BSS_begin = .;
|
||||
*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
|
||||
_TLS_BSS_end = .;
|
||||
} > rom
|
||||
_TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
|
||||
_TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
|
||||
_TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
|
||||
_TLS_Alignment = ALIGNOF (.tdata);
|
||||
.gcc_exc :
|
||||
AT ( ADDR(.tdata) + SIZEOF( .tdata ) )
|
||||
{
|
||||
*(.gcc_exc)
|
||||
} > ram
|
||||
.data : AT(__data_start_rom)
|
||||
{
|
||||
PROVIDE (_copy_start = .);
|
||||
*(.data*)
|
||||
*(.gnu.linkonce.d*)
|
||||
*(.gcc_except_table*)
|
||||
*(.jcr)
|
||||
. = ALIGN (16);
|
||||
PROVIDE (_edata = .);
|
||||
PROVIDE (_copy_end = .);
|
||||
} > ram
|
||||
.shbss :
|
||||
{
|
||||
*(.shbss)
|
||||
} > ram
|
||||
.bss :
|
||||
{
|
||||
M68Kvec = .;
|
||||
. += (256 * 4);
|
||||
_clear_start = .;
|
||||
*(.dynbss)
|
||||
*(.bss* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN (16);
|
||||
PROVIDE (end = .);
|
||||
. += _StackSize;
|
||||
. = ALIGN (16);
|
||||
_stack_init = .;
|
||||
_clear_end = .;
|
||||
|
||||
. = ALIGN (16);
|
||||
PROVIDE (_etext = .);
|
||||
} >ram
|
||||
|
||||
.tdata : {
|
||||
_TLS_Data_begin = .;
|
||||
*(.tdata .tdata.* .gnu.linkonce.td.*)
|
||||
_TLS_Data_end = .;
|
||||
} >ram
|
||||
|
||||
.tbss : {
|
||||
_TLS_BSS_begin = .;
|
||||
*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
|
||||
_TLS_BSS_end = .;
|
||||
} >ram
|
||||
|
||||
_TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
|
||||
_TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
|
||||
_TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
|
||||
_TLS_Alignment = ALIGNOF (.tdata);
|
||||
|
||||
.data : {
|
||||
PROVIDE (_copy_start = .);
|
||||
*(.data*)
|
||||
*(.gnu.linkonce.d*)
|
||||
*(.gcc_except_table*)
|
||||
*(.jcr)
|
||||
. = ALIGN (16);
|
||||
PROVIDE (_edata = .);
|
||||
PROVIDE (_copy_end = .);
|
||||
} >ram
|
||||
.bss : {
|
||||
_clear_start = .;
|
||||
*(.dynbss)
|
||||
*(.bss* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN (16);
|
||||
PROVIDE (end = .);
|
||||
. += _StackSize;
|
||||
. = ALIGN (16);
|
||||
_stack_init = .;
|
||||
_clear_end = .;
|
||||
|
||||
WorkAreaBase = .;
|
||||
} >ram
|
||||
WorkAreaBase = .;
|
||||
} > ram
|
||||
.stab . (NOLOAD) :
|
||||
{
|
||||
[ .stab ]
|
||||
}
|
||||
.stabstr . (NOLOAD) :
|
||||
{
|
||||
[ .stabstr ]
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1,212 +0,0 @@
|
||||
/* linkcmds
|
||||
*/
|
||||
|
||||
OUTPUT_ARCH(m68k)
|
||||
STARTUP(except_vect_332_ROM.o)
|
||||
__DYNAMIC = 0;
|
||||
|
||||
/*
|
||||
* ROM:
|
||||
* +--------------------+ <- low memory
|
||||
* | .text |
|
||||
* | etext |
|
||||
* | ctor list | the ctor and dtor lists are for
|
||||
* | dtor list | C++ support
|
||||
* | _endtext |
|
||||
* | temporary .data | .data is moved to RAM by crt0
|
||||
* | |
|
||||
* +--------------------+ <- high memory
|
||||
*
|
||||
*
|
||||
* RAM:
|
||||
* +--------------------+ <- low memory
|
||||
* | .data | initialized data goes here
|
||||
* | _sdata |
|
||||
* | _edata |
|
||||
* +--------------------+
|
||||
* | .bss |
|
||||
* | __bss_start | start of bss, cleared by crt0
|
||||
* | _end | start of heap, used by sbrk()
|
||||
* +--------------------+
|
||||
* | heap space |
|
||||
* | _ENDHEAP |
|
||||
* | stack space |
|
||||
* | __stack | top of stack
|
||||
* +--------------------+ <- high memory
|
||||
*/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
rom : ORIGIN = 0x90000, LENGTH = 0x70000
|
||||
ram : ORIGIN = 0x03000, LENGTH = 0x7d000
|
||||
}
|
||||
|
||||
RamBase = DEFINED(RamBase) ? RamBase : 0x003000;
|
||||
RamSize = DEFINED(RamSize) ? RamSize : 0x7d000;
|
||||
_RamEnd = RamBase + RamSize;
|
||||
|
||||
__end_of_ram = 0x080000;
|
||||
_copy_data_from_rom = 1;
|
||||
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
|
||||
_StackSize = DEFINED(_StackSize) ? _StackSize : 0x2000;
|
||||
|
||||
/*
|
||||
*
|
||||
*/
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = .;
|
||||
CREATE_OBJECT_SYMBOLS
|
||||
text_start = .;
|
||||
_text_start = .;
|
||||
*(.text*)
|
||||
. = ALIGN (16);
|
||||
|
||||
|
||||
/*
|
||||
* Initialization and finalization code.
|
||||
*
|
||||
* Various files can provide initialization and finalization
|
||||
* functions. crtbegin.o and crtend.o are two instances. The
|
||||
* body of these functions are in .init and .fini sections. We
|
||||
* accumulate the bodies here, and prepend function prologues
|
||||
* from crti.o and function epilogues from crtn.o. crti.o must
|
||||
* be linked first; crtn.o must be linked last. Because these
|
||||
* are wildcards, it doesn't matter if the user does not
|
||||
* actually link against crti.o and crtn.o; the linker won't
|
||||
* look for a file to match a wildcard. The wildcard also
|
||||
* means that it doesn't matter which directory crti.o and
|
||||
* crtn.o are in.
|
||||
*/
|
||||
PROVIDE (_init = .);
|
||||
*crti.o(.init)
|
||||
*(.init)
|
||||
*crtn.o(.init)
|
||||
PROVIDE (_fini = .);
|
||||
*crti.o(.fini)
|
||||
*(.fini)
|
||||
*crtn.o(.fini)
|
||||
|
||||
/*
|
||||
* Special FreeBSD sysctl sections.
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
__start_set_sysctl_set = .;
|
||||
*(set_sysctl_*);
|
||||
__stop_set_sysctl_set = ABSOLUTE(.);
|
||||
*(set_domain_*);
|
||||
*(set_pseudo_*);
|
||||
|
||||
/*
|
||||
* C++ constructors/destructors
|
||||
*
|
||||
* gcc uses crtbegin.o to find the start of the constructors
|
||||
* and destructors so we make sure it is first. Because this
|
||||
* is a wildcard, it doesn't matter if the user does not
|
||||
* actually link against crtbegin.o; the linker won't look for
|
||||
* a file to match a wildcard. The wildcard also means that
|
||||
* it doesn't matter which directory crtbegin.o is in. The
|
||||
* constructor and destructor list are terminated in
|
||||
* crtend.o. The same comments apply to it.
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
*crtbegin.o(.ctors)
|
||||
*(.ctors)
|
||||
*crtend.o(.ctors)
|
||||
*crtbegin.o(.dtors)
|
||||
*(.dtors)
|
||||
*crtend.o(.dtors)
|
||||
|
||||
*(.eh_frame)
|
||||
. = ALIGN (16);
|
||||
|
||||
/*
|
||||
* Read-only data
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
_rodata_start = . ;
|
||||
*(.rodata*)
|
||||
*(.gnu.linkonce.r*)
|
||||
|
||||
etext = ALIGN(0x10);
|
||||
__CTOR_LIST__ = .;
|
||||
LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
|
||||
*(.ctors)
|
||||
LONG(0)
|
||||
__CTOR_END__ = .;
|
||||
__DTOR_LIST__ = .;
|
||||
LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
|
||||
*(.dtors)
|
||||
LONG(0)
|
||||
__DTOR_END__ = .;
|
||||
*(.lit)
|
||||
*(.shdata)
|
||||
_etext = .;
|
||||
_endtext = .;
|
||||
} > rom
|
||||
.tdata : {
|
||||
_TLS_Data_begin = .;
|
||||
*(.tdata .tdata.* .gnu.linkonce.td.*)
|
||||
_TLS_Data_end = .;
|
||||
} > rom
|
||||
.tbss : {
|
||||
_TLS_BSS_begin = .;
|
||||
*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
|
||||
_TLS_BSS_end = .;
|
||||
} > rom
|
||||
_TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
|
||||
_TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
|
||||
_TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
|
||||
_TLS_Alignment = ALIGNOF (.tdata);
|
||||
.gcc_exc :
|
||||
AT ( ADDR(.tdata) + SIZEOF( .tdata ) )
|
||||
{
|
||||
*(.gcc_exc)
|
||||
} > ram
|
||||
.data :
|
||||
{
|
||||
data_start = .;
|
||||
_data_start = .;
|
||||
_copy_start = .;
|
||||
_sdata = . ;
|
||||
*(.data)
|
||||
*(.gnu.linkonce.d*)
|
||||
*(.gcc_except_table*)
|
||||
*(.jcr)
|
||||
|
||||
CONSTRUCTORS
|
||||
edata = ALIGN(0x10);
|
||||
_edata = .;
|
||||
} > ram
|
||||
.shbss :
|
||||
{
|
||||
*(.shbss)
|
||||
} > ram
|
||||
.bss :
|
||||
{
|
||||
__bss_start = ALIGN(0x8);
|
||||
bss_start = .;
|
||||
_bss_start = .;
|
||||
_clear_start = .;
|
||||
*(.shbss)
|
||||
*(.dynbss)
|
||||
*(.bss* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN (16);
|
||||
end = .;
|
||||
_end = ALIGN(0x8);
|
||||
__end = ALIGN(0x8);
|
||||
|
||||
WorkAreaBase = . + _StackSize;
|
||||
} > ram
|
||||
.stab . (NOLOAD) :
|
||||
{
|
||||
[ .stab ]
|
||||
}
|
||||
.stabstr . (NOLOAD) :
|
||||
{
|
||||
[ .stabstr ]
|
||||
}
|
||||
}
|
||||
@@ -14,14 +14,11 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#include <bsp.h>
|
||||
#include <bsp/bootcard.h>
|
||||
#include <mrm332.h>
|
||||
#include <rtems/m68k/sim.h>
|
||||
#define __START_C__
|
||||
#include "bsp.h"
|
||||
#include <bsp/bootcard.h>
|
||||
|
||||
rtems_isr_entry M68Kvec[256];
|
||||
rtems_isr_entry vectors[256];
|
||||
|
||||
/*
|
||||
* This prototype really should have the noreturn attribute but
|
||||
@@ -32,99 +29,97 @@ void start_c(void);
|
||||
|
||||
void start_c(void) {
|
||||
|
||||
/* Synthesizer Control Register */
|
||||
/* see section(s) 4.8 */
|
||||
/* end include in ram_init.S */
|
||||
*SYNCR = (unsigned short int)
|
||||
( SAM(MRM_W,15,VCO) | SAM(0x0,14,PRESCALE) | SAM(MRM_Y,8,COUNTER) );
|
||||
while (! (*SYNCR & SLOCK)); /* protect from clock overshoot */
|
||||
/* include in ram_init.S */
|
||||
*SYNCR = (unsigned short int)
|
||||
( SAM(MRM_W,15,VCO) | SAM(MRM_X,14,PRESCALE) | SAM(MRM_Y,8,COUNTER) );
|
||||
#ifdef SET_EDIV
|
||||
#define OPTIONAL_EDIV EDIV
|
||||
#else
|
||||
#define OPTIONAL_EDIV 0
|
||||
#endif
|
||||
|
||||
/* System Protection Control Register */
|
||||
/* !!! can only write to once after reset !!! */
|
||||
/* see section 3.8.4 of the SIM Reference Manual */
|
||||
*SYPCR = (unsigned char)( HME | BME );
|
||||
/* Synthesizer Control Register */
|
||||
/* see section(s) 4.8 */
|
||||
/* end include in ram_init.S */
|
||||
*SYNCR = (unsigned short int) (SAM(MRM_W, 15, VCO) | SAM(0x0, 14, PRESCALE)
|
||||
| SAM(MRM_Y, 8, COUNTER) | OPTIONAL_EDIV);
|
||||
while (!(*SYNCR & SLOCK))
|
||||
; /* protect from clock overshoot */
|
||||
/* include in ram_init.S */
|
||||
*SYNCR = (unsigned short int) (SAM(MRM_W, 15, VCO) | SAM(MRM_X, 14,
|
||||
PRESCALE) | SAM(MRM_Y, 8, COUNTER) | OPTIONAL_EDIV);
|
||||
|
||||
/* Periodic Interrupr Control Register */
|
||||
/* see section 3.8.2 of the SIM Reference Manual */
|
||||
*PICR = (unsigned short int)
|
||||
( SAM(0,8,PIRQL) | SAM(MRM_PIV,0,PIV) );
|
||||
/* ^^^ zero disables interrupt, don't enable here or ram_init will
|
||||
/* System Protection Control Register */
|
||||
/* !!! can only write to once after reset !!! */
|
||||
/* see section 3.8.4 of the SIM Reference Manual */
|
||||
*SYPCR = (unsigned char) (HME | BME);
|
||||
|
||||
/* Periodic Interrupr Control Register */
|
||||
/* see section 3.8.2 of the SIM Reference Manual */
|
||||
*PICR = (unsigned short int) (SAM(0, 8, PIRQL) | SAM(MRM_PIV, 0, PIV));
|
||||
/* ^^^ zero disables interrupt, don't enable here or ram_init will
|
||||
be wrong. It's enabled below. */
|
||||
|
||||
/* Periodic Interrupt Timer Register */
|
||||
/* see section 3.8.3 of the SIM Reference Manual */
|
||||
*PITR = (unsigned short int)( SAM(0x09,0,PITM) );
|
||||
/* 1.098mS interrupt, assuming 32.768 KHz input clock */
|
||||
/* Periodic Interrupt Timer Register */
|
||||
/* see section 3.8.3 of the SIM Reference Manual */
|
||||
*PITR = (unsigned short int) (SAM(0x09, 0, PITM));
|
||||
/* 1.098mS interrupt, assuming 32.768 KHz input clock */
|
||||
|
||||
/* Port C Data */
|
||||
/* load values before enabled */
|
||||
*PORTC = (unsigned char) 0x0;
|
||||
/* Port C Data */
|
||||
/* load values before enabled */
|
||||
*PORTC = (unsigned char) 0x0;
|
||||
|
||||
/* Port E and F Data Register */
|
||||
/* see section 9 of the SIM Reference Manual */
|
||||
*PORTE0 = (unsigned char) 0;
|
||||
*PORTF0 = (unsigned char) 0;
|
||||
/* Port E and F Data Register */
|
||||
/* see section 9 of the SIM Reference Manual */
|
||||
*PORTE0 = (unsigned char) 0;
|
||||
*PORTF0 = (unsigned char) 0;
|
||||
|
||||
/* Port E and F Data Direction Register */
|
||||
/* see section 9 of the SIM Reference Manual */
|
||||
*DDRE = (unsigned char) 0xff;
|
||||
*DDRF = (unsigned char) 0xfd;
|
||||
/* Port E and F Data Direction Register */
|
||||
/* see section 9 of the SIM Reference Manual */
|
||||
*DDRE = (unsigned char) 0xff;
|
||||
*DDRF = (unsigned char) 0xfd;
|
||||
|
||||
/* Port E and F Pin Assignment Register */
|
||||
/* see section 9 of the SIM Reference Manual */
|
||||
*PEPAR = (unsigned char) 0;
|
||||
*PFPAR = (unsigned char) 0;
|
||||
/* Port E and F Pin Assignment Register. Set up Port E and F as I/O */
|
||||
/* see section 9 of the SIM Reference Manual */
|
||||
*PEPAR = (unsigned char) 0;
|
||||
*PFPAR = (unsigned char) 0;
|
||||
|
||||
/* end of SIM initalization code */
|
||||
/* end include in ram_init.S */
|
||||
/* end of SIM initalization code */
|
||||
/* end include in ram_init.S */
|
||||
|
||||
/*
|
||||
* Initialize RAM by copying the .data section out of ROM (if
|
||||
* needed) and "zero-ing" the .bss section.
|
||||
*/
|
||||
{
|
||||
register char *src = _etext;
|
||||
register char *dst = _copy_start;
|
||||
/*
|
||||
* Initialize RAM by copying the .data section out of ROM (if
|
||||
* needed) and "zero-ing" the .bss section.
|
||||
*/
|
||||
{
|
||||
register char *src = _etext;
|
||||
register char *dst = _copy_start;
|
||||
|
||||
if (_copy_data_from_rom)
|
||||
/* ROM has data at end of text; copy it. */
|
||||
while (dst < _edata)
|
||||
*dst++ = *src++;
|
||||
if (_copy_data_from_rom) {
|
||||
/* ROM has data at end of text; copy it. */
|
||||
while (dst < _edata)
|
||||
*dst++ = *src++;
|
||||
}
|
||||
/* Zero bss */
|
||||
for (dst = _clear_start; dst < end; dst++) {
|
||||
*dst = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/* Zero bss */
|
||||
for (dst = _clear_start; dst< end; dst++)
|
||||
{
|
||||
*dst = 0;
|
||||
}
|
||||
}
|
||||
/*
|
||||
* Initialize vector table.
|
||||
*/
|
||||
{
|
||||
rtems_isr_entry *monitors_vector_table;
|
||||
|
||||
/*
|
||||
* Initialize vector table.
|
||||
*/
|
||||
{
|
||||
rtems_isr_entry *monitors_vector_table;
|
||||
m68k_get_vbr(monitors_vector_table);
|
||||
|
||||
m68k_get_vbr(monitors_vector_table);
|
||||
M68Kvec[4] = monitors_vector_table[4]; /* breakpoints vector */
|
||||
M68Kvec[9] = monitors_vector_table[9]; /* trace vector */
|
||||
M68Kvec[31] = monitors_vector_table[31]; /* level 7 interrupt */
|
||||
M68Kvec[47] = monitors_vector_table[47]; /* system call vector */
|
||||
M68Kvec[66] = monitors_vector_table[66]; /* user defined */
|
||||
|
||||
M68Kvec[ 4 ] = monitors_vector_table[ 4 ]; /* breakpoints vector */
|
||||
M68Kvec[ 9 ] = monitors_vector_table[ 9 ]; /* trace vector */
|
||||
M68Kvec[ 31 ] = monitors_vector_table[ 31 ]; /* level 7 interrupt */
|
||||
M68Kvec[ 47 ] = monitors_vector_table[ 47 ]; /* system call vector */
|
||||
M68Kvec[ 66 ] = monitors_vector_table[ 66 ]; /* user defined */
|
||||
m68k_set_vbr(&M68Kvec);
|
||||
}
|
||||
|
||||
m68k_set_vbr(&M68Kvec);
|
||||
}
|
||||
|
||||
/*
|
||||
* Initalize the board.
|
||||
*/
|
||||
|
||||
/* Spurious should be called in the predriver hook */
|
||||
/* Spurious_Initialize(); */
|
||||
/*console_init(); */
|
||||
|
||||
/*
|
||||
* Execute main with arguments argc and agrv.
|
||||
|
||||
Reference in New Issue
Block a user