bsp/atsam: Add support for TCM

This commit is contained in:
Alexander Krutwig
2016-06-28 10:47:15 +02:00
committed by Sebastian Huber
parent 9bb3ce3918
commit 891fa3eb5b
5 changed files with 150 additions and 0 deletions

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@@ -59,6 +59,34 @@ typedef struct {
uint8_t phy_addr;
} if_atsam_config;
extern char atsam_memory_dtcm_begin[];
extern char atsam_memory_dtcm_end[];
extern char atsam_memory_dtcm_size[];
extern char atsam_memory_intflash_begin[];
extern char atsam_memory_intflash_end[];
extern char atsam_memory_intflash_size[];
extern char atsam_memory_intsram_begin[];
extern char atsam_memory_intsram_end[];
extern char atsam_memory_intsram_size[];
extern char atsam_memory_itcm_begin[];
extern char atsam_memory_itcm_end[];
extern char atsam_memory_itcm_size[];
extern char atsam_memory_nocache_begin[];
extern char atsam_memory_nocache_end[];
extern char atsam_memory_nocache_size[];
extern char atsam_memory_qspiflash_begin[];
extern char atsam_memory_qspiflash_end[];
extern char atsam_memory_qspiflash_size[];
extern char atsam_memory_sdram_begin[];
extern char atsam_memory_sdram_end[];
extern char atsam_memory_sdram_size[];
/** @} */
#ifdef __cplusplus

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@@ -168,6 +168,7 @@ void _SetupMemoryRegion(void)
START_Addr:- 0x20440000UL
END_Addr:- 0x2045FFFFUL
******************************************************/
#ifndef __rtems__
/* SRAM memory region */
dwRegionBaseAddr =
SRAM_SECOND_START_ADDRESS |
@@ -181,6 +182,7 @@ void _SetupMemoryRegion(void)
MPU_REGION_ENABLE;
MPU_SetRegion(dwRegionBaseAddr, dwRegionAttr);
#endif /* __rtems__ */
#ifdef MPU_HAS_NOCACHE_REGION
dwRegionBaseAddr =

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@@ -29,6 +29,9 @@
#ifndef _MPU_H_
#define _MPU_H_
#ifdef __rtems__
#include <bsp.h>
#endif /* __rtems__ */
/*----------------------------------------------------------------------------
* Definitions
@@ -125,17 +128,29 @@
#endif
/* Regions should be a 2^(N+1) where 4 < N < 31 */
#ifdef __rtems__
#define SRAM_FIRST_START_ADDRESS ((uintptr_t) atsam_memory_sdram_begin)
#define SRAM_FIRST_END_ADDRESS ((uintptr_t) atsam_memory_sdram_end - 1)
#else /* __rtems__ */
#define SRAM_FIRST_START_ADDRESS (SRAM_START_ADDRESS)
#define SRAM_FIRST_END_ADDRESS (SRAM_FIRST_START_ADDRESS + 0x3FFFF) // (2^18) 256 KB
#endif /* __rtems__ */
#if defined MPU_HAS_NOCACHE_REGION
#ifdef __rtems__
#define SRAM_NOCACHE_START_ADDRESS ((uintptr_t) atsam_memory_nocache_begin)
#define SRAM_NOCACHE_END_ADDRESS ((uintptr_t) atsam_memory_nocache_end - 1)
#else /* __rtems__ */
#define SRAM_SECOND_START_ADDRESS (SRAM_FIRST_END_ADDRESS+1)
#define SRAM_SECOND_END_ADDRESS (SRAM_END_ADDRESS - NOCACHE_SRAM_REGION_SIZE) // (2^17) 128 - 0x1000 KB
#define SRAM_NOCACHE_START_ADDRESS (SRAM_SECOND_END_ADDRESS + 1)
#define SRAM_NOCACHE_END_ADDRESS (SRAM_END_ADDRESS)
#endif /* __rtems__ */
#else
#ifndef __rtems__
#define SRAM_SECOND_START_ADDRESS (SRAM_FIRST_END_ADDRESS + 1)
#define SRAM_SECOND_END_ADDRESS (SRAM_END_ADDRESS) // (2^17) 128 KB
#endif /* __rtems__ */
#endif
/************** Peripherals memory region macros ********/
#define PERIPHERALS_START_ADDRESS 0x40000000UL

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@@ -20,8 +20,60 @@
#include <include/board_lowlevel.h>
#include <include/board_memories.h>
#define SIZE_0K 0
#define SIZE_32K (32 * 1024)
#define SIZE_64K (64 * 1024)
#define SIZE_128K (128 * 1024)
#define ITCMCR_SZ_0K 0x0
#define ITCMCR_SZ_32K 0x6
#define ITCMCR_SZ_64K 0x7
#define ITCMCR_SZ_128K 0x8
static BSP_START_TEXT_SECTION void efc_send_command(uint32_t eefc)
{
EFC->EEFC_FCR = eefc | EEFC_FCR_FKEY_PASSWD;
}
static BSP_START_TEXT_SECTION void tcm_enable(void)
{
SCB->ITCMCR |= SCB_ITCMCR_EN_Msk;
SCB->DTCMCR |= SCB_DTCMCR_EN_Msk;
}
static BSP_START_TEXT_SECTION void tcm_disable(void)
{
SCB->ITCMCR &= ~SCB_ITCMCR_EN_Msk;
SCB->DTCMCR &= ~SCB_DTCMCR_EN_Msk;
}
static BSP_START_TEXT_SECTION bool tcm_setup_and_check_if_do_efc_config(
uintptr_t tcm_size,
uint32_t itcmcr_sz
)
{
if (tcm_size == SIZE_0K && itcmcr_sz == ITCMCR_SZ_0K) {
tcm_disable();
return false;
} else if (tcm_size == SIZE_32K && itcmcr_sz == ITCMCR_SZ_32K) {
tcm_enable();
return false;
} else if (tcm_size == SIZE_64K && itcmcr_sz == ITCMCR_SZ_64K) {
tcm_enable();
return false;
} else if (tcm_size == SIZE_128K && itcmcr_sz == ITCMCR_SZ_128K) {
tcm_enable();
return false;
} else {
return true;
}
}
void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
{
uintptr_t tcm_size;
uint32_t itcmcr_sz;
system_init_flash(BOARD_MCK);
SystemInit();
@@ -41,6 +93,31 @@ void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
}
_SetupMemoryRegion();
/* Configure tightly coupled memory interfaces */
tcm_size = (uintptr_t) atsam_memory_itcm_size;
itcmcr_sz = (SCB->ITCMCR & SCB_ITCMCR_SZ_Msk) >> SCB_ITCMCR_SZ_Pos;
if (tcm_setup_and_check_if_do_efc_config(tcm_size, itcmcr_sz)) {
if (tcm_size == SIZE_128K) {
efc_send_command(EEFC_FCR_FCMD_SGPB | EEFC_FCR_FARG(7));
efc_send_command(EEFC_FCR_FCMD_SGPB | EEFC_FCR_FARG(8));
tcm_enable();
} else if (tcm_size == SIZE_64K) {
efc_send_command(EEFC_FCR_FCMD_CGPB | EEFC_FCR_FARG(7));
efc_send_command(EEFC_FCR_FCMD_SGPB | EEFC_FCR_FARG(8));
tcm_enable();
} else if (tcm_size == SIZE_32K) {
efc_send_command(EEFC_FCR_FCMD_SGPB | EEFC_FCR_FARG(7));
efc_send_command(EEFC_FCR_FCMD_CGPB | EEFC_FCR_FARG(8));
tcm_enable();
} else {
efc_send_command(EEFC_FCR_FCMD_CGPB | EEFC_FCR_FARG(7));
efc_send_command(EEFC_FCR_FCMD_CGPB | EEFC_FCR_FARG(8));
tcm_disable();
}
}
}
void BSP_START_TEXT_SECTION bsp_start_hook_1(void)

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@@ -7,3 +7,31 @@ MEMORY {
SDRAM : ORIGIN = 0x70000000, LENGTH = @ATSAM_MEMORY_SDRAM_SIZE@
QSPIFLASH : ORIGIN = 0x80000000, LENGTH = @ATSAM_MEMORY_QSPIFLASH_SIZE@
}
atsam_memory_itcm_begin = ORIGIN (ITCM);
atsam_memory_itcm_end = ORIGIN (ITCM) + LENGTH (ITCM);
atsam_memory_itcm_size = LENGTH (ITCM);
atsam_memory_intflash_begin = ORIGIN (INTFLASH);
atsam_memory_intflash_end = ORIGIN (INTFLASH) + LENGTH (INTFLASH);
atsam_memory_intflash_size = LENGTH (INTFLASH);
atsam_memory_dtcm_begin = ORIGIN (DTCM);
atsam_memory_dtcm_end = ORIGIN (DTCM) + LENGTH (DTCM);
atsam_memory_dtcm_size = LENGTH (DTCM);
atsam_memory_intsram_begin = ORIGIN (INTSRAM);
atsam_memory_intsram_end = ORIGIN (INTSRAM) + LENGTH (INTSRAM);
atsam_memory_intsram_size = LENGTH (INTSRAM);
atsam_memory_nocache_begin = ORIGIN (NOCACHE);
atsam_memory_nocache_end = ORIGIN (NOCACHE) + LENGTH (NOCACHE);
atsam_memory_nocache_size = LENGTH (NOCACHE);
atsam_memory_sdram_begin = ORIGIN (SDRAM);
atsam_memory_sdram_end = ORIGIN (SDRAM) + LENGTH (SDRAM);
atsam_memory_sdram_size = LENGTH (SDRAM);
atsam_memory_qspiflash_begin = ORIGIN (QSPIFLASH);
atsam_memory_qspiflash_end = ORIGIN (QSPIFLASH) + LENGTH (QSPIFLASH);
atsam_memory_qspiflash_size = LENGTH (QSPIFLASH);