renamed MPC55XX_CHIP_DERIVATE to MPC55XX_CHIP_TYPE

This commit is contained in:
Thomas Doerfler
2010-04-07 14:19:55 +00:00
parent 9a66caae9b
commit 88919d021e
10 changed files with 46 additions and 32 deletions

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@@ -1,3 +1,12 @@
2010-04-07 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* shared/include/cpuIdent.c, shared/include/cpuIdent.h: skip
version nibble when detecting e200 processor version
* mpc55xx/edma/edma.c, mpc55xx/include/irq.h,
mpc55xx/include/reg-defs.h, mpc55xx/include/regs.h,
mpc55xx/misc/copy.S, mpc55xx/misc/fmpll.S:
renamed MPC55XX_CHIP_DERIVATE to MPC55XX_CHIP_TYPE
2010-04-07 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* mpc55xx/edma/edma.c, mpc55xx/esci/esci.c, mpc55xx/include/irq.h,

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@@ -31,11 +31,11 @@
#include <rtems/status-checks.h>
#if ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))
#if ((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))
#define MPC55XX_EDMA_CHANNEL_COUNT 16U
#else /* ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517)) */
#else /* ((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517)) */
#define MPC55XX_EDMA_CHANNEL_COUNT 64U
#endif /* ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517)) */
#endif /* ((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517)) */
#define MPC55XX_EDMA_INVALID_CHANNEL MPC55XX_EDMA_CHANNEL_COUNT

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@@ -47,11 +47,11 @@ extern "C" {
#define MPC55XX_IRQ_SOFTWARE_GET_REQUEST( i) (i)
#define MPC55XX_IRQ_SOFTWARE_NUMBER (MPC55XX_IRQ_SOFTWARE_MAX + 1U)
#if ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))
#else /*((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))*/
#endif /*((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))*/
#if ((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))
#else /*((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))*/
#endif /*((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))*/
#if ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))
#if ((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))
/* eDMA interrupts */
#define MPC55XX_IRQ_EDMA_ERROR_LOW 10U
@@ -78,7 +78,7 @@ extern "C" {
#define MPC55XX_IRQ_EMIOS_GET_REQUEST( c) \
((c) + MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN)
#else /*((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))*/
#else /*((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))*/
/* eDMA interrupts */
#define MPC55XX_IRQ_EDMA_ERROR_LOW 10U
@@ -121,7 +121,7 @@ extern "C" {
? ((c) - 16U + MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MIN) \
: ((c) + MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN))
#endif /*((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))*/
#endif /*((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))*/
/* Checks */
#define MPC55XX_IRQ_IS_VALID(v) \

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@@ -25,7 +25,7 @@
/*
* Register addresses
*/
#if ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))
#if ((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))
#define FMPLL_SYNSR 0xFFFF0004
#define FMPLL_ESYNCR1 0xFFFF0008
@@ -43,7 +43,7 @@
#define SIU_SYSCLK_SYSCLKSEL_XOSC 0x40000000
#define SIU_SYSCLK_SYSCLKSEL_PLL 0x80000000
#else /* ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))*/
#else /* ((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))*/
#define FMPLL_SYNCR 0xC3F80000
#define FMPLL_SYNSR 0xC3F80004
@@ -51,7 +51,7 @@
#define SIU_ECCR 0xC3F90984
#define SIU_SRCR 0xC3F90010
#endif /*((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))*/
#endif /*((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))*/
/*
* Special purpose registers
*/

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@@ -4390,7 +4390,7 @@ extern "C" {
.MAS6 = { .R = 0 }
};
#if ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))
#if ((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))
/* Define memories */
#define SRAM_START 0x40000000
@@ -4438,7 +4438,7 @@ extern "C" {
#define EBI (*(volatile struct EBI_tag *) 0xFFFF4000)
#define FLASH (*(volatile struct FLASH_tag *) 0xFFFF8000)
#else /* ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517)) */
#else /* ((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517)) */
/* Define memories */
#define SRAM_START 0x40000000

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@@ -32,9 +32,9 @@
* to be aligned on 8 byte boundaries. The size @a n must be evenly divisible by 8.
* The SPE operations @b evxor, @b evlddx and @b evstddx will be used.
*/
#if ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517))
#if ((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517))
GLOBAL_FUNCTION mpc55xx_copy_8
#endif /* ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) */
#endif /* ((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517)) */
GLOBAL_FUNCTION mpc55xx_copy_4
/* Loop counter = data size / 4 */
srwi. r5, r5, 2
@@ -50,7 +50,7 @@ copy_data4:
/* Return */
blr
#if !((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517))
#if !((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517))
/**
* @fn int mpc55xx_copy_8( const void *src, void *dest, size_t n)
*
@@ -77,7 +77,7 @@ copy_data:
/* Return */
blr
#endif /*!((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517))*/
#endif /*!((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517))*/
/**
* @fn int mpc55xx_zero_4( void *dest, size_t n)
@@ -87,10 +87,10 @@ copy_data:
* The address @a dest has to be aligned on 4 byte boundaries. The size @a n
* must be evenly divisible by 4. No SPE operations are used.
*/
#if ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517))
#if ((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517))
GLOBAL_FUNCTION mpc55xx_zero_32
GLOBAL_FUNCTION mpc55xx_zero_8
#endif /* ((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) */
#endif /* ((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517)) */
GLOBAL_FUNCTION mpc55xx_zero_4
/* Create zero */
xor r0, r0, r0
@@ -121,7 +121,7 @@ zero_big_data4:
bdnz zero_big_data4
/* Return */
blr
#if !((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517))
#if !((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517))
/**
* @fn int mpc55xx_zero_8( void *dest, size_t n)
*
@@ -220,4 +220,4 @@ zero_big_line:
/* Return */
blr
#endif /* !((MPC55XX_CHIP_DERIVATE>=5510) && (MPC55XX_CHIP_DERIVATE<=5517)) */
#endif /* !((MPC55XX_CHIP_TYPE>=5510) && (MPC55XX_CHIP_TYPE<=5517)) */

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@@ -44,7 +44,7 @@ GLOBAL_FUNCTION mpc55xx_fmpll_reset_config
/* Save link register */
mflr r9
#if ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))
#if ((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))
/*
* for MPC5510: pass in ptr to array with:
* off 0: temp setting for ESYNCR2
@@ -131,7 +131,7 @@ fmpll_continue:
* @brief Returns the system clock.
*/
GLOBAL_FUNCTION mpc55xx_get_system_clock
#if ((MPC55XX_CHIP_DERIVATE >= 5510) && (MPC55XX_CHIP_DERIVATE <= 5517))
#if ((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))
LA r4, FMPLL_ESYNCR1
lwz r3, 0(r4)
/* EPREDIV */