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Restored to pre PPC440 changes.

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This file was originally modified by me to support the PPC440 of the virtex5
BSP.  I have since discovered that the clock driver built with the MVME3100
BSP works out of the box for the virtex5 and so have switched to using that.
This file is reverted to the way it was before I touched it, modulo whitespace,
making some functions static (to avoid compiler warnings) and changes by others.
This commit is contained in:
Ric Claus
2012-11-30 15:47:34 -08:00
committed by Sebastian Huber
parent 1a33a6c88d
commit 84b19b5405
1 changed files with 53 additions and 113 deletions
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96
c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
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@@ -77,7 +77,7 @@ static inline uint32_t get_itimer(void)
/*
* ISR Handler
*/
void Clock_isr(void* handle)
static void Clock_isr(void* handle)
{
uint32_t clicks_til_next_interrupt;
#if defined(BSP_PPC403_CLOCK_ISR_IRQ_LEVEL)
@@ -106,7 +106,6 @@ void Clock_isr(void* handle)
* This should only happen if CPU_HPPA_CLICKS_PER_TICK is too small.
* But setting it low is useful for debug, so...
*/
if (clicks_til_next_interrupt < 400) {
tick_time = itimer_value + 1000;
clicks_til_next_interrupt = 1000;
@@ -117,27 +116,17 @@ void Clock_isr(void* handle)
* If it is too late, that means we missed the interrupt somehow.
* Rather than wait 35-50s for a wrap, we just fudge it here.
*/
if (clicks_til_next_interrupt > pit_value) {
tick_time = itimer_value + 1000;
clicks_til_next_interrupt = 1000;
/* XXX: count these! this should never happen :-) */
}
#ifndef ppc440
__asm__ volatile ("mtspr 0x3db, %0" :: "r"
(clicks_til_next_interrupt)); /* PIT */
#else
__asm__ volatile ("mtspr 0x016, %0" :: "r"
(clicks_til_next_interrupt)); /* Decrementer */
#endif
}
#ifndef ppc440
__asm__ volatile ( "mtspr 0x3d8, %0" :: "r" (0x08000000)); /* TSR */
#else /* Book E */
__asm__ volatile ( "mtspr 0x150, %0" :: "r" (0x08000000)); /* TSR */
#endif
__asm__ volatile ("mtspr 0x3d8, %0" :: "r" (0x08000000)); /* TSR */
Clock_driver_ticks++;
@@ -152,45 +141,35 @@ void Clock_isr(void* handle)
#endif
}
int ClockIsOn(const rtems_irq_connect_data* unused)
static int ClockIsOn(const rtems_irq_connect_data* unused)
{
register uint32_t tcr;
#ifndef ppc440
__asm__ volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
#else /* Book E */
__asm__ volatile ("mfspr %0, 0x154" : "=r" ((tcr))); /* TCR */
#endif
return (tcr & 0x04000000) != 0;
}
void ClockOff(const rtems_irq_connect_data* unused)
static void ClockOff(const rtems_irq_connect_data* unused)
{
register uint32_t tcr;
#ifndef ppc440
__asm__ volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
tcr &= ~ 0x04400000;
__asm__ volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
#else /* Book E */
__asm__ volatile ("mfspr %0, 0x154" : "=r" ((tcr))); /* TCR */
tcr &= ~ 0x04400000;
__asm__ volatile ("mtspr 0x154, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
#endif
}
void ClockOn(const rtems_irq_connect_data* unused)
static void ClockOn(const rtems_irq_connect_data* unused)
{
uint32_t iocr;
register uint32_t tcr;
#ifdef ppc403
#ifndef ppc405
uint32_t pvr;
#endif /* ppc403 */
Clock_driver_ticks = 0;
#ifdef ppc403 /* this is a ppc403 */
#ifndef ppc405 /* this is a ppc403 */
__asm__ volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */
if (bsp_timer_internal_clock) {
iocr &= ~4; /* timer clocked from system clock */
@@ -213,41 +192,28 @@ void ClockOn(const rtems_irq_connect_data* unused)
else if ((pvr & 0xff00) == 0x0100) /* 403GB */
auto_restart = true;
#elif defined(ppc405) /* ppc405 */
#else /* ppc405 */
__asm__ volatile ("mfdcr %0, 0x0b2" : "=r" (iocr)); /*405GP CPC0_CR1 */
if (bsp_timer_internal_clock) {
iocr &=~0x800000; /* timer clocked from system clock CETE */
iocr &=~0x800000; /* timer clocked from system clock CETE*/
} else {
iocr |= 0x800000; /* select external timer clock CETE */
iocr |= 0x800000; /* select external timer clock CETE*/
}
/* 405GP CPC0_CR1 */
__asm__ volatile ("mtdcr 0x0b2, %0" : "=r" (iocr) : "0" (iocr));
__asm__ volatile ("mtdcr 0x0b2, %0" : "=r" (iocr) : "0" (iocr)); /* 405GP CPC0_CR1 */
/*
* Enable auto restart
*/
auto_restart = true;
#else
/* PPC440 */
__asm__ volatile ("mfspr %0, 0x378" : "=r" (iocr)); /* 440 CCR1 */
if (bsp_timer_internal_clock) {
iocr &= ~0x00000100; /* timer clocked from system clock CETE */
} else {
iocr |= 0x00000100; /* select external timer clock CETE */
}
__asm__ volatile ("mtspr 0x378, %0" : "=r" (iocr) : "0" (iocr)); /*440 CCR1*/
#endif
#endif /* ppc405 */
pit_value = rtems_configuration_get_microseconds_per_tick() *
bsp_clicks_per_usec;
/*
* Set PIT value
*/
#ifndef ppc440
__asm__ volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
#else /* Book E */
__asm__ volatile ("mtspr 0x016, %0" : : "r" (pit_value)); /* Decrementer */
#endif
/*
* Set timer to autoreload, bit TCR->ARE = 1 0x0400000
@@ -255,20 +221,14 @@ void ClockOn(const rtems_irq_connect_data* unused)
*/
tick_time = get_itimer() + pit_value;
#ifndef ppc440
__asm__ volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
tcr = (tcr & ~0x04400000) | (auto_restart ? 0x04400000 : 0x04000000);
#if 1
__asm__ volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
#else /* Book E */
__asm__ volatile ("mfspr %0, 0x154" : "=r" ((tcr))); /* TCR */
tcr = (tcr & ~0x04400000) | (auto_restart ? 0x04400000 : 0x04000000);
__asm__ volatile ("mtspr 0x154, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
#endif
}
void Install_clock(
void (*clock_isr)(void *)
)
void Install_clock(void (*clock_isr)(void *))
{
rtems_irq_connect_data clockIrqConnData;
@@ -284,11 +244,7 @@ void Install_clock(
clockIrqConnData.on = ClockOn;
clockIrqConnData.off = ClockOff;
clockIrqConnData.isOn = ClockIsOn;
#if defined(ppc440) || defined(ppc405)
clockIrqConnData.name = BSP_PIT;
#else
clockIrqConnData.name = BSP_DECREMENTER;
#endif
clockIrqConnData.hdl = clock_isr;
if (!BSP_install_rtems_irq_handler (&clockIrqConnData)) {
printk("Unable to connect Clock Irq handler\n");
@@ -298,20 +254,14 @@ void Install_clock(
atexit(Clock_exit);
}
void ReInstall_clock(
void (*new_clock_isr)(void *)
)
void ReInstall_clock(void (*new_clock_isr)(void *))
{
uint32_t isrlevel = 0;
rtems_irq_connect_data clockIrqConnData;
rtems_interrupt_disable(isrlevel);
#if defined(ppc440) || defined(ppc405)
clockIrqConnData.name = BSP_PIT;
#else
clockIrqConnData.name = BSP_DECREMENTER;
#endif
if (!BSP_get_current_rtems_irq_handler(&clockIrqConnData)) {
printk("Unable to stop system clock\n");
rtems_fatal_error_occurred(1);
@@ -322,11 +272,7 @@ void ReInstall_clock(
clockIrqConnData.on = ClockOn;
clockIrqConnData.off = ClockOff;
clockIrqConnData.isOn = ClockIsOn;
#if defined(ppc440) || defined(ppc405)
clockIrqConnData.name = BSP_PIT;
#else
clockIrqConnData.name = BSP_DECREMENTER;
#endif
clockIrqConnData.hdl = new_clock_isr;
if (!BSP_install_rtems_irq_handler (&clockIrqConnData)) {
@@ -348,11 +294,7 @@ void Clock_exit(void)
{
rtems_irq_connect_data clockIrqConnData;
#if defined(ppc440) || defined(ppc405)
clockIrqConnData.name = BSP_PIT;
#else
clockIrqConnData.name = BSP_DECREMENTER;
#endif
if (!BSP_get_current_rtems_irq_handler(&clockIrqConnData)) {
printk("Unable to stop system clock\n");
rtems_fatal_error_occurred(1);
@@ -361,11 +303,9 @@ void Clock_exit(void)
BSP_remove_rtems_irq_handler (&clockIrqConnData);
}
rtems_device_driver Clock_initialize(
rtems_device_major_number major,
rtems_device_driver Clock_initialize(rtems_device_major_number major,
rtems_device_minor_number minor,
void *pargp
)
void *pargp)
{
Install_clock( Clock_isr );