bsp/beatnik: Move source files to bsps

This patch is a part of the BSP source reorganization.

Update #3285.
This commit is contained in:
Sebastian Huber
2018-04-25 10:25:00 +02:00
parent bf16ee53cb
commit 8266fb53f9
8 changed files with 4 additions and 4 deletions

View File

@@ -66,14 +66,14 @@ librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/beatnik/irq/irq_init.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/beatnik/irq/discovery_pic.c
#marvell
librtemsbsp_a_SOURCES += marvell/discovery.c
librtemsbsp_a_SOURCES += marvell/gti2c.c
librtemsbsp_a_SOURCES += marvell/gt_timer.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/beatnik/marvell/discovery.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/beatnik/marvell/gti2c.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/beatnik/marvell/gt_timer.c
#flash
librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/flash/flash.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/flash/intelFlash.c
librtemsbsp_a_SOURCES += flash/flashcfg.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/beatnik/flash/flashcfg.c
#pci
librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/pci/pci.c

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@@ -1,182 +0,0 @@
/*
* Authorship
* ----------
* This software ('beatnik' RTEMS BSP for MVME6100 and MVME5500) was
* created by Till Straumann <strauman@slac.stanford.edu>, 2005-2007,
* Stanford Linear Accelerator Center, Stanford University.
*
* Acknowledgement of sponsorship
* ------------------------------
* The 'beatnik' BSP was produced by
* the Stanford Linear Accelerator Center, Stanford University,
* under Contract DE-AC03-76SFO0515 with the Department of Energy.
*
* Government disclaimer of liability
* ----------------------------------
* Neither the United States nor the United States Department of Energy,
* nor any of their employees, makes any warranty, express or implied, or
* assumes any legal liability or responsibility for the accuracy,
* completeness, or usefulness of any data, apparatus, product, or process
* disclosed, or represents that its use would not infringe privately owned
* rights.
*
* Stanford disclaimer of liability
* --------------------------------
* Stanford University makes no representations or warranties, express or
* implied, nor assumes any liability for the use of this software.
*
* Stanford disclaimer of copyright
* --------------------------------
* Stanford University, owner of the copyright, hereby disclaims its
* copyright and all other rights in this software. Hence, anyone may
* freely use it for any purpose without restriction.
*
* Maintenance of notices
* ----------------------
* In the interest of clarity regarding the origin and status of this
* SLAC software, this and all the preceding Stanford University notices
* are to remain affixed to any copy or derivative of this software made
* or distributed by the recipient and are to be affixed to any copy of
* software made or distributed by the recipient that contains a copy or
* derivative of this software.
*
* ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
*/
#include <bsp.h>
#include <stdio.h>
#include <inttypes.h>
#define STATIC static
#include <bsp/flashPgmPvt.h>
/* MVME Board Specifica; board status reg. 2 where write-enable is controlled... */
#define SYS_FLASHA_WP (1<<5)
#define SYS_FBOOTB_WP (1<<3)
#define SYS_FBA_WP_HDR (1<<2)
#define SYS_FBOOTB_WP_HDR (1<<1)
#define SYS_STATUS_2_REG (1)
/* Forward Declarations */
STATIC struct bankdesc *
bankcheck(int bank, int quiet);
static int
flash_wp(int bank, int enbl);
STATIC uint32_t
read_us_timer(void);
/* Global Variables */
/* motload memory map */
static struct bankdesc mvme5500Flash[] = {
{ 0, 2 }, /* first entry gives number of entries */
{ 0xf2000000, 0x08000000, 0x20000*2, 2, BSP_flash_vendor_intel, 0, 0, 0, },
{ 0xff800000, 0x00800000, 0x20000*2, 2, BSP_flash_vendor_intel, 0, 0, 0, },
};
/* motload memory map */
static struct bankdesc mvme6100Flash[] = {
{ 0, 2 }, /* first entry gives number of entries */
{ 0xf4000000, 0x04000000, 0x20000*2, 2, BSP_flash_vendor_intel, 0, 0, 0, },
{ 0xf8000000, 0x04000000, 0x20000*2, 2, BSP_flash_vendor_intel, 0, 0, 0, },
};
struct flash_bsp_ops BSP_flashBspOps = {
bankcheck : bankcheck,
flash_wp : flash_wp,
read_us_timer: read_us_timer,
};
/* set (enbl:1), clear (enbl:0) or query (enbl:-1) write protection
*
* RETURNS 0 on success, nonzero on error.
*/
static int
flash_wp(int bank, int enbl)
{
BSP_BoardType b;
A8 p;
unsigned char hwp = 0, swp;
/* validate 'bank' argument */
if ( !bankcheck( bank, 0 ) )
return -1;
switch ( (b=BSP_getBoardType()) ) {
default:
fprintf(stderr,"Unknown board type %i\n",b);
return -1;
case MVME5500:
/* bit enables both banks; no readback of jumper available */
p = (A8)(BSP_MV64x60_DEV1_BASE + SYS_STATUS_2_REG);
swp = SYS_FLASHA_WP;
break;
case MVME6100:
{
p = (A8)(BSP_MV64x60_DEV1_BASE + SYS_STATUS_2_REG);
if ( 0 == bank ) {
hwp = SYS_FBA_WP_HDR;
swp = SYS_FLASHA_WP;
} else {
hwp = SYS_FBOOTB_WP_HDR;
swp = SYS_FBOOTB_WP;
}
if ( enbl && (*p & hwp) ) {
fprintf(stderr,"HW write protection enabled (jumper)\n");
return -1;
}
}
break;
}
if ( -1 == enbl ) {
/* query */
return *p & (swp | hwp);
} else {
if ( enbl ) {
*p |= swp;
} else {
*p &= ~swp;
}
}
return 0;
}
/* Lookup bank description in table */
STATIC struct bankdesc *
bankcheck(int bank, int quiet)
{
struct bankdesc *b;
switch ( BSP_getBoardType() ) {
case MVME5500: b = mvme5500Flash; break;
case MVME6100: b = mvme6100Flash; break;
default:
fprintf(stderr,"Unknown/unsupported board type\n");
return 0;
}
if ( bank >= b->size || bank < 0 ) {
if ( !quiet )
fprintf(stderr,"Invalid flash bank #: %i; (too big)\n", bank);
return 0;
}
return b + bank + 1;
}
STATIC uint32_t read_us_timer(void)
{
uint32_t now, mhz;
/* we burn cycles anyways... */
mhz = BSP_bus_frequency/BSP_time_base_divisor/1000;
asm volatile("mftb %0":"=r"(now));
return now/mhz;
}

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@@ -1,150 +0,0 @@
/*
* Acknowledgements:
* Valuable information was obtained from the following drivers
* netbsd: (C) Allegro Networks Inc; Wasabi Systems Inc.
* linux: (C) MontaVista, Software, Inc; Chris Zankel, Mark A. Greer.
* rtems: (C) Brookhaven National Laboratory; K. Feng
* but this implementation is original work by the author.
*/
/*
* Authorship
* ----------
* This software ('beatnik' RTEMS BSP for MVME6100 and MVME5500) was
* created by Till Straumann <strauman@slac.stanford.edu>, 2005-2007,
* Stanford Linear Accelerator Center, Stanford University.
*
* Acknowledgement of sponsorship
* ------------------------------
* The 'beatnik' BSP was produced by
* the Stanford Linear Accelerator Center, Stanford University,
* under Contract DE-AC03-76SFO0515 with the Department of Energy.
*
* Government disclaimer of liability
* ----------------------------------
* Neither the United States nor the United States Department of Energy,
* nor any of their employees, makes any warranty, express or implied, or
* assumes any legal liability or responsibility for the accuracy,
* completeness, or usefulness of any data, apparatus, product, or process
* disclosed, or represents that its use would not infringe privately owned
* rights.
*
* Stanford disclaimer of liability
* --------------------------------
* Stanford University makes no representations or warranties, express or
* implied, nor assumes any liability for the use of this software.
*
* Stanford disclaimer of copyright
* --------------------------------
* Stanford University, owner of the copyright, hereby disclaims its
* copyright and all other rights in this software. Hence, anyone may
* freely use it for any purpose without restriction.
*
* Maintenance of notices
* ----------------------
* In the interest of clarity regarding the origin and status of this
* SLAC software, this and all the preceding Stanford University notices
* are to remain affixed to any copy or derivative of this software made
* or distributed by the recipient and are to be affixed to any copy of
* software made or distributed by the recipient that contains a copy or
* derivative of this software.
*
* ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
*/
#include <rtems.h>
#include <rtems/bspIo.h>
#include <bsp.h>
#include <bsp/gtreg.h>
#include <bsp/pci.h>
#include <stdint.h>
#ifndef PCI_VENDOR_ID_MARVELL
#define PCI_VENDOR_ID_MARVELL 0x11ab
#endif
#ifndef PCI_DEVICE_ID_MARVELL_GT64260
#define PCI_DEVICE_ID_MARVELL_GT64260 0x6430
#endif
#ifndef PCI_DEVICE_ID_MARVELL_MV64360
#define PCI_DEVICE_ID_MARVELL_MV64360 0x6460
#endif
#if 0
#define MV64x60_PCI0_CONFIG_ADDR (BSP_MV64x60_BASE + 0xcf8)
#define MV64x60_PCI0_CONFIG_DATA (BSP_MV64x60_BASE + 0xcfc)
/* read from bus/slot/fn 0/0/0 */
static unsigned long
pci_early_config_read(int offset, int width)
{
out_be32((uint32_t*) pci.pci_config_addr,
0x80|(0<<8)|(PCI_DEVFN(0,0)<<16)|((offset&~3)<<24));
switch (width) {
default:
case 1:
return in_8((uint8_t*)pci.pci_config_data + (offset&3));
case 2:
return in_le16((uint16_t*)pci.pci_config_data + (offset&3));
case 4:
return in_le32((uint32_t *)pci.pci_config_data + (offset&3));
}
}
#endif
DiscoveryVersion
BSP_getDiscoveryVersion(int assertion)
{
static DiscoveryVersion rval = unknown;
if ( unknown ==rval ) {
unsigned char dc;
unsigned short ds;
/* this must work before and after the call to BSP_pciInitialize() --
* since the host bridge is at 0,0,0 it doesn't matter if the hosed
* access methods are installed or not (as a matter of fact this shouldn't
* matter for any device on hose 0)
*/
printk("config addr is %p\n", BSP_pci_configuration.pci_config_addr);
printk("config data is %p\n", BSP_pci_configuration.pci_config_data);
pci_read_config_word(0,0,0,PCI_VENDOR_ID, &ds);
if ( PCI_VENDOR_ID_MARVELL != ds ) {
if ( assertion ) {
printk("Host bridge vendor id: 0x%04x\n",ds);
rtems_panic("Host bridge vendor @ pci(0,0,0) is not MARVELL");
}
else return unknown;
}
pci_read_config_word(0,0,0,PCI_DEVICE_ID, &ds);
pci_read_config_byte(0,0,0,PCI_REVISION_ID, &dc);
switch (ds) {
case PCI_DEVICE_ID_MARVELL_MV64360:
rval = MV_64360;
break;
case PCI_DEVICE_ID_MARVELL_GT64260:
switch (dc) {
default:
break;
case 0x10:
return (rval = GT_64260_A);
case 0x20:
return (rval = GT_64260_B);
}
default:
if ( assertion ) {
printk("Marvell device id 0x%04x, revision 0x%02x; check %s:%u\n",
ds, dc,
__FILE__,__LINE__);
rtems_panic("Unknown Marvell bridge or revision@ pci(0,0,0) is not MARVELL");
}
break;
}
}
return rval;
}

File diff suppressed because it is too large Load Diff

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@@ -1,410 +0,0 @@
/* Driver for discovery timers and watchdog */
/*
* Acknowledgements:
* Valuable information was obtained from the following drivers
* netbsd: (C) Allegro Networks Inc; Wasabi Systems Inc.
* linux: (C) MontaVista, Software, Inc; Mark A. Greer.
* rtems: (C) Brookhaven National Laboratory; K. Feng
* but this implementation is original work by the author.
*/
/*
* Authorship
* ----------
* This software ('beatnik' RTEMS BSP for MVME6100 and MVME5500) was
* created by Till Straumann <strauman@slac.stanford.edu>, 2005-2007,
* Stanford Linear Accelerator Center, Stanford University.
*
* Acknowledgement of sponsorship
* ------------------------------
* The 'beatnik' BSP was produced by
* the Stanford Linear Accelerator Center, Stanford University,
* under Contract DE-AC03-76SFO0515 with the Department of Energy.
*
* Government disclaimer of liability
* ----------------------------------
* Neither the United States nor the United States Department of Energy,
* nor any of their employees, makes any warranty, express or implied, or
* assumes any legal liability or responsibility for the accuracy,
* completeness, or usefulness of any data, apparatus, product, or process
* disclosed, or represents that its use would not infringe privately owned
* rights.
*
* Stanford disclaimer of liability
* --------------------------------
* Stanford University makes no representations or warranties, express or
* implied, nor assumes any liability for the use of this software.
*
* Stanford disclaimer of copyright
* --------------------------------
* Stanford University, owner of the copyright, hereby disclaims its
* copyright and all other rights in this software. Hence, anyone may
* freely use it for any purpose without restriction.
*
* Maintenance of notices
* ----------------------
* In the interest of clarity regarding the origin and status of this
* SLAC software, this and all the preceding Stanford University notices
* are to remain affixed to any copy or derivative of this software made
* or distributed by the recipient and are to be affixed to any copy of
* software made or distributed by the recipient that contains a copy or
* derivative of this software.
*
* ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
*/
#include <rtems.h>
#include <bsp/gtreg.h>
#include <libcpu/io.h>
#include <bsp.h>
#include <bsp/irq.h>
#include <rtems/bspIo.h>
#include <stdint.h>
#include <bsp/gt_timer.h>
#define DEBUG
static inline uint32_t gt_rd(uint32_t off)
{
return in_le32( (volatile uint32_t *)(BSP_MV64x60_BASE+off) );
}
static inline void gt_wr(uint32_t off, uint32_t val)
{
out_le32( (volatile uint32_t *)(BSP_MV64x60_BASE+off), val);
}
static inline uint32_t gt_timer_bitmod(uint32_t off, uint32_t clr, uint32_t set)
{
unsigned flags;
uint32_t rval;
rtems_interrupt_disable(flags);
rval = gt_rd( off );
gt_wr( off, (rval & ~clr) | set );
rtems_interrupt_enable(flags);
return rval;
}
#define GT_TIMER_MAX 3
#define TIMER_ARGCHECK(t) do { if ((t)>GT_TIMER_MAX) return -1; } while (0)
static struct {
void (*isr)(void *);
void *arg;
} gt_timer_isrs[GT_TIMER_MAX+1] = {{0},};
uint32_t BSP_timer_read(uint32_t timer)
{
TIMER_ARGCHECK(timer);
return gt_rd(GT_TIMER_0 + (timer<<2));
}
int
BSP_timer_start(uint32_t timer, uint32_t period)
{
TIMER_ARGCHECK(timer);
gt_wr(GT_TIMER_0 + (timer<<2), period);
return 0;
}
int
BSP_timer_stop(uint32_t timer)
{
TIMER_ARGCHECK(timer);
/* disable, clear period, re-enable */
gt_timer_bitmod(GT_TIMER_0_3_Ctl, GT_TIMER_0_Ctl_Enb << (timer<<3), 0);
gt_wr(GT_TIMER_0 + (timer<<2), 0);
gt_timer_bitmod(GT_TIMER_0_3_Ctl, 0, GT_TIMER_0_Ctl_Enb << (timer<<3));
return 0;
}
int
BSP_timer_setup(uint32_t timer, void (*isr)(void *arg), void *arg, int reload)
{
TIMER_ARGCHECK(timer);
if ( isr && gt_timer_isrs[timer].isr )
return -1;
BSP_timer_stop(timer);
/* mask and clear */
gt_timer_bitmod(GT_TIMER_0_3_Intr_Msk, GT_TIMER_0_Intr<<timer, 0);
gt_timer_bitmod(GT_TIMER_0_3_Intr_Cse, GT_TIMER_0_Intr<<timer, 0);
/* set reload bit */
if ( reload )
gt_timer_bitmod(GT_TIMER_0_3_Ctl, 0, GT_TIMER_0_Ctl_Rld << (timer<<3));
else
gt_timer_bitmod(GT_TIMER_0_3_Ctl, GT_TIMER_0_Ctl_Rld << (timer<<3), 0);
asm volatile("":::"memory");
if ( isr ) {
gt_timer_isrs[timer].isr = isr;
gt_timer_isrs[timer].arg = arg;
asm volatile("":::"memory");
gt_timer_bitmod(GT_TIMER_0_3_Intr_Msk, 0, GT_TIMER_0_Intr<<timer);
} else {
gt_timer_isrs[timer].isr = 0;
gt_timer_isrs[timer].arg = 0;
}
return 0;
}
static void
gt_timer_hdl(rtems_irq_hdl_param arg)
{
int iarg = (int)arg;
int timer;
uint32_t bit;
for ( ; iarg; iarg >>= 4 ) {
timer = (iarg & 0xf)-1;
bit = GT_TIMER_0_Intr<<timer;
if ( gt_timer_bitmod(GT_TIMER_0_3_Intr_Cse, bit, 0) & bit ) {
/* cause was set */
if ( ! gt_timer_isrs[timer].isr ) {
printk("gt_timer: warning; no ISR connected but and IRQ happened (timer # %i)\n", timer);
/* mask */
gt_timer_bitmod(GT_TIMER_0_3_Intr_Msk, bit, 0);
} else {
gt_timer_isrs[timer].isr(gt_timer_isrs[timer].arg);
}
}
}
}
int
BSP_timers_initialize(void)
{
rtems_irq_connect_data xx = {0};
int i, ainc, arg;
xx.hdl = gt_timer_hdl;
xx.on = 0;
xx.off = 0;
xx.isOn = 0;
switch (BSP_getDiscoveryVersion(0)) {
case MV_64360:
i = 3;
ainc = 1;
arg = 4;
break;
default:
i = 1;
ainc = 0x0202;
arg = 0x0403;
break;
}
for ( ; i>=0; i--, arg-=ainc ) {
xx.name = BSP_IRQ_TIME0_1 + i;
xx.handle = (rtems_irq_hdl_param)arg;
if ( !BSP_install_rtems_irq_handler(&xx) )
return -1;
}
return 0;
}
#ifdef DEBUG_MODULAR
static int
BSP_timers_uninstall(void)
{
rtems_irq_connect_data xx = {0};
int i;
xx.hdl = gt_timer_hdl;
xx.on = 0;
xx.off = 0;
xx.isOn = 0;
for ( i=0; i<= GT_TIMER_MAX; i++ ) {
if ( BSP_timer_setup(i, 0, 0, 0) )
return -1;
}
switch (BSP_getDiscoveryVersion(0)) {
case MV_64360:
i = 3;
break;
default:
i = 1;
break;
}
for ( ; i >= 0; i-- ) {
xx.name = BSP_IRQ_TIME0_1 + i;
BSP_get_current_rtems_irq_handler(&xx);
if ( !BSP_remove_rtems_irq_handler(&xx) )
return -1;
}
return 0;
}
#endif
uint32_t
BSP_timer_clock_get(uint32_t timer)
{
return BSP_bus_frequency;
}
int BSP_timer_instances(void)
{
return GT_TIMER_MAX + 1;
}
/* On a 64260A we can't read the status (on/off), apparently
* so we maintain it locally and assume the firmware has
* not enabled the dog initially...
*/
static uint32_t wdog_on = 0x00ffffff;
static uint32_t rd_wdcnf(void)
{
uint32_t cnf = gt_rd(GT_WDOG_Config);
/* BSD driver says that on the 64260A we always
* read 0xffffffff so we have to maintain the
* status locally (and hope we get the initial
* value right).
*/
if ( ~0 == cnf )
cnf = wdog_on;
return cnf;
}
/* change on/off state assume caller has IRQs disabled */
static void dog_toggle(uint32_t ctl)
{
ctl &= ~( GT_WDOG_Config_Ctl1a | GT_WDOG_Config_Ctl1b \
| GT_WDOG_Config_Ctl2a | GT_WDOG_Config_Ctl2b);
gt_wr(GT_WDOG_Config, ctl | GT_WDOG_Config_Ctl1a);
gt_wr(GT_WDOG_Config, ctl | GT_WDOG_Config_Ctl1b);
}
static void dog_pet(uint32_t ctl)
{
ctl &= ~( GT_WDOG_Config_Ctl1a | GT_WDOG_Config_Ctl1b \
| GT_WDOG_Config_Ctl2a | GT_WDOG_Config_Ctl2b);
gt_wr(GT_WDOG_Config, ctl | GT_WDOG_Config_Ctl2a);
gt_wr(GT_WDOG_Config, ctl | GT_WDOG_Config_Ctl2b);
}
/* Enable watchdog and set a timeout (in us)
* a timeout of 0xffffffff selects the old/existing
* timeout.
*
* RETURNS 0 on success
*/
int
BSP_watchdog_enable(uint32_t timeout_us)
{
unsigned long long x = timeout_us;
unsigned flags;
uint32_t ctl;
x *= BSP_bus_frequency;
x /= 256; /* there seems to be a prescaler */
x /= 1000000; /* us/s */
if ( x > (1<<24)-1 )
x = (1<<24)-1;
if ( 0xffffffff != timeout_us )
timeout_us = x;
rtems_interrupt_disable(flags);
ctl = rd_wdcnf();
/* if enabled, disable first */
if ( GT_WDOG_Config_Enb & ctl ) {
dog_toggle(ctl);
}
if ( 0xffffffff == timeout_us ) {
timeout_us = ctl & ((1<<24)-1);
dog_toggle(ctl);
dog_pet(ctl);
} else {
gt_wr(GT_WDOG_Config, timeout_us | GT_WDOG_Config_Ctl1a);
gt_wr(GT_WDOG_Config, timeout_us | GT_WDOG_Config_Ctl1b);
}
wdog_on = GT_WDOG_Config_Enb | timeout_us;
rtems_interrupt_enable(flags);
return 0;
}
/* Disable watchdog
* RETURNS 0 on success
*/
int BSP_watchdog_disable(void)
{
unsigned long flags;
uint32_t ctl;
rtems_interrupt_disable(flags);
ctl = rd_wdcnf();
if ( (GT_WDOG_Config_Enb & ctl) ) {
dog_toggle(ctl);
wdog_on = ctl & ~(GT_WDOG_Config_Enb);
}
rtems_interrupt_enable(flags);
return 0;
}
/* Check status -- unfortunately there seems to be no way
* to read the running value...
*
* RETURNS nonzero if enabled/running, zero if disabled/stopped
*/
int BSP_watchdog_status(void)
{
uint32_t ctl = rd_wdcnf();
/* report also the current period */
return GT_WDOG_Config_Enb & ctl ? ctl : 0;
}
/* Pet the watchdog (rearm to configured timeout)
* RETURNS: 0 on success, nonzero on failure (watchdog
* currently not running).
*/
int BSP_watchdog_pet(void)
{
unsigned long flags;
if ( !wdog_on )
return -1;
rtems_interrupt_disable(flags);
dog_pet(rd_wdcnf());
rtems_interrupt_enable(flags);
return 0;
}
#ifdef DEBUG_MODULAR
int
_cexpModuleFinalize(void *unused)
{
BSP_watchdog_disable();
return BSP_timers_uninstall();
}
void
_cexpModuleInitialize(void *unused)
{
BSP_timers_initialize();
}
#endif

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@@ -1,447 +0,0 @@
/* $NetBSD: gti2c.c,v 1.2 2005/02/27 00:27:21 perry Exp $ */
/*
* Copyright (c) 2005 Brocade Communcations, inc.
* All rights reserved.
*
* Written by Matt Thomas for Brocade Communcations, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of Brocade Communications, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY BROCADE COMMUNICATIONS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL EITHER BROCADE COMMUNICATIONS, INC. BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* Fixed many things + ported to RTEMS by Till Straumann, 2005 */
#include <stdio.h>
#include <rtems.h>
#include <libcpu/io.h>
#include <sys/errno.h>
#include <rtems/bspIo.h>
#include <rtems/score/sysstate.h>
#include <bsp/irq.h>
#include <rtems/libi2c.h>
#include <sys/cdefs.h>
#include <bsp/gtintrreg.h>
#include <bsp/gti2creg.h>
#include <bsp/gti2c_busdrv.h>
#define ENABLE_IRQ_AT_PIC_HACK /* workaround for a bad HW bug */
#undef DEBUG
#ifndef BSP_IRQ_MIN_PRIO
#define BSP_IRQ_MIN_PRIO 1
#endif
struct gti2c_softc {
uint32_t sc_gt;
uint32_t sc_cntl;
int sc_inited;
rtems_id sc_sync;
int sc_irqs; /* statistics */
};
#ifdef DEBUG
#define STATIC
#else
#define STATIC static
#endif
typedef struct {
rtems_libi2c_bus_t bus_desc;
struct gti2c_softc pvt;
} gti2c_desc_rec, *gti2c_desc;
STATIC rtems_status_code
gt_i2c_init(rtems_libi2c_bus_t *bh);
STATIC rtems_status_code
gt_i2c_send_start(rtems_libi2c_bus_t *bh);
STATIC rtems_status_code
gt_i2c_send_stop(rtems_libi2c_bus_t *bh);
STATIC rtems_status_code
gt_i2c_send_addr(rtems_libi2c_bus_t *bh, uint32_t addr, int rw);
STATIC int
gt_i2c_read_bytes(rtems_libi2c_bus_t *bh, unsigned char *buf, int len);
STATIC int
gt_i2c_write_bytes(rtems_libi2c_bus_t *bh, unsigned char *buf, int len);
static rtems_libi2c_bus_ops_t myops = {
init: gt_i2c_init,
send_start: gt_i2c_send_start,
send_stop: gt_i2c_send_stop,
send_addr: gt_i2c_send_addr,
read_bytes: gt_i2c_read_bytes,
write_bytes: gt_i2c_write_bytes,
};
static gti2c_desc_rec my_bus_tbl = {
{
ops: &myops,
size: sizeof(my_bus_tbl),
},/* public fields */
{
sc_gt: BSP_MV64x60_BASE,
sc_cntl: I2C_Control_TWSIEn,
sc_inited: 0,
sc_sync: 0
} /* our private fields */
};
static inline uint32_t
gt_read(uint32_t base, uint32_t off)
{
return in_le32((volatile uint32_t*)(base+off));
}
static inline void
gt_write(uint32_t base, uint32_t off, uint32_t val)
{
out_le32((volatile uint32_t*)(base+off), val);
}
static inline void
disable_irq(struct gti2c_softc *sc)
{
uint32_t v = gt_read(sc->sc_gt, I2C_REG_Control);
gt_write(sc->sc_gt, I2C_REG_Control, v & ~I2C_Control_IntEn);
}
static rtems_status_code
gt_i2c_wait(struct gti2c_softc *sc, uint32_t control, uint32_t desired_status)
{
uint32_t status;
rtems_status_code rval;
control |= I2C_Control_IntEn;
gt_write(sc->sc_gt, I2C_REG_Control, control | sc->sc_cntl);
if ( sc->sc_inited ) {
#ifdef ENABLE_IRQ_AT_PIC_HACK
BSP_enable_irq_at_pic(BSP_IRQ_I2C);
#endif
rval = rtems_semaphore_obtain(sc->sc_sync, RTEMS_WAIT, 100);
if ( RTEMS_SUCCESSFUL != rval )
return rval;
} else {
uint32_t then, now;
/* run in polling mode - useful during init */
if ( _System_state_Is_up(_System_state_Get()) ) {
printk("WARNING: gti2c running in polled mode -- should initialize properly!\n");
}
asm volatile("mftb %0":"=r"(then));
do {
asm volatile("mftb %0":"=r"(now));
/* poll timebase for .2 seconds assuming a bus clock of 100MHz */
if ( now - then > (uint32_t)100000000/4/5 )
return RTEMS_TIMEOUT;
} while ( ! (I2C_Control_IFlg & gt_read(sc->sc_gt, I2C_REG_Control)) );
}
status = gt_read(sc->sc_gt, I2C_REG_Status);
if ( status != desired_status && (status!=I2C_Status_ReStarted || desired_status!=I2C_Status_Started) )
return RTEMS_IO_ERROR;
return RTEMS_SUCCESSFUL;
}
static void
gt_i2c_intr(void *arg)
{
struct gti2c_softc * const sc = &my_bus_tbl.pvt;
uint32_t v;
v = gt_read(sc->sc_gt, I2C_REG_Control);
if ((v & I2C_Control_IFlg) == 0) {
printk("gt_i2c_intr: IRQ but IFlg not set??\n");
return;
}
gt_write(sc->sc_gt, I2C_REG_Control, v & ~(I2C_Control_IntEn));
#if 0
gt_read(sc->sc_gt, I2C_REG_Control);
asm volatile("sync");
/* This is how bad it is: after turning off the IntEn bit, the line
* still remains asserted! (shame on you.)
*
* The test below (on MVME6100; the MVME5500 has the same problem
* but the main cause register address is different; substitute
* 0xf100000c for 0xf1000c68 on a 5500).
*
* The skew was 101 TB ticks or ~3us (bus freq 133MHz) which
* really sucks.
*
* Therefore, we must disable the interrupt at the PIC
*/
{unsigned from,to;
asm volatile("mftb %0":"=r"(from));
while ( in_le32((volatile uint32_t*)0xf100000c) & 0x20 )
;
asm volatile("mftb %0":"=r"(to));
printk("I2C IRQ remained asserted for %i TB ticks!\n",to-from);
}
#endif
#ifdef ENABLE_IRQ_AT_PIC_HACK
BSP_disable_irq_at_pic(BSP_IRQ_I2C);
#endif
sc->sc_irqs++;
rtems_semaphore_release(sc->sc_sync);
}
STATIC rtems_status_code
gt_i2c_init(rtems_libi2c_bus_t *bh)
{
struct gti2c_softc * const sc = &((gti2c_desc)bh)->pvt;
unsigned m,n,N;
disable_irq(sc);
/* reset */
gt_write(sc->sc_gt, I2C_REG_SoftReset, 0);
gt_write(sc->sc_gt, I2C_REG_SlaveAddr, 0);
gt_write(sc->sc_gt, I2C_REG_ExtSlaveAddr, 0);
/* Set baud rate; I don't know the details
* but have to assume that it has to fit into 7 bits
* (as indicated by some experiment)
*/
n = 0, N=1<<n;
do {
n++, N<<=1;
/* increase 2^n until m becomes small enough */
m = BSP_bus_frequency / 10 / 62500 / N;
} while ( m > 16 );
/* n is at least 1 */
if ( n > 8 ) {
n = 8; m = 16; /* nothing else we can do */
}
if ( 0 == m )
m = 1; /* nothing we can do */
gt_write(sc->sc_gt, I2C_REG_BaudRate, I2C_BaudRate(m-1, n-1));
if ( !sc->sc_inited ) {
if ( _System_state_Is_up(_System_state_Get()) ) {
rtems_irq_connect_data ii = {
name: BSP_IRQ_I2C,
hdl: gt_i2c_intr,
on: 0,
off: 0,
isOn: 0
};
rtems_status_code err;
/* synchronization semaphore */
err = rtems_semaphore_create(
rtems_build_name('g','i','2','c'),
0,
RTEMS_SIMPLE_BINARY_SEMAPHORE | RTEMS_LOCAL,
0,
&sc->sc_sync);
if ( err ) {
sc->sc_sync = 0;
return err;
}
if ( !BSP_install_rtems_irq_handler(&ii) ) {
fprintf(stderr,"Unable to install interrupt handler\n");
rtems_semaphore_delete(sc->sc_sync);
return RTEMS_INTERNAL_ERROR;
}
BSP_irq_set_priority(BSP_IRQ_I2C, BSP_IRQ_MIN_PRIO);
sc->sc_inited = 1;
} else {
}
} else {
rtems_semaphore_flush(sc->sc_sync);
}
return RTEMS_SUCCESSFUL;
}
STATIC rtems_status_code
gt_i2c_send_start(rtems_libi2c_bus_t *bh)
{
struct gti2c_softc * const sc = &((gti2c_desc)bh)->pvt;
return gt_i2c_wait(sc, I2C_Control_Start, I2C_Status_Started);
}
STATIC rtems_status_code
gt_i2c_send_stop(rtems_libi2c_bus_t *bh)
{
struct gti2c_softc * const sc = &((gti2c_desc)bh)->pvt;
uint32_t data;
data = gt_read(sc->sc_gt, I2C_REG_Status);
if ( I2C_Status_Started == data || I2C_Status_ReStarted == data ) {
/* According to the spec, a void message (start - stop sequence)
* is illegal and indeed, the chip plays bad tricks with us, i.e.,
* sometimes it hangs the bus so that it remains idle forever.
* so we have to address someone...
*/
gt_i2c_send_addr(bh, /*just something... */ 8, 1);
data = gt_read(sc->sc_gt, I2C_REG_Status);
}
if ( I2C_Status_AddrReadAck == data ) {
/* Another thing: spec says that the master generates stop only after
* not acknowledging the last byte. Again, the chip doesn't like
* to be stopped in this condition - hence we just do it the favor
* and read a single byte...
*/
gt_i2c_read_bytes(bh, (unsigned char *)&data, 1);
}
gt_write(sc->sc_gt, I2C_REG_Control, I2C_Control_Stop | sc->sc_cntl);
/* should we poll for idle? There seems to be in IRQ when this completes */
return RTEMS_SUCCESSFUL;
}
STATIC rtems_status_code
gt_i2c_send_addr(rtems_libi2c_bus_t *bh, uint32_t addr, int rw)
{
struct gti2c_softc * const sc = &((gti2c_desc)bh)->pvt;
uint32_t data, wanted_status;
uint8_t read_mask = rw ? 1 : 0;
rtems_status_code error;
if (read_mask) {
wanted_status = I2C_Status_AddrReadAck;
} else {
wanted_status = I2C_Status_AddrWriteAck;
}
/*
* First byte contains whether this xfer is a read or write.
*/
data = read_mask;
if (addr > 0x7f) {
/*
* If this is a 10bit request, the first address byte is
* 0b11110<b9><b8><r/w>.
*/
data |= 0xf0 | ((addr & 0x300) >> 7);
gt_write(sc->sc_gt, I2C_REG_Data, data);
error = gt_i2c_wait(sc, 0, wanted_status);
if (error)
return error;
/*
* The first address byte has been sent, now to send
* the second one.
*/
if (read_mask) {
wanted_status = I2C_Status_2ndAddrReadAck;
} else {
wanted_status = I2C_Status_2ndAddrWriteAck;
}
data = (uint8_t) addr;
} else {
data |= (addr << 1);
}
gt_write(sc->sc_gt, I2C_REG_Data, data);
return gt_i2c_wait(sc, 0, wanted_status);
}
STATIC int
gt_i2c_read_bytes(rtems_libi2c_bus_t *bh, unsigned char *buf, int len)
{
struct gti2c_softc * const sc = &((gti2c_desc)bh)->pvt;
rtems_status_code error;
register unsigned char *p=buf;
while ( len-- > 0 ) {
error = gt_i2c_wait(
sc,
len ? I2C_Control_ACK : 0,
len ? I2C_Status_MasterReadAck : I2C_Status_MasterReadNoAck);
if ( error ) {
return -error;
}
*p++ = gt_read(sc->sc_gt, I2C_REG_Data);
}
return p-buf;
}
STATIC int
gt_i2c_write_bytes(rtems_libi2c_bus_t *bh, unsigned char *buf, int len)
{
struct gti2c_softc * const sc = &((gti2c_desc)bh)->pvt;
int rval = 0;
rtems_status_code error;
while ( len-- > 0 ) {
gt_write(sc->sc_gt, I2C_REG_Data, buf[rval]);
error = gt_i2c_wait(sc, 0, I2C_Status_MasterWriteAck);
if ( error ) {
return -error;
}
rval++;
}
return rval;
}
rtems_libi2c_bus_t *gt64260_i2c_bus_descriptor = &my_bus_tbl.bus_desc;
#ifdef DEBUG_MODULAR
void
_cexpModuleInitialize(void *arg)
{
gt_i2c_init(&gt64260_i2c_bus_descriptor->bus_desc);
}
int
_cexpModuleFinalize(void * arg)
{
struct gti2c_softc * const sc = &gt64260_i2c_bus_descriptor->pvt;
rtems_irq_connect_data ii = {
name: BSP_IRQ_I2C,
hdl: gt_i2c_intr,
on: noop,
off: noop,
isOn: inoop
};
rtems_semaphore_delete(sc->sc_sync);
return !BSP_remove_rtems_irq_handler(&ii);
}
#endif

View File

@@ -1,215 +0,0 @@
/* Setup/glue to attach VME DMA driver to the beatnik BSP */
/*
* Authorship
* ----------
* This software ('beatnik' RTEMS BSP for MVME6100 and MVME5500) was
* created by Till Straumann <strauman@slac.stanford.edu>, 2005-2007,
* Stanford Linear Accelerator Center, Stanford University.
*
* Acknowledgement of sponsorship
* ------------------------------
* The 'beatnik' BSP was produced by
* the Stanford Linear Accelerator Center, Stanford University,
* under Contract DE-AC03-76SFO0515 with the Department of Energy.
*
* Government disclaimer of liability
* ----------------------------------
* Neither the United States nor the United States Department of Energy,
* nor any of their employees, makes any warranty, express or implied, or
* assumes any legal liability or responsibility for the accuracy,
* completeness, or usefulness of any data, apparatus, product, or process
* disclosed, or represents that its use would not infringe privately owned
* rights.
*
* Stanford disclaimer of liability
* --------------------------------
* Stanford University makes no representations or warranties, express or
* implied, nor assumes any liability for the use of this software.
*
* Stanford disclaimer of copyright
* --------------------------------
* Stanford University, owner of the copyright, hereby disclaims its
* copyright and all other rights in this software. Hence, anyone may
* freely use it for any purpose without restriction.
*
* Maintenance of notices
* ----------------------
* In the interest of clarity regarding the origin and status of this
* SLAC software, this and all the preceding Stanford University notices
* are to remain affixed to any copy or derivative of this software made
* or distributed by the recipient and are to be affixed to any copy of
* software made or distributed by the recipient that contains a copy or
* derivative of this software.
*
* ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
*/
#include <stdio.h>
#include <stdint.h>
#include <rtems.h>
#include <bsp.h>
#include <bsp/VME.h>
#include <bsp/vmeTsi148.h>
#include <bsp/vmeUniverse.h>
#include <bsp/VMEDMA.h>
#include <bsp/vmeTsi148DMA.h>
#include <bsp/vmeUniverseDMA.h>
#include <bsp/bspVmeDmaList.h>
typedef struct DmaOpsRec_ {
int (*setup)(int, uint32_t, uint32_t, void *);
int (*start)(int, uint32_t, uint32_t, uint32_t);
uint32_t (*status)(int);
VMEDmaListClass listClass;
} DmaOpsRec, *DmaOps;
static DmaOpsRec universeOps = {
vmeUniverseDmaSetup,
vmeUniverseDmaStart,
vmeUniverseDmaStatus,
&vmeUniverseDmaListClass,
};
static DmaOpsRec tsiOps = {
vmeTsi148DmaSetup,
vmeTsi148DmaStart,
vmeTsi148DmaStatus,
&vmeTsi148DmaListClass,
};
static int setup(int a, uint32_t b, uint32_t c, void *d);
static int start(int a, uint32_t b, uint32_t c, uint32_t d);
static uint32_t status(int a);
static DmaOpsRec jumpstartOps = {
setup,
start,
status,
0
};
static DmaOps dmaOps = &jumpstartOps;
static DmaOps selectOps()
{
return (MVME6100 != BSP_getBoardType()) ?
&universeOps : &tsiOps;
}
static int
setup(int a, uint32_t b, uint32_t c, void *d)
{
return (dmaOps=selectOps())->setup(a,b,c,d);
}
static int
start(int a, uint32_t b, uint32_t c, uint32_t d)
{
return (dmaOps=selectOps())->start(a,b,c,d);
}
static uint32_t
status(int a)
{
return (dmaOps=selectOps())->status(a);
}
int
BSP_VMEDmaSetup(int channel, uint32_t bus_mode, uint32_t xfer_mode, void *custom_setup)
{
return dmaOps->setup(channel, bus_mode, xfer_mode, custom_setup);
}
int
BSP_VMEDmaStart(int channel, uint32_t pci_addr, uint32_t vme_addr, uint32_t n_bytes)
{
return dmaOps->start(channel, pci_addr, vme_addr, n_bytes);
}
uint32_t
BSP_VMEDmaStatus(int channel)
{
return dmaOps->status(channel);
}
BSP_VMEDmaListDescriptor
BSP_VMEDmaListDescriptorSetup(
BSP_VMEDmaListDescriptor d,
uint32_t attr_mask,
uint32_t xfer_mode,
uint32_t pci_addr,
uint32_t vme_addr,
uint32_t n_bytes)
{
VMEDmaListClass pc;
if ( !d ) {
if ( ! (pc = dmaOps->listClass) ) {
pc = (dmaOps = selectOps())->listClass;
}
return BSP_VMEDmaListDescriptorNewTool(
pc,
attr_mask,
xfer_mode,
pci_addr,
vme_addr,
n_bytes);
}
return BSP_VMEDmaListDescriptorSetupTool(d, attr_mask, xfer_mode, pci_addr, vme_addr, n_bytes);
}
int
BSP_VMEDmaListStart(int channel, BSP_VMEDmaListDescriptor list)
{
return BSP_VMEDmaListDescriptorStartTool(0, channel, list);
}
/* NOT thread safe! */
int
BSP_VMEDmaInstallISR(int channel, BSP_VMEDmaIRQCallback cb, void *usr_arg)
{
int vec;
BSP_VME_ISR_t curr;
void *carg;
if ( MVME6100 != BSP_getBoardType() ) {
if ( channel != 0 )
return -1;
vec = UNIV_DMA_INT_VEC;
} else {
if ( channel < 0 || channel > 1 )
return -1;
vec = (channel ? TSI_DMA1_INT_VEC : TSI_DMA_INT_VEC );
}
curr = BSP_getVME_isr(vec, &carg);
if ( cb && curr ) {
/* IRQ currently in use */
return -1;
}
if ( !cb && !curr ) {
/* Allow uninstall if no handler is currently installed;
* just make sure IRQ is disabled
*/
BSP_disableVME_int_lvl(vec);
return 0;
}
if ( cb ) {
if ( BSP_installVME_isr(vec, (BSP_VME_ISR_t)cb, usr_arg) )
return -4;
BSP_enableVME_int_lvl(vec);
} else {
BSP_disableVME_int_lvl(vec);
if ( BSP_removeVME_isr(vec, curr, carg) )
return -4;
}
return 0;
}

View File

@@ -1,303 +0,0 @@
/* Standard VME bridge configuration for MVME5500, MVME6100 */
/*
* Authorship
* ----------
* This software ('beatnik' RTEMS BSP for MVME6100 and MVME5500) was
* created by Till Straumann <strauman@slac.stanford.edu>, 2005-2007,
* Stanford Linear Accelerator Center, Stanford University.
*
* Acknowledgement of sponsorship
* ------------------------------
* The 'beatnik' BSP was produced by
* the Stanford Linear Accelerator Center, Stanford University,
* under Contract DE-AC03-76SFO0515 with the Department of Energy.
*
* Government disclaimer of liability
* ----------------------------------
* Neither the United States nor the United States Department of Energy,
* nor any of their employees, makes any warranty, express or implied, or
* assumes any legal liability or responsibility for the accuracy,
* completeness, or usefulness of any data, apparatus, product, or process
* disclosed, or represents that its use would not infringe privately owned
* rights.
*
* Stanford disclaimer of liability
* --------------------------------
* Stanford University makes no representations or warranties, express or
* implied, nor assumes any liability for the use of this software.
*
* Stanford disclaimer of copyright
* --------------------------------
* Stanford University, owner of the copyright, hereby disclaims its
* copyright and all other rights in this software. Hence, anyone may
* freely use it for any purpose without restriction.
*
* Maintenance of notices
* ----------------------
* In the interest of clarity regarding the origin and status of this
* SLAC software, this and all the preceding Stanford University notices
* are to remain affixed to any copy or derivative of this software made
* or distributed by the recipient and are to be affixed to any copy of
* software made or distributed by the recipient that contains a copy or
* derivative of this software.
*
* ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
*/
#include <rtems.h>
#include <rtems/bspIo.h>
#include <bsp.h>
#include <bsp/VME.h>
#include <bsp/VMEConfig.h>
#include <bsp/irq.h>
#include <bsp/vmeUniverse.h>
#define _VME_TSI148_DECLARE_SHOW_ROUTINES
#include <bsp/vmeTsi148.h>
#include <libcpu/bat.h>
/* Use a weak alias for the VME configuration.
* This permits individual applications to override
* this routine.
* They may even create an 'empty'
*
* void BSP_vme_config(void) {}
*
* which will avoid linking in the Universe driver
* at all :-).
*/
void BSP_vme_config(void) __attribute__ (( weak, alias("__BSP_default_vme_config") ));
typedef struct {
int (*xlate_adrs)(int, int, unsigned long, unsigned long, unsigned long *);
int (*install_isr)(unsigned long, BSP_VME_ISR_t, void *);
int (*remove_isr)(unsigned long, BSP_VME_ISR_t, void *);
BSP_VME_ISR_t (*get_isr)(unsigned long vector, void **);
int (*enable_int_lvl)(unsigned int);
int (*disable_int_lvl)(unsigned int);
int (*outbound_p_cfg)(unsigned long, unsigned long, unsigned long, unsigned long, unsigned long);
int (*inbound_p_cfg) (unsigned long, unsigned long, unsigned long, unsigned long, unsigned long);
void (*outbound_p_show)(FILE*);
void (*inbound_p_show) (FILE*);
void (*reset_bus)(void);
int (*install_irq_mgr)(int, int, int, ...);
} VMEOpsRec, *VMEOps;
static VMEOpsRec uniOpsRec = {
xlate_adrs: vmeUniverseXlateAddr,
install_isr: vmeUniverseInstallISR,
remove_isr: vmeUniverseRemoveISR,
get_isr: vmeUniverseISRGet,
enable_int_lvl: vmeUniverseIntEnable,
disable_int_lvl: vmeUniverseIntDisable,
outbound_p_cfg: vmeUniverseMasterPortCfg,
inbound_p_cfg: vmeUniverseSlavePortCfg,
outbound_p_show: vmeUniverseMasterPortsShow,
inbound_p_show: vmeUniverseSlavePortsShow,
reset_bus: vmeUniverseResetBus,
install_irq_mgr: vmeUniverseInstallIrqMgrAlt,
};
static VMEOpsRec tsiOpsRec = {
xlate_adrs: vmeTsi148XlateAddr,
install_isr: vmeTsi148InstallISR,
remove_isr: vmeTsi148RemoveISR,
get_isr: vmeTsi148ISRGet,
enable_int_lvl: vmeTsi148IntEnable,
disable_int_lvl: vmeTsi148IntDisable,
outbound_p_cfg: vmeTsi148OutboundPortCfg,
inbound_p_cfg: vmeTsi148InboundPortCfg,
outbound_p_show: vmeTsi148OutboundPortsShow,
inbound_p_show: vmeTsi148InboundPortsShow,
reset_bus: vmeTsi148ResetBus,
install_irq_mgr: vmeTsi148InstallIrqMgrAlt,
};
static VMEOps theOps = 0;
int
BSP_vme2local_adrs(unsigned long am, unsigned long vmeaddr, unsigned long *plocaladdr)
{
int rval=theOps->xlate_adrs(1,0,am,vmeaddr,plocaladdr);
*plocaladdr+=PCI_MEM_BASE;
return rval;
}
int
BSP_local2vme_adrs(unsigned long am, unsigned long localaddr, unsigned long *pvmeaddr)
{
return theOps->xlate_adrs(0, 0, am,localaddr+PCI_DRAM_OFFSET,pvmeaddr);
}
int
BSP_installVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *arg)
{
return theOps->install_isr(vector, handler, arg);
}
int
BSP_removeVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *arg)
{
return theOps->remove_isr(vector, handler, arg);
}
/* retrieve the currently installed ISR for a given vector */
BSP_VME_ISR_t
BSP_getVME_isr(unsigned long vector, void **parg)
{
return theOps->get_isr(vector, parg);
}
int
BSP_enableVME_int_lvl(unsigned int level)
{
return theOps->enable_int_lvl(level);
}
int
BSP_disableVME_int_lvl(unsigned int level)
{
return theOps->disable_int_lvl(level);
}
int
BSP_VMEOutboundPortCfg(
unsigned long port,
unsigned long address_space,
unsigned long vme_address,
unsigned long pci_address,
unsigned long size)
{
return theOps->outbound_p_cfg(port, address_space, vme_address, pci_address, size);
}
int
BSP_VMEInboundPortCfg(
unsigned long port,
unsigned long address_space,
unsigned long vme_address,
unsigned long pci_address,
unsigned long size)
{
return theOps->inbound_p_cfg(port, address_space, vme_address, pci_address, size);
}
void
BSP_VMEOutboundPortsShow(FILE *f)
{
theOps->outbound_p_show(f);
}
void
BSP_VMEInboundPortsShow(FILE *f)
{
theOps->inbound_p_show(f);
}
void
BSP_VMEResetBus(void)
{
theOps->reset_bus();
}
static unsigned short
tsi_clear_errors(int quiet)
{
unsigned long v;
unsigned short rval;
v = vmeTsi148ClearVMEBusErrors(0);
/* return bits 8..23 of VEAT; set bit 15 to make sure rval is nonzero on error */
rval = v ? ((v>>8) & 0xffff) | (1<<15) : 0;
return rval;
}
void
__BSP_default_vme_config(void)
{
int err = 1;
if ( 0 == vmeUniverseInit() ) {
theOps = &uniOpsRec;
vmeUniverseReset();
} else if ( 0 == vmeTsi148Init() ) {
theOps = &tsiOpsRec;
vmeTsi148Reset();
_BSP_clear_vmebridge_errors = tsi_clear_errors;
} else
return; /* no VME bridge found chip */
/* map VME address ranges */
BSP_VMEOutboundPortCfg(
0,
VME_AM_EXT_SUP_DATA,
_VME_A32_WIN0_ON_VME,
_VME_A32_WIN0_ON_PCI,
0x0e000000
);
BSP_VMEOutboundPortCfg(
1,
VME_AM_STD_SUP_DATA,
0x00000000,
_VME_A24_ON_PCI,
0x00ff0000);
BSP_VMEOutboundPortCfg(
2,
VME_AM_SUP_SHORT_IO,
0x00000000,
_VME_A16_ON_PCI,
0x00010000);
#ifdef _VME_CSR_ON_PCI
/* Map VME64 CSR */
BSP_VMEOutboundPortCfg(
7,
VME_AM_CSR,
0,
_VME_CSR_ON_PCI,
0x01000000);
#endif
#ifdef _VME_DRAM_OFFSET
/* map our memory to VME */
BSP_VMEInboundPortCfg(
0,
VME_AM_EXT_SUP_DATA | VME_AM_IS_MEMORY,
_VME_DRAM_OFFSET,
PCI_DRAM_OFFSET,
BSP_mem_size);
#endif
/* stdio is not yet initialized; the driver will revert to printk */
BSP_VMEOutboundPortsShow(0);
BSP_VMEInboundPortsShow(0);
switch (BSP_getBoardType()) {
case MVME6100:
err = theOps->install_irq_mgr(
VMETSI148_IRQ_MGR_FLAG_SHARED,
0, BSP_IRQ_GPP_0 + 20,
1, BSP_IRQ_GPP_0 + 21,
2, BSP_IRQ_GPP_0 + 22,
3, BSP_IRQ_GPP_0 + 23,
-1);
break;
case MVME5500:
err = theOps->install_irq_mgr(
VMEUNIVERSE_IRQ_MGR_FLAG_SHARED |
VMEUNIVERSE_IRQ_MGR_FLAG_PW_WORKAROUND,
0, BSP_IRQ_GPP_0 + 12,
1, BSP_IRQ_GPP_0 + 13,
2, BSP_IRQ_GPP_0 + 14,
3, BSP_IRQ_GPP_0 + 15,
-1);
break;
default:
printk("WARNING: unknown board; ");
break;
}
if ( err )
printk("VME interrupt manager NOT INSTALLED (error: %i)\n", err);
}