diff --git a/c/src/lib/libbsp/powerpc/ep1a/ChangeLog b/c/src/lib/libbsp/powerpc/ep1a/ChangeLog index 42664e4a81..28ceb133e2 100644 --- a/c/src/lib/libbsp/powerpc/ep1a/ChangeLog +++ b/c/src/lib/libbsp/powerpc/ep1a/ChangeLog @@ -1,3 +1,10 @@ +2007-12-02 Till Straumann + + * irq/irq_init.c: added new args to openpic_init(). + This BSP probably needs them (8245 has an EPIC). + I would be surprised if the PCI interrupts with the + old code actually worked... + 2007-11-30 Till Straumann * startup/bspstart.c: removed bsp_exceptions_in_RAM diff --git a/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c b/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c index 95a516b724..2b4ab96dea 100644 --- a/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c +++ b/c/src/lib/libbsp/powerpc/ep1a/irq/irq_init.c @@ -272,7 +272,12 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) #ifdef TRACE_IRQ_INIT printk("Going to initialize openpic compliant device\n"); #endif - openpic_init(1, mcp750_openpic_initpolarities, mcp750_openpic_initsenses); + /* FIXME (t.s.): we should probably setup the EOI delay by + * passing a non-zero 'epic_freq' argument (frequency of the + * EPIC serial interface) but I don't know the value on this + * board (8245 SDRAM freq, IIRC)... + */ + openpic_init(1, mcp750_openpic_initpolarities, mcp750_openpic_initsenses, 0, 16, 0 /* epic_freq */); #ifdef TRACE_IRQ_INIT printk("Going to initialize the PCI/ISA bridge IRQ related setting (VIA 82C586)\n");