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powerpc: Change interrupt disable implemetation

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Instead of SPRG0 (= special purpose register 272) use the new global
symbol _PPC_INTERRUPT_DISABLE_MASK to store the interrupt disable mask.
The benefit is that it is now possible to disable interrupts without
further run-time initialization in boot_card().

At least on Freescale e500 cores this leads also to a faster execution
since the mfmsr and mfspr instruction require four cycles to complete.
The instructions to load the mask value can execute while the mfmsr is
in progress.
This commit is contained in:
Sebastian Huber
2014-02-17 09:23:59 +01:00
parent c2934b96e8
commit 801b5d8032
27 changed files with 46 additions and 90 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
c/src/lib/libbsp/powerpc/beatnik/startup/bspstart.c
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@@ -242,11 +242,7 @@ void bsp_start( void )
/*
* Initialize default raw exception handlers. See vectors/vectors_init.c
*/
ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
ppc_exc_initialize(intrStackStart, intrStackSize);
printk("CPU: %s\n", get_ppc_cpu_type_name(current_ppc_cpu));

6
c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c
View File

@@ -323,11 +323,7 @@ ShowBATS();
/*
* Initialize default raw exception hanlders.
*/
ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
ppc_exc_initialize(intrStackStart, intrStackSize);
/*
* Init MMU block address translation to enable hardware

1
c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c
View File

@@ -170,7 +170,6 @@ void bsp_start(void)
/* Initialize exception handler */
ppc_exc_cache_wb_check = 0;
ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) bsp_interrupt_stack_start,
(uintptr_t) bsp_interrupt_stack_size
);

1
c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c
View File

@@ -136,7 +136,6 @@ void bsp_start( void)
ppc_exc_cache_wb_check = 0;
#endif
ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) bsp_section_work_begin,
rtems_configuration_get_interrupt_stack_size()
);

1
c/src/lib/libbsp/powerpc/haleakala/startup/bspstart.c
View File

@@ -206,7 +206,6 @@ void bsp_start( void )
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) intrStack_start,
(uintptr_t) intrStack_size
);

1
c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c
View File

@@ -114,7 +114,6 @@ void bsp_start(void)
/* Initialize exception handler */
ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) IntrStack_start,
(uintptr_t) intrStack - (uintptr_t) IntrStack_start
);

1
c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c
View File

@@ -108,7 +108,6 @@ void bsp_start(void)
/* Initialize exceptions */
ppc_exc_initialize_with_vector_base(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) bsp_section_work_begin,
rtems_configuration_get_interrupt_stack_size(),
mpc55xx_exc_vector_base

1
c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c
View File

@@ -174,7 +174,6 @@ void bsp_start(void)
/* Initialize exception handler */
/* FIXME: Interrupt stack begin and size */
ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) IntrStack_start,
(uintptr_t) intrStack - (uintptr_t) IntrStack_start
);

6
c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c
View File

@@ -270,11 +270,7 @@ VpdBufRec vpdData [] = {
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
ppc_exc_initialize(intrStackStart, intrStackSize);
printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision);

6
c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c
View File

@@ -245,11 +245,7 @@ void bsp_start( void )
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
ppc_exc_initialize(intrStackStart, intrStackSize);
/*
* Init MMU block address translation to enable hardware

1
c/src/lib/libbsp/powerpc/psim/startup/bspstart.c
View File

@@ -99,7 +99,6 @@ void bsp_start( void )
* Initialize default raw exception handlers.
*/
ppc_exc_initialize_with_vector_base(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) bsp_section_work_begin,
rtems_configuration_get_interrupt_stack_size(),
(void *) 0xfff00000

6
c/src/lib/libbsp/powerpc/qemuppc/startup/bspstart.c
View File

@@ -94,11 +94,7 @@ void bsp_start( void )
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
ppc_exc_initialize(intrStackStart, intrStackSize);
/* Install default handler for the decrementer exception */
sc = ppc_exc_set_handler( ASM_DEC_VECTOR, default_decrementer_exception_handler);

1
c/src/lib/libbsp/powerpc/qoriq/startup/bspstart.c
View File

@@ -110,7 +110,6 @@ void bsp_start(void)
/* Initialize exception handler */
ppc_exc_initialize_with_vector_base(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) bsp_section_work_begin,
rtems_configuration_get_interrupt_stack_size(),
bsp_exc_vector_base

1
c/src/lib/libbsp/powerpc/qoriq/startup/smp.c
View File

@@ -116,7 +116,6 @@ void qoriq_secondary_cpu_initialize(void)
/* Initialize exception handler */
ppc_exc_initialize_with_vector_base(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) second_cpu->interrupt_stack_low,
rtems_configuration_get_interrupt_stack_size(),
bsp_exc_vector_base

6
c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
View File

@@ -194,11 +194,7 @@ void bsp_start( void )
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
ppc_exc_initialize(intrStackStart, intrStackSize);
msr_value = 0x2030;
_CPU_MSR_SET( msr_value );

6
c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
View File

@@ -232,11 +232,7 @@ void bsp_start( void )
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
ppc_exc_initialize(intrStackStart, intrStackSize);
boardManufacturer = checkPrepBoardType(&residualCopy);
if (boardManufacturer != PREP_Motorola) {

1
c/src/lib/libbsp/powerpc/t32mppc/startup/bspstart.c
View File

@@ -68,7 +68,6 @@ void bsp_start(void)
/* Initialize exception handler */
ppc_exc_initialize_with_vector_base(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) bsp_section_work_begin,
rtems_configuration_get_interrupt_stack_size(),
bsp_exc_vector_base

6
c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c
View File

@@ -183,11 +183,7 @@ void bsp_start( void)
rtems_counter_initialize_converter(bsp_time_base_frequency);
/* Initialize exception handler */
ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
interrupt_stack_start,
interrupt_stack_size
);
ppc_exc_initialize(interrupt_stack_start, interrupt_stack_size);
/* Initalize interrupt support */
bsp_interrupt_initialize();

1
c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c
View File

@@ -95,7 +95,6 @@ void bsp_start( void )
* Initialize default raw exception handlers.
*/
ppc_exc_initialize_with_vector_base(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) bsp_section_work_begin,
rtems_configuration_get_interrupt_stack_size(),
virtex_exc_vector_base

4
c/src/lib/libbsp/powerpc/virtex4/startup/bspstart.c
View File

@@ -208,9 +208,7 @@ void bsp_start(void)
intrStackStart = CPU_UP_ALIGN((uint32_t)__bsp_ram_start);
intrStackSize = rtems_configuration_get_interrupt_stack_size();
ppc_exc_initialize(PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize);
ppc_exc_initialize(intrStackStart, intrStackSize);
/* Let the user know what parameters we were compiled with */
printk(" Base/Start End Size\n"

4
c/src/lib/libbsp/powerpc/virtex5/startup/bspstart.c
View File

@@ -228,9 +228,7 @@ void bsp_start(void)
intrStackStart = CPU_UP_ALIGN((uint32_t)__bsp_ram_start);
intrStackSize = rtems_configuration_get_interrupt_stack_size();
ppc_exc_initialize(PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize);
ppc_exc_initialize(intrStackStart, intrStackSize);
/* Let the user know what parameters we were compiled with */
printk(" Base/Start End Size\n"

8
c/src/lib/libbsp/shared/bootcard.c
View File

@@ -68,14 +68,6 @@ void boot_card(
{
rtems_interrupt_level bsp_isr_level;
/*
* Special case for PowerPC: The interrupt disable mask is stored in SPRG0.
* It must be valid before we can use rtems_interrupt_disable().
*/
#ifdef PPC_INTERRUPT_DISABLE_MASK_DEFAULT
ppc_interrupt_set_disable_mask( PPC_INTERRUPT_DISABLE_MASK_DEFAULT );
#endif /* PPC_INTERRUPT_DISABLE_MASK_DEFAULT */
/*
* Make sure interrupts are disabled.
*/

3
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c
View File

@@ -149,7 +149,6 @@ static void ppc_exc_fatal_error(void)
}
void ppc_exc_initialize_with_vector_base(
uint32_t interrupt_disable_mask,
uintptr_t interrupt_stack_begin,
uintptr_t interrupt_stack_size,
void *vector_base
@@ -191,8 +190,6 @@ void ppc_exc_initialize_with_vector_base(
PPC_SET_SPECIAL_PURPOSE_REGISTER(SPRG1, interrupt_stack_pointer);
PPC_SET_SPECIAL_PURPOSE_REGISTER(SPRG2, interrupt_stack_begin);
ppc_interrupt_set_disable_mask(interrupt_disable_mask);
#ifndef PPC_EXC_CONFIG_BOOKE_ONLY
/* Use current MMU / RI settings when running C exception handlers */

3
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h
View File

@@ -361,7 +361,6 @@ rtems_status_code ppc_exc_make_prologue(
* @see ppc_exc_initialize().
*/
void ppc_exc_initialize_with_vector_base(
uint32_t interrupt_disable_mask,
uintptr_t interrupt_stack_begin,
uintptr_t interrupt_stack_size,
void *vector_base
@@ -381,13 +380,11 @@ void ppc_exc_initialize_with_vector_base(
* - the minimal prologue creation failed.
*/
static inline void ppc_exc_initialize(
uint32_t interrupt_disable_mask,
uintptr_t interrupt_stack_begin,
uintptr_t interrupt_stack_size
)
{
ppc_exc_initialize_with_vector_base(
interrupt_disable_mask,
interrupt_stack_begin,
interrupt_stack_size,
NULL

1
cpukit/score/cpu/powerpc/Makefile.am
View File

@@ -16,6 +16,7 @@ noinst_LIBRARIES = libscorecpu.a
libscorecpu_a_SOURCES = cpu.c
libscorecpu_a_SOURCES += ppc-context-volatile-clobber.S
libscorecpu_a_SOURCES += ppc-context-validate.S
libscorecpu_a_SOURCES += ppc-isr-disable-mask.S
libscorecpu_a_SOURCES += ppc-isr-vector-install.c
libscorecpu_a_CPPFLAGS = $(AM_CPPFLAGS)

24
cpukit/score/cpu/powerpc/ppc-isr-disable-mask.S Normal file
View File

@@ -0,0 +1,24 @@
/*
* Copyright (c) 2014 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <rtems/asm.h>
#include <rtems/score/cpu.h>
.global _PPC_INTERRUPT_DISABLE_MASK
.weak _PPC_INTERRUPT_DISABLE_MASK
.set _PPC_INTERRUPT_DISABLE_MASK, PPC_INTERRUPT_DISABLE_MASK_DEFAULT

30
cpukit/score/cpu/powerpc/rtems/powerpc/registers.h
View File

@@ -581,8 +581,8 @@ lidate */
/**
* @brief Default value for the interrupt disable mask.
*
* The interrupt disable mask is stored in the SPRG0 (= special purpose
* register 272).
* The interrupt disable mask is stored in the global symbol
* _PPC_INTERRUPT_DISABLE_MASK.
*/
#define PPC_INTERRUPT_DISABLE_MASK_DEFAULT MSR_EE
@@ -603,25 +603,16 @@ extern "C" {
#define _CPU_MSR_SET( _msr_value ) \
{ __asm__ volatile ("mtmsr %0" : "=&r" ((_msr_value)) : "0" ((_msr_value))); }
static inline void ppc_interrupt_set_disable_mask( uint32_t mask )
{
__asm__ volatile (
"mtspr 272, %0"
:
: "r" (mask)
);
}
/**
* @brief A global symbol used to disable interrupts in the MSR.
*
* A one bit means that this bit should be cleared.
*/
extern char _PPC_INTERRUPT_DISABLE_MASK[];
static inline uint32_t ppc_interrupt_get_disable_mask( void )
{
uint32_t mask;
__asm__ volatile (
"mfspr %0, 272"
: "=r" (mask)
);
return mask;
return (uint32_t) _PPC_INTERRUPT_DISABLE_MASK;
}
static inline uint32_t ppc_interrupt_disable( void )
@@ -631,7 +622,8 @@ static inline uint32_t ppc_interrupt_disable( void )
__asm__ volatile (
"mfmsr %0;"
"mfspr %1, 272;"
"lis %1, _PPC_INTERRUPT_DISABLE_MASK@h;"
"ori %1, %1, _PPC_INTERRUPT_DISABLE_MASK@l;"
"andc %1, %0, %1;"
"mtmsr %1"
: "=r" (level), "=r" (mask)