powerpc: Change interrupt disable implemetation

Instead of SPRG0 (= special purpose register 272) use the new global
symbol _PPC_INTERRUPT_DISABLE_MASK to store the interrupt disable mask.
The benefit is that it is now possible to disable interrupts without
further run-time initialization in boot_card().

At least on Freescale e500 cores this leads also to a faster execution
since the mfmsr and mfspr instruction require four cycles to complete.
The instructions to load the mask value can execute while the mfmsr is
in progress.

c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c

@@ -149,7 +149,6 @@ static void ppc_exc_fatal_error(void)
 }
 
 void ppc_exc_initialize_with_vector_base(
-  uint32_t interrupt_disable_mask,
   uintptr_t interrupt_stack_begin,
   uintptr_t interrupt_stack_size,
   void *vector_base
@@ -191,8 +190,6 @@ void ppc_exc_initialize_with_vector_base(
   PPC_SET_SPECIAL_PURPOSE_REGISTER(SPRG1, interrupt_stack_pointer);
   PPC_SET_SPECIAL_PURPOSE_REGISTER(SPRG2, interrupt_stack_begin);
 
-  ppc_interrupt_set_disable_mask(interrupt_disable_mask);
-
 #ifndef PPC_EXC_CONFIG_BOOKE_ONLY
 
   /* Use current MMU / RI settings when running C exception handlers */

c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h

@@ -361,7 +361,6 @@ rtems_status_code ppc_exc_make_prologue(
  * @see ppc_exc_initialize().
  */
 void ppc_exc_initialize_with_vector_base(
-  uint32_t interrupt_disable_mask,
   uintptr_t interrupt_stack_begin,
   uintptr_t interrupt_stack_size,
   void *vector_base
@@ -381,13 +380,11 @@ void ppc_exc_initialize_with_vector_base(
  * - the minimal prologue creation failed.
  */
 static inline void ppc_exc_initialize(
-  uint32_t interrupt_disable_mask,
   uintptr_t interrupt_stack_begin,
   uintptr_t interrupt_stack_size
 )
 {
   ppc_exc_initialize_with_vector_base(
-    interrupt_disable_mask,
     interrupt_stack_begin,
     interrupt_stack_size,
     NULL