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bsps/powerpc/*/include/tm27.h: Use formatter suggestions

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Applied suggested formatting changes to the following files which
were modified for technical reasons in the previous commit.

    bsps/powerpc/gen5200/include/tm27.h
    bsps/powerpc/mvme5500/include/tm27.h
    bsps/powerpc/psim/include/tm27.h
This commit is contained in:
Joel Sherrill
2025-06-11 14:19:06 -05:00
parent 0f99dd5d25
commit 7eb39e3e8d
3 changed files with 126 additions and 92 deletions
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26
bsps/powerpc/gen5200/include/tm27.h
View File

@@ -36,18 +36,22 @@ static void stub_rtems_irq_disable(const struct __rtems_irq_connect_data__*i)
(void) i; (void) i;
} }
static int stub_rtems_irq_is_enabled(const struct __rtems_irq_connect_data__*i) static int stub_rtems_irq_is_enabled(
const struct __rtems_irq_connect_data__ *i
)
{ {
(void) i; (void) i;
return 0; return 0;
} }
static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER, static rtems_irq_connect_data clockIrqData = {
BSP_DECREMENTER,
0, 0,
0, 0,
stub_rtems_irq_enable, stub_rtems_irq_enable,
stub_rtems_irq_disable, stub_rtems_irq_disable,
stub_rtems_irq_is_enabled}; stub_rtems_irq_is_enabled
};
static inline void Install_tm27_vector( rtems_interrupt_handler handler ) static inline void Install_tm27_vector( rtems_interrupt_handler handler )
{ {
@@ -61,22 +65,30 @@ static inline void Install_tm27_vector( rtems_interrupt_handler handler )
#define Cause_tm27_intr() \ #define Cause_tm27_intr() \
do { \ do { \
uint32_t _clicks = 8; \ uint32_t _clicks = 8; \
__asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ __asm__ volatile( "mtdec %0" \
: "=r"(( _clicks )) \
: "r"(( _clicks )) ); \
} while ( 0 ) } while ( 0 )
#define Clear_tm27_intr() \ #define Clear_tm27_intr() \
do { \ do { \
uint32_t _clicks = 0xffffffff; \ uint32_t _clicks = 0xffffffff; \
__asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ __asm__ volatile( "mtdec %0" \
: "=r"(( _clicks )) \
: "r"(( _clicks )) ); \
} while ( 0 ) } while ( 0 )
#define Lower_tm27_intr() \ #define Lower_tm27_intr() \
do { \ do { \
uint32_t _msr = 0; \ uint32_t _msr = 0; \
_ISR_Set_level( 0 ); \ _ISR_Set_level( 0 ); \
__asm__ volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ __asm__ volatile( "mfmsr %0 ;" \
: "=r"( _msr ) \
: "r"( _msr ) ); \
_msr |= 0x8002; \ _msr |= 0x8002; \
__asm__ volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ __asm__ volatile( "mtmsr %0 ;" \
: "=r"( _msr ) \
: "r"( _msr ) ); \
} while ( 0 ) } while ( 0 )
#endif #endif

27
bsps/powerpc/mvme5500/include/tm27.h
View File

@@ -35,18 +35,22 @@ static void stub_rtems_irq_disable(const struct __rtems_irq_connect_data__*i)
(void) i; (void) i;
} }
static int stub_rtems_irq_is_enabled(const struct __rtems_irq_connect_data__*i) static int stub_rtems_irq_is_enabled(
const struct __rtems_irq_connect_data__ *i
)
{ {
(void) i; (void) i;
return 0; return 0;
} }
static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER, static rtems_irq_connect_data clockIrqData = {
BSP_DECREMENTER,
0, 0,
0, 0,
stub_rtems_irq_enable, stub_rtems_irq_enable,
stub_rtems_irq_disable, stub_rtems_irq_disable,
stub_rtems_irq_is_enabled}; stub_rtems_irq_is_enabled
};
static inline void Install_tm27_vector( rtems_interrupt_handler handler ) static inline void Install_tm27_vector( rtems_interrupt_handler handler )
{ {
@@ -60,23 +64,30 @@ static inline void Install_tm27_vector( rtems_interrupt_handler handler )
#define Cause_tm27_intr() \ #define Cause_tm27_intr() \
do { \ do { \
uint32_t _clicks = 1; \ uint32_t _clicks = 1; \
__asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ __asm__ volatile( "mtdec %0" \
: "=r"(( _clicks )) \
: "r"(( _clicks )) ); \
} while ( 0 ) } while ( 0 )
#define Clear_tm27_intr() \ #define Clear_tm27_intr() \
do { \ do { \
uint32_t _clicks = 0xffffffff; \ uint32_t _clicks = 0xffffffff; \
__asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ __asm__ volatile( "mtdec %0" \
: "=r"(( _clicks )) \
: "r"(( _clicks )) ); \
} while ( 0 ) } while ( 0 )
#define Lower_tm27_intr() \ #define Lower_tm27_intr() \
do { \ do { \
uint32_t _msr = 0; \ uint32_t _msr = 0; \
_ISR_Set_level( 0 ); \ _ISR_Set_level( 0 ); \
__asm__ volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ __asm__ volatile( "mfmsr %0 ;" \
: "=r"( _msr ) \
: "r"( _msr ) ); \
_msr |= 0x8002; \ _msr |= 0x8002; \
__asm__ volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ __asm__ volatile( "mtmsr %0 ;" \
: "=r"( _msr ) \
: "r"( _msr ) ); \
} while ( 0 ) } while ( 0 )
#endif #endif

27
bsps/powerpc/psim/include/tm27.h
View File

@@ -35,18 +35,22 @@ static void stub_rtems_irq_disable(const struct __rtems_irq_connect_data__*i)
(void) i; (void) i;
} }
static int stub_rtems_irq_is_enabled(const struct __rtems_irq_connect_data__*i) static int stub_rtems_irq_is_enabled(
const struct __rtems_irq_connect_data__ *i
)
{ {
(void) i; (void) i;
return 0; return 0;
} }
static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER, static rtems_irq_connect_data clockIrqData = {
BSP_DECREMENTER,
0, 0,
0, 0,
stub_rtems_irq_enable, stub_rtems_irq_enable,
stub_rtems_irq_disable, stub_rtems_irq_disable,
stub_rtems_irq_is_enabled}; stub_rtems_irq_is_enabled
};
static inline void Install_tm27_vector( rtems_interrupt_handler handler ) static inline void Install_tm27_vector( rtems_interrupt_handler handler )
{ {
@@ -60,23 +64,30 @@ static inline void Install_tm27_vector( rtems_interrupt_handler handler )
#define Cause_tm27_intr() \ #define Cause_tm27_intr() \
do { \ do { \
uint32_t _clicks = 1; \ uint32_t _clicks = 1; \
__asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ __asm__ volatile( "mtdec %0" \
: "=r"(( _clicks )) \
: "r"(( _clicks )) ); \
} while ( 0 ) } while ( 0 )
#define Clear_tm27_intr() \ #define Clear_tm27_intr() \
do { \ do { \
uint32_t _clicks = 0xffffffff; \ uint32_t _clicks = 0xffffffff; \
__asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \ __asm__ volatile( "mtdec %0" \
: "=r"(( _clicks )) \
: "r"(( _clicks )) ); \
} while ( 0 ) } while ( 0 )
#define Lower_tm27_intr() \ #define Lower_tm27_intr() \
do { \ do { \
uint32_t _msr = 0; \ uint32_t _msr = 0; \
_ISR_Set_level( 0 ); \ _ISR_Set_level( 0 ); \
__asm__ volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ __asm__ volatile( "mfmsr %0 ;" \
: "=r"( _msr ) \
: "r"( _msr ) ); \
_msr |= 0x8002; \ _msr |= 0x8002; \
__asm__ volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \ __asm__ volatile( "mtmsr %0 ;" \
: "=r"( _msr ) \
: "r"( _msr ) ); \
} while ( 0 ) } while ( 0 )
#endif #endif