forked from Imagelibrary/rtems
2007-04-25 Ray Xu <xr@trasin.net>
* Makefile.am, configure.ac: Add lpc22xx support. * lpc22xx/clock/clockdrv.c, lpc22xx/include/lpc22xx.h, lpc22xx/irq/bsp_irq_asm.S, lpc22xx/timer/lpc_timer.h, lpc22xx/timer/timer.c: New (Initial submission).
This commit is contained in:
Ralf Corsepius
@@ -1,3 +1,10 @@
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2007-04-25 Ray Xu <xr@trasin.net>
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* Makefile.am, configure.ac: Add lpc22xx support.
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* lpc22xx/clock/clockdrv.c, lpc22xx/include/lpc22xx.h,
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lpc22xx/irq/bsp_irq_asm.S, lpc22xx/timer/lpc_timer.h,
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lpc22xx/timer/timer.c: New (Initial submission).
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2007-03-12 Joel Sherrill <joel@OARcorp.com>
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* at91rm9200/clock/clock.c, at91rm9200/dbgu/dbgu.c,
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@@ -115,5 +115,31 @@ s3c2400_irq_rel_CPPFLAGS = $(AM_CPPFLAGS)
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s3c2400_irq_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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endif
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if lpc22xx
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include_HEADERS = lpc22xx/include/lpc22xx.h
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## lpc22xx/clock
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noinst_PROGRAMS += lpc22xx/clock.rel
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lpc22xx_clock_rel_SOURCES = lpc22xx/clock/clockdrv.c
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lpc22xx_clock_rel_CPPFLAGS = $(AM_CPPFLAGS)
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lpc22xx_clock_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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## lpc22xx/timer
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noinst_PROGRAMS += lpc22xx/timer.rel
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lpc22xx_timer_rel_SOURCES = lpc22xx/timer/timer.c
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lpc22xx_timer_rel_CPPFLAGS = $(AM_CPPFLAGS)
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lpc22xx_timer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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## lpc22xx/interrupt
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include_HEADERS += lpc22xx/irq/irq.h
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noinst_PROGRAMS += lpc22xx/irq.rel
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lpc22xx_irq_rel_SOURCES = lpc22xx/irq/irq.c lpc22xx/irq/bsp_irq_init.c \
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../../libbsp/arm/shared/irq/irq_init.c lpc22xx/irq/bsp_irq_asm.S \
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../../libbsp/arm/shared/irq/irq_asm.S lpc22xx/irq/irq.h
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lpc22xx_irq_rel_CPPFLAGS = $(AM_CPPFLAGS)
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lpc22xx_irq_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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endif
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include $(srcdir)/preinstall.am
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include $(top_srcdir)/../../../automake/local.am
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@@ -27,6 +27,7 @@ AM_CONDITIONAL(shared, test "$RTEMS_CPU_MODEL" = "at91rm9200" || \
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AM_CONDITIONAL(at91rm9200, test "$RTEMS_CPU_MODEL" = "at91rm9200")
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AM_CONDITIONAL(mc9328mxl, test "$RTEMS_CPU_MODEL" = "mc9328mxl")
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AM_CONDITIONAL(s3c2400, test "$RTEMS_CPU_MODEL" = "s3c2400")
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AM_CONDITIONAL(lpc22xx, test "$RTEMS_CPU_MODEL" = "lpc22xx")
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RTEMS_AMPOLISH3
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143
c/src/lib/libcpu/arm/lpc22xx/clock/clockdrv.c
Normal file
143
c/src/lib/libcpu/arm/lpc22xx/clock/clockdrv.c
Normal file
@@ -0,0 +1,143 @@
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/*
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* LPC22XX clock specific using the System Timer
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* set the Time0
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* This is hardware specific part of the clock driver. At the end of this
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* file, the generic part of the driver is #included.
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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*
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* http://www.OARcorp.com/rtems/license.html.
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*
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*
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* clockdrv.c,v 1.1 2002/11/13 17:55:04 joel Exp
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*/
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#include <rtems.h>
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#include <bsp.h>
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#include <irq.h>
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#include <lpc22xx.h>
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#include <rtems/bspIo.h> /* for printk */
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/* this is defined in ../../../shared/clockdrv_shell.c */
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rtems_isr Clock_isr(rtems_vector_number vector);
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static void clock_isr_on(const rtems_irq_connect_data *unused);
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static void clock_isr_off(const rtems_irq_connect_data *unused);
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static int clock_isr_is_on(const rtems_irq_connect_data *irq);
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/* Replace the first value with the clock's interrupt name. */
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rtems_irq_connect_data clock_isr_data = {LPC22xx_INTERRUPT_TIMER0,
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(rtems_irq_hdl)Clock_isr,
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clock_isr_on,
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clock_isr_off,
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clock_isr_is_on,
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3, /* unused for ARM cpus */
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0 }; /* unused for ARM cpus */
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/* If you follow the code, this is never used, so any value
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* should work
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*/
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#define CLOCK_VECTOR 0
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/*use the /shared/clockdrv_shell.c code template */
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/**
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* When we get the clock interrupt
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* - clear the interrupt bit?
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* - restart the timer?
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*/
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#define Clock_driver_support_at_tick() \
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do { \
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if (!(T0IR & 0x01)) return; \
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T0IR = 0x01; \
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VICVectAddr = 0x00;\
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} while(0)
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/**
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* Installs the clock ISR. You shouldn't need to change this.
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*/
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#define Clock_driver_support_install_isr( _new, _old ) \
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do { \
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(_old) = NULL; \
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BSP_install_rtems_irq_handler(&clock_isr_data); \
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} while(0)
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/**
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* Initialize the hardware for the clock
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* - Set the frequency
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* - enable it
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* - clear any pending interrupts
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*
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* Since you may want the clock always running, you can
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* enable interrupts here. If you do so, the clock_isr_on(),
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* clock_isr_off(), and clock_isr_is_on() functions can be
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* NOPs.
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*/
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/* set timer to generate interrupt every BSP_Configuration.microseconds_per_tick */
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/* MR0/(LPC22xx_Fpclk/(PR0+1)) = 10/1000 = 0.01s */
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#define Clock_driver_support_initialize_hardware() \
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do { \
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T0TCR &= 0; /* disable and clear timer 0, set to */ \
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T0PC = 0; /* TC is incrementet on every pclk.*/ \
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T0MR0 = ((LPC22xx_Fpclk/1000* BSP_Configuration.microseconds_per_tick) / 1000); /* initialize the timer period and prescaler */ \
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/*T0PR = (((LPC22xx_Fpclk / 1000) * BSP_Configuration.microseconds_per_tick) / 1000-1); \ */ \
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T0MCR |= 0x03; /* generate interrupt when T0MR0 match T0TC and Reset Timer Count*/ \
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T0EMR = 0; /*No external match*/ \
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T0TCR = 1; /*enable timer0*/ \
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} while (0)
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/**
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* Do whatever you need to shut the clock down and remove the
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* interrupt handler. Since this normally only gets called on
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* RTEMS shutdown, you may not need to do anything other than
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* remove the ISR.
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*/
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#define Clock_driver_support_shutdown_hardware() \
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do { \
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/* Disable timer */ \
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T0TCR&=~0x02; \
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BSP_remove_rtems_irq_handler(&clock_isr_data); \
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} while (0)
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/**
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* Enables clock interrupt.
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*
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* If the interrupt is always on, this can be a NOP.
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*/
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static void clock_isr_on(const rtems_irq_connect_data *unused)
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{
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T0IR&=0x01;
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//return;
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}
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/**
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* Disables clock interrupts
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*
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* If the interrupt is always on, this can be a NOP.
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*/
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static void clock_isr_off(const rtems_irq_connect_data *unused)
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{
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T0IR=0x00;
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//return;
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}
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/**
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* Tests to see if clock interrupt is enabled, and returns 1 if so.
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* If interrupt is not enabled, returns 0.
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*
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* If the interrupt is always on, this always returns 1.
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*/
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static int clock_isr_is_on(const rtems_irq_connect_data *irq)
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{
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return T0IR & 0x01; /*MR0 mask*/
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}
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/* Make sure to include this, and only at the end of the file */
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#include "../../../../libbsp/shared/clockdrv_shell.c"
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479
c/src/lib/libcpu/arm/lpc22xx/include/lpc22xx.h
Normal file
479
c/src/lib/libcpu/arm/lpc22xx/include/lpc22xx.h
Normal file
@@ -0,0 +1,479 @@
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/*
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* Motorola LPC22XX Register definitions
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*
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* Copyright (c) 2003 by Cogent Computer Systems
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* Written by Jay Monkman <jtm@lopingdog.com>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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*
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* http://www.OARcorp.com/rtems/license.html.
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*
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* $Id$
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*/
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#ifndef __LPC22XX_H__
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#define __LPC22XX_H__
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#include <rtems/stdint.h>
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/* EXTERNAL MEMORY CONTROLLER (EMC) */
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#define BCFG0 (*((volatile unsigned int *) 0xFFE00000)) /* lpc22xx only */
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#define BCFG1 (*((volatile unsigned int *) 0xFFE00004)) /* lpc22xx only */
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#define BCFG2 (*((volatile unsigned int *) 0xFFE00008)) /* lpc22xx only */
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#define BCFG3 (*((volatile unsigned int *) 0xFFE0000C)) /* lpc22xx only */
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/* External Interrupts */
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#define EXTINT (*((volatile unsigned char *) 0xE01FC140))
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#define EXTWAKE (*((volatile unsigned char *) 0xE01FC144))
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#ifdef CONFIG_ARCH_LPC22xx
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#define EXTMODE (*((volatile unsigned char *) 0xE01FC148)) /* no in lpc210x*/
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#define EXTPOLAR (*((volatile unsigned char *) 0xE01FC14C)) /* no in lpc210x*/
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#endif
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/* SMemory mapping control. */
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#define MEMMAP (*((volatile unsigned char *) 0xE01FC040))
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/* Phase Locked Loop (PLL) */
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#define PLLCON (*((volatile unsigned char *) 0xE01FC080))
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#define PLLCFG (*((volatile unsigned char *) 0xE01FC084))
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#define PLLSTAT (*((volatile unsigned short*) 0xE01FC088))
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#define PLLFEED (*((volatile unsigned char *) 0xE01FC08C))
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/* Power Control */
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#define PCON (*((volatile unsigned char *) 0xE01FC0C0))
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#define PCONP (*((volatile unsigned long *) 0xE01FC0C4))
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/* VPB Divider */
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#define VPBDIV (*((volatile unsigned char *) 0xE01FC100))
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/* Memory Accelerator Module (MAM) */
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#define MAMCR (*((volatile unsigned char *) 0xE01FC000))
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#define MAMTIM (*((volatile unsigned char *) 0xE01FC004))
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/* Vectored Interrupt Controller (VIC) */
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#define VICIRQStatus (*((volatile unsigned long *) 0xFFFFF000))
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#define VICFIQStatus (*((volatile unsigned long *) 0xFFFFF004))
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#define VICRawIntr (*((volatile unsigned long *) 0xFFFFF008))
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#define VICIntSelect (*((volatile unsigned long *) 0xFFFFF00C))
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#define VICIntEnable (*((volatile unsigned long *) 0xFFFFF010))
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#define VICIntEnClr (*((volatile unsigned long *) 0xFFFFF014))
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#define VICSoftInt (*((volatile unsigned long *) 0xFFFFF018))
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#define VICSoftIntClear (*((volatile unsigned long *) 0xFFFFF01C))
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#define VICProtection (*((volatile unsigned long *) 0xFFFFF020))
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#define VICVectAddr (*((volatile unsigned long *) 0xFFFFF030))
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#define VICDefVectAddr (*((volatile unsigned long *) 0xFFFFF034))
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#define VICVectAddrBase 0xFFFFF100
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#define VICVectAddr0 (*((volatile unsigned long *) 0xFFFFF100))
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#define VICVectAddr1 (*((volatile unsigned long *) 0xFFFFF104))
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#define VICVectAddr2 (*((volatile unsigned long *) 0xFFFFF108))
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#define VICVectAddr3 (*((volatile unsigned long *) 0xFFFFF10C))
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#define VICVectAddr4 (*((volatile unsigned long *) 0xFFFFF110))
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#define VICVectAddr5 (*((volatile unsigned long *) 0xFFFFF114))
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#define VICVectAddr6 (*((volatile unsigned long *) 0xFFFFF118))
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#define VICVectAddr7 (*((volatile unsigned long *) 0xFFFFF11C))
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#define VICVectAddr8 (*((volatile unsigned long *) 0xFFFFF120))
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#define VICVectAddr9 (*((volatile unsigned long *) 0xFFFFF124))
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#define VICVectAddr10 (*((volatile unsigned long *) 0xFFFFF128))
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#define VICVectAddr11 (*((volatile unsigned long *) 0xFFFFF12C))
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#define VICVectAddr12 (*((volatile unsigned long *) 0xFFFFF130))
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#define VICVectAddr13 (*((volatile unsigned long *) 0xFFFFF134))
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#define VICVectAddr14 (*((volatile unsigned long *) 0xFFFFF138))
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#define VICVectAddr15 (*((volatile unsigned long *) 0xFFFFF13C))
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#define VICVectCntlBase 0xFFFFF200
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#define VICVectCntl0 (*((volatile unsigned long *) 0xFFFFF200))
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#define VICVectCntl1 (*((volatile unsigned long *) 0xFFFFF204))
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#define VICVectCntl2 (*((volatile unsigned long *) 0xFFFFF208))
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#define VICVectCntl3 (*((volatile unsigned long *) 0xFFFFF20C))
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#define VICVectCntl4 (*((volatile unsigned long *) 0xFFFFF210))
|
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#define VICVectCntl5 (*((volatile unsigned long *) 0xFFFFF214))
|
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#define VICVectCntl6 (*((volatile unsigned long *) 0xFFFFF218))
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#define VICVectCntl7 (*((volatile unsigned long *) 0xFFFFF21C))
|
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#define VICVectCntl8 (*((volatile unsigned long *) 0xFFFFF220))
|
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#define VICVectCntl9 (*((volatile unsigned long *) 0xFFFFF224))
|
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#define VICVectCntl10 (*((volatile unsigned long *) 0xFFFFF228))
|
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#define VICVectCntl11 (*((volatile unsigned long *) 0xFFFFF22C))
|
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#define VICVectCntl12 (*((volatile unsigned long *) 0xFFFFF230))
|
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#define VICVectCntl13 (*((volatile unsigned long *) 0xFFFFF234))
|
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#define VICVectCntl14 (*((volatile unsigned long *) 0xFFFFF238))
|
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#define VICVectCntl15 (*((volatile unsigned long *) 0xFFFFF23C))
|
||||
|
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/* Pin Connect Block */
|
||||
#define PINSEL0 (*((volatile unsigned long *) 0xE002C000))
|
||||
#define PINSEL1 (*((volatile unsigned long *) 0xE002C004))
|
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|
||||
#define PINSEL2 (*((volatile unsigned long *) 0xE002C014)) /* no in lpc210x*/
|
||||
|
||||
|
||||
/* General Purpose Input/Output (GPIO) */
|
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#ifndef CONFIG_ARCH_LPC22xx
|
||||
|
||||
#define IOPIN (*((volatile unsigned long *) 0xE0028000)) /* lpc210x only */
|
||||
#define IOSET (*((volatile unsigned long *) 0xE0028004)) /* lpc210x only */
|
||||
#define IODIR (*((volatile unsigned long *) 0xE0028008)) /* lpc210x only */
|
||||
#define IOCLR (*((volatile unsigned long *) 0xE002800C)) /* lpc210x only */
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_LPC22xx
|
||||
#define IO0PIN (*((volatile unsigned long *) 0xE0028000)) /* no in lpc210x*/
|
||||
#define IO0SET (*((volatile unsigned long *) 0xE0028004)) /* no in lpc210x*/
|
||||
#define IO0DIR (*((volatile unsigned long *) 0xE0028008)) /* no in lpc210x*/
|
||||
#define IO0CLR (*((volatile unsigned long *) 0xE002800C)) /* no in lpc210x*/
|
||||
|
||||
#define IO1PIN (*((volatile unsigned long *) 0xE0028010)) /* no in lpc210x*/
|
||||
#define IO1SET (*((volatile unsigned long *) 0xE0028014)) /* no in lpc210x*/
|
||||
#define IO1DIR (*((volatile unsigned long *) 0xE0028018)) /* no in lpc210x*/
|
||||
#define IO1CLR (*((volatile unsigned long *) 0xE002801C)) /* no in lpc210x*/
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_LPC22xx
|
||||
|
||||
#define IO2PIN (*((volatile unsigned long *) 0xE0028020)) /* lpc22xx only */
|
||||
#define IO2SET (*((volatile unsigned long *) 0xE0028024)) /* lpc22xx only */
|
||||
#define IO2DIR (*((volatile unsigned long *) 0xE0028028)) /* lpc22xx only */
|
||||
#define IO2CLR (*((volatile unsigned long *) 0xE002802C)) /* lpc22xx only */
|
||||
|
||||
#define IO3PIN (*((volatile unsigned long *) 0xE0028030)) /* lpc22xx only */
|
||||
#define IO3SET (*((volatile unsigned long *) 0xE0028034)) /* lpc22xx only */
|
||||
#define IO3DIR (*((volatile unsigned long *) 0xE0028038)) /* lpc22xx only */
|
||||
#define IO3CLR (*((volatile unsigned long *) 0xE002803C)) /* lpc22xx only */
|
||||
|
||||
#endif
|
||||
|
||||
/* Universal Asynchronous Receiver Transmitter 0 (UART0) */
|
||||
#define U0RBR (*((volatile unsigned char *) 0xE000C000))
|
||||
#define U0THR (*((volatile unsigned char *) 0xE000C000))
|
||||
#define U0IER (*((volatile unsigned char *) 0xE000C004))
|
||||
#define U0IIR (*((volatile unsigned char *) 0xE000C008))
|
||||
#define U0FCR (*((volatile unsigned char *) 0xE000C008))
|
||||
#define U0LCR (*((volatile unsigned char *) 0xE000C00C))
|
||||
#define U0LSR (*((volatile unsigned char *) 0xE000C014))
|
||||
#define U0SCR (*((volatile unsigned char *) 0xE000C01C))
|
||||
#define U0DLL (*((volatile unsigned char *) 0xE000C000))
|
||||
#define U0DLM (*((volatile unsigned char *) 0xE000C004))
|
||||
|
||||
/* Universal Asynchronous Receiver Transmitter 1 (UART1) */
|
||||
#define U1RBR (*((volatile unsigned char *) 0xE0010000))
|
||||
#define U1THR (*((volatile unsigned char *) 0xE0010000))
|
||||
#define U1IER (*((volatile unsigned char *) 0xE0010004))
|
||||
#define U1IIR (*((volatile unsigned char *) 0xE0010008))
|
||||
#define U1FCR (*((volatile unsigned char *) 0xE0010008))
|
||||
#define U1LCR (*((volatile unsigned char *) 0xE001000C))
|
||||
#define U1MCR (*((volatile unsigned char *) 0xE0010010))
|
||||
#define U1LSR (*((volatile unsigned char *) 0xE0010014))
|
||||
#define U1MSR (*((volatile unsigned char *) 0xE0010018))
|
||||
#define U1SCR (*((volatile unsigned char *) 0xE001001C))
|
||||
#define U1DLL (*((volatile unsigned char *) 0xE0010000))
|
||||
#define U1DLM (*((volatile unsigned char *) 0xE0010004))
|
||||
|
||||
/* I2C (8/16 bit data bus) */
|
||||
#define I2CONSET (*((volatile unsigned char *) 0xE001C000))
|
||||
#define I2STAT (*((volatile unsigned char *) 0xE001C004))
|
||||
#define I2DAT (*((volatile unsigned char *) 0xE001C008))
|
||||
#define I2ADR (*((volatile unsigned char *) 0xE001C00C))
|
||||
#define I2SCLH (*((volatile unsigned short *) 0xE001C010))
|
||||
#define I2SCLL (*((volatile unsigned short *) 0xE001C014))
|
||||
#define I2CONCLR (*((volatile unsigned char *) 0xE001C018))
|
||||
|
||||
/* SPI (Serial Peripheral Interface) */
|
||||
/* only for lpc210x*/
|
||||
#define SPI_SPCR (*((volatile unsigned char *) 0xE0020000))
|
||||
#define SPI_SPSR (*((volatile unsigned char *) 0xE0020004))
|
||||
#define SPI_SPDR (*((volatile unsigned char *) 0xE0020008))
|
||||
#define SPI_SPCCR (*((volatile unsigned char *) 0xE002000C))
|
||||
#define SPI_SPINT (*((volatile unsigned char *) 0xE002001C))
|
||||
|
||||
#ifdef CONFIG_ARCH_LPC22xx
|
||||
#define S0PCR (*((volatile unsigned char *) 0xE0020000)) /* no in lpc210x*/
|
||||
#define S0PSR (*((volatile unsigned char *) 0xE0020004)) /* no in lpc210x*/
|
||||
#define S0PDR (*((volatile unsigned char *) 0xE0020008)) /* no in lpc210x*/
|
||||
#define S0PCCR (*((volatile unsigned char *) 0xE002000C)) /* no in lpc210x*/
|
||||
#define S0PINT (*((volatile unsigned char *) 0xE002001C)) /* no in lpc210x*/
|
||||
|
||||
#define S1PCR (*((volatile unsigned char *) 0xE0030000)) /* no in lpc210x*/
|
||||
#define S1PSR (*((volatile unsigned char *) 0xE0030004)) /* no in lpc210x*/
|
||||
#define S1PDR (*((volatile unsigned char *) 0xE0030008)) /* no in lpc210x*/
|
||||
#define S1PCCR (*((volatile unsigned char *) 0xE003000C)) /* no in lpc210x*/
|
||||
#define S1PINT (*((volatile unsigned char *) 0xE003001C)) /* no in lpc210x*/
|
||||
#endif
|
||||
/* CAN CONTROLLERS AND ACCEPTANCE FILTER */
|
||||
#define CAN1MOD (*((volatile unsigned long *) 0xE0044000)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1CMR (*((volatile unsigned long *) 0xE0044004)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1GSR (*((volatile unsigned long *) 0xE0044008)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1ICR (*((volatile unsigned long *) 0xE004400C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1IER (*((volatile unsigned long *) 0xE0044010)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1BTR (*((volatile unsigned long *) 0xE0044014)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1EWL (*((volatile unsigned long *) 0xE004401C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1SR (*((volatile unsigned long *) 0xE0044020)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1RFS (*((volatile unsigned long *) 0xE0044024)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1RDA (*((volatile unsigned long *) 0xE0044028)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1RDB (*((volatile unsigned long *) 0xE004402C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1TFI1 (*((volatile unsigned long *) 0xE0044030)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1TID1 (*((volatile unsigned long *) 0xE0044034)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1TDA1 (*((volatile unsigned long *) 0xE0044038)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1TDB1 (*((volatile unsigned long *) 0xE004403C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1TFI2 (*((volatile unsigned long *) 0xE0044040)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1TID2 (*((volatile unsigned long *) 0xE0044044)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1TDA2 (*((volatile unsigned long *) 0xE0044048)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1TDB2 (*((volatile unsigned long *) 0xE004404C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1TFI3 (*((volatile unsigned long *) 0xE0044050)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1TID3 (*((volatile unsigned long *) 0xE0044054)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1TDA3 (*((volatile unsigned long *) 0xE0044058)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN1TDB3 (*((volatile unsigned long *) 0xE004405C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
|
||||
#define CAN2MOD (*((volatile unsigned long *) 0xE0048000)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2CMR (*((volatile unsigned long *) 0xE0048004)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2GSR (*((volatile unsigned long *) 0xE0048008)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2ICR (*((volatile unsigned long *) 0xE004800C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2IER (*((volatile unsigned long *) 0xE0048010)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2BTR (*((volatile unsigned long *) 0xE0048014)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2EWL (*((volatile unsigned long *) 0xE004801C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2SR (*((volatile unsigned long *) 0xE0048020)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2RFS (*((volatile unsigned long *) 0xE0048024)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2RDA (*((volatile unsigned long *) 0xE0048028)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2RDB (*((volatile unsigned long *) 0xE004802C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2TFI1 (*((volatile unsigned long *) 0xE0048030)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2TID1 (*((volatile unsigned long *) 0xE0048034)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2TDA1 (*((volatile unsigned long *) 0xE0048038)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2TDB1 (*((volatile unsigned long *) 0xE004803C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2TFI2 (*((volatile unsigned long *) 0xE0048040)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2TID2 (*((volatile unsigned long *) 0xE0048044)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2TDA2 (*((volatile unsigned long *) 0xE0048048)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2TDB2 (*((volatile unsigned long *) 0xE004804C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2TFI3 (*((volatile unsigned long *) 0xE0048050)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2TID3 (*((volatile unsigned long *) 0xE0048054)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2TDA3 (*((volatile unsigned long *) 0xE0048058)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN2TDB3 (*((volatile unsigned long *) 0xE004805C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
|
||||
#define CAN3MOD (*((volatile unsigned long *) 0xE004C000)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3CMR (*((volatile unsigned long *) 0xE004C004)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3GSR (*((volatile unsigned long *) 0xE004C008)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3ICR (*((volatile unsigned long *) 0xE004C00C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3IER (*((volatile unsigned long *) 0xE004C010)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3BTR (*((volatile unsigned long *) 0xE004C014)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3EWL (*((volatile unsigned long *) 0xE004C01C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3SR (*((volatile unsigned long *) 0xE004C020)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3RFS (*((volatile unsigned long *) 0xE004C024)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3RDA (*((volatile unsigned long *) 0xE004C028)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3RDB (*((volatile unsigned long *) 0xE004C02C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3TFI1 (*((volatile unsigned long *) 0xE004C030)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3TID1 (*((volatile unsigned long *) 0xE004C034)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3TDA1 (*((volatile unsigned long *) 0xE004C038)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3TDB1 (*((volatile unsigned long *) 0xE004C03C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3TFI2 (*((volatile unsigned long *) 0xE004C040)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3TID2 (*((volatile unsigned long *) 0xE004C044)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3TDA2 (*((volatile unsigned long *) 0xE004C048)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3TDB2 (*((volatile unsigned long *) 0xE004C04C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3TFI3 (*((volatile unsigned long *) 0xE004C050)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3TID3 (*((volatile unsigned long *) 0xE004C054)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3TDA3 (*((volatile unsigned long *) 0xE004C058)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN3TDB3 (*((volatile unsigned long *) 0xE004C05C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
|
||||
#define CAN4MOD (*((volatile unsigned long *) 0xE0050000)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4CMR (*((volatile unsigned long *) 0xE0050004)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4GSR (*((volatile unsigned long *) 0xE0050008)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4ICR (*((volatile unsigned long *) 0xE005000C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4IER (*((volatile unsigned long *) 0xE0050010)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4BTR (*((volatile unsigned long *) 0xE0050014)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4EWL (*((volatile unsigned long *) 0xE005001C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4SR (*((volatile unsigned long *) 0xE0050020)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4RFS (*((volatile unsigned long *) 0xE0050024)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4RDA (*((volatile unsigned long *) 0xE0050028)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4RDB (*((volatile unsigned long *) 0xE005002C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4TFI1 (*((volatile unsigned long *) 0xE0050030)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4TID1 (*((volatile unsigned long *) 0xE0050034)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4TDA1 (*((volatile unsigned long *) 0xE0050038)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4TDB1 (*((volatile unsigned long *) 0xE005003C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4TFI2 (*((volatile unsigned long *) 0xE0050040)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4TID2 (*((volatile unsigned long *) 0xE0050044)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4TDA2 (*((volatile unsigned long *) 0xE0050048)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4TDB2 (*((volatile unsigned long *) 0xE005004C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4TFI3 (*((volatile unsigned long *) 0xE0050050)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4TID3 (*((volatile unsigned long *) 0xE0050054)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4TDA3 (*((volatile unsigned long *) 0xE0050058)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN4TDB3 (*((volatile unsigned long *) 0xE005005C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
|
||||
#define CAN5MOD (*((volatile unsigned long *) 0xE0054000)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5CMR (*((volatile unsigned long *) 0xE0054004)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5GSR (*((volatile unsigned long *) 0xE0054008)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5ICR (*((volatile unsigned long *) 0xE005400C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5IER (*((volatile unsigned long *) 0xE0054010)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5BTR (*((volatile unsigned long *) 0xE0054014)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5EWL (*((volatile unsigned long *) 0xE005401C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5SR (*((volatile unsigned long *) 0xE0054020)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5RFS (*((volatile unsigned long *) 0xE0054024)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5RDA (*((volatile unsigned long *) 0xE0054028)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5RDB (*((volatile unsigned long *) 0xE005402C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5TFI1 (*((volatile unsigned long *) 0xE0054030)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5TID1 (*((volatile unsigned long *) 0xE0054034)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5TDA1 (*((volatile unsigned long *) 0xE0054038)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5TDB1 (*((volatile unsigned long *) 0xE005403C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5TFI2 (*((volatile unsigned long *) 0xE0054040)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5TID2 (*((volatile unsigned long *) 0xE0054044)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5TDA2 (*((volatile unsigned long *) 0xE0054048)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5TDB2 (*((volatile unsigned long *) 0xE005404C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5TFI3 (*((volatile unsigned long *) 0xE0054050)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5TID3 (*((volatile unsigned long *) 0xE0054054)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5TDA3 (*((volatile unsigned long *) 0xE0054058)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CAN5TDB3 (*((volatile unsigned long *) 0xE005405C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
|
||||
#ifdef CONFIG_ARCH_LPC22xx
|
||||
#define CAN6MOD (*((volatile unsigned long *) 0xE0058000)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6CMR (*((volatile unsigned long *) 0xE0058004)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6GSR (*((volatile unsigned long *) 0xE0058008)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6ICR (*((volatile unsigned long *) 0xE005800C)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6IER (*((volatile unsigned long *) 0xE0058010)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6BTR (*((volatile unsigned long *) 0xE0058014)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6EWL (*((volatile unsigned long *) 0xE005801C)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6SR (*((volatile unsigned long *) 0xE0058020)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6RFS (*((volatile unsigned long *) 0xE0058024)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6RDA (*((volatile unsigned long *) 0xE0058028)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6RDB (*((volatile unsigned long *) 0xE005802C)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6TFI1 (*((volatile unsigned long *) 0xE0058030)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6TID1 (*((volatile unsigned long *) 0xE0058034)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6TDA1 (*((volatile unsigned long *) 0xE0058038)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6TDB1 (*((volatile unsigned long *) 0xE005803C)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6TFI2 (*((volatile unsigned long *) 0xE0058040)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6TID2 (*((volatile unsigned long *) 0xE0058044)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6TDA2 (*((volatile unsigned long *) 0xE0058048)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6TDB2 (*((volatile unsigned long *) 0xE005804C)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6TFI3 (*((volatile unsigned long *) 0xE0058050)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6TID3 (*((volatile unsigned long *) 0xE0058054)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6TDA3 (*((volatile unsigned long *) 0xE0058058)) /* lpc2292\lpc2294 only */
|
||||
#define CAN6TDB3 (*((volatile unsigned long *) 0xE005805C)) /* lpc2292\lpc2294 only */
|
||||
#endif
|
||||
|
||||
#define CANTxSR (*((volatile unsigned long *) 0xE0040000)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CANRxSR (*((volatile unsigned long *) 0xE0040004)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CANMSR (*((volatile unsigned long *) 0xE0040008)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
|
||||
#define CANAFMR (*((volatile unsigned long *) 0xE003C000)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CANSFF_sa (*((volatile unsigned long *) 0xE003C004)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CANSFF_GRP_sa (*((volatile unsigned long *) 0xE003C008)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CANEFF_sa (*((volatile unsigned long *) 0xE003C00C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CANEFF_GRP_sa (*((volatile unsigned long *) 0xE003C010)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CANENDofTable (*((volatile unsigned long *) 0xE003C014)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CANLUTerrAd (*((volatile unsigned long *) 0xE003C018)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
#define CANLUTerr (*((volatile unsigned long *) 0xE003C01C)) /* lpc2119\lpc2129\lpc2292\lpc2294 only */
|
||||
/* CAN Acceptance Filter RAM */
|
||||
#define CANAFRAM (*((volatile unsigned long *) 0xE0038000))
|
||||
|
||||
|
||||
/* Timer 0 */
|
||||
#define T0IR (*((volatile unsigned long *) 0xE0004000))
|
||||
#define T0TCR (*((volatile unsigned long *) 0xE0004004))
|
||||
#define T0TC (*((volatile unsigned long *) 0xE0004008))
|
||||
#define T0PR (*((volatile unsigned long *) 0xE000400C))
|
||||
#define T0PC (*((volatile unsigned long *) 0xE0004010))
|
||||
#define T0MCR (*((volatile unsigned long *) 0xE0004014))
|
||||
#define T0MR0 (*((volatile unsigned long *) 0xE0004018))
|
||||
#define T0MR1 (*((volatile unsigned long *) 0xE000401C))
|
||||
#define T0MR2 (*((volatile unsigned long *) 0xE0004020))
|
||||
#define T0MR3 (*((volatile unsigned long *) 0xE0004024))
|
||||
#define T0CCR (*((volatile unsigned long *) 0xE0004028))
|
||||
#define T0CR0 (*((volatile unsigned long *) 0xE000402C))
|
||||
#define T0CR1 (*((volatile unsigned long *) 0xE0004030))
|
||||
#define T0CR2 (*((volatile unsigned long *) 0xE0004034))
|
||||
#define T0CR3 (*((volatile unsigned long *) 0xE0004038))
|
||||
#define T0EMR (*((volatile unsigned long *) 0xE000403C))
|
||||
|
||||
/* Timer 1 */
|
||||
#define T1IR (*((volatile unsigned long *) 0xE0008000))
|
||||
#define T1TCR (*((volatile unsigned long *) 0xE0008004))
|
||||
#define T1TC (*((volatile unsigned long *) 0xE0008008))
|
||||
#define T1PR (*((volatile unsigned long *) 0xE000800C))
|
||||
#define T1PC (*((volatile unsigned long *) 0xE0008010))
|
||||
#define T1MCR (*((volatile unsigned long *) 0xE0008014))
|
||||
#define T1MR0 (*((volatile unsigned long *) 0xE0008018))
|
||||
#define T1MR1 (*((volatile unsigned long *) 0xE000801C))
|
||||
#define T1MR2 (*((volatile unsigned long *) 0xE0008020))
|
||||
#define T1MR3 (*((volatile unsigned long *) 0xE0008024))
|
||||
#define T1CCR (*((volatile unsigned long *) 0xE0008028))
|
||||
#define T1CR0 (*((volatile unsigned long *) 0xE000802C))
|
||||
#define T1CR1 (*((volatile unsigned long *) 0xE0008030))
|
||||
#define T1CR2 (*((volatile unsigned long *) 0xE0008034))
|
||||
#define T1CR3 (*((volatile unsigned long *) 0xE0008038))
|
||||
#define T1EMR (*((volatile unsigned long *) 0xE000803C))
|
||||
|
||||
/* Pulse Width Modulator (PWM) */
|
||||
#define PWMIR (*((volatile unsigned long *) 0xE0014000))
|
||||
#define PWMTCR (*((volatile unsigned long *) 0xE0014004))
|
||||
#define PWMTC (*((volatile unsigned long *) 0xE0014008))
|
||||
#define PWMPR (*((volatile unsigned long *) 0xE001400C))
|
||||
#define PWMPC (*((volatile unsigned long *) 0xE0014010))
|
||||
#define PWMMCR (*((volatile unsigned long *) 0xE0014014))
|
||||
#define PWMMR0 (*((volatile unsigned long *) 0xE0014018))
|
||||
#define PWMMR1 (*((volatile unsigned long *) 0xE001401C))
|
||||
#define PWMMR2 (*((volatile unsigned long *) 0xE0014020))
|
||||
#define PWMMR3 (*((volatile unsigned long *) 0xE0014024))
|
||||
#define PWMMR4 (*((volatile unsigned long *) 0xE0014040))
|
||||
#define PWMMR5 (*((volatile unsigned long *) 0xE0014044))
|
||||
#define PWMMR6 (*((volatile unsigned long *) 0xE0014048))
|
||||
#define PWMPCR (*((volatile unsigned long *) 0xE001404C))
|
||||
#define PWMLER (*((volatile unsigned long *) 0xE0014050))
|
||||
|
||||
/* A/D CONVERTER */
|
||||
#ifndef CONFIG_ARCH_LPC2104
|
||||
#define ADCR (*((volatile unsigned long *) 0xE0034000)) /* no in lpc210x*/
|
||||
#define ADDR (*((volatile unsigned long *) 0xE0034004)) /* no in lpc210x*/
|
||||
#endif
|
||||
|
||||
/* Real Time Clock */
|
||||
#define ILR (*((volatile unsigned char *) 0xE0024000))
|
||||
#define CTC (*((volatile unsigned short*) 0xE0024004))
|
||||
#define CCR (*((volatile unsigned char *) 0xE0024008))
|
||||
#define CIIR (*((volatile unsigned char *) 0xE002400C))
|
||||
#define AMR (*((volatile unsigned char *) 0xE0024010))
|
||||
#define CTIME0 (*((volatile unsigned long *) 0xE0024014))
|
||||
#define CTIME1 (*((volatile unsigned long *) 0xE0024018))
|
||||
#define CTIME2 (*((volatile unsigned long *) 0xE002401C))
|
||||
#define SEC (*((volatile unsigned char *) 0xE0024020))
|
||||
#define MIN (*((volatile unsigned char *) 0xE0024024))
|
||||
#define HOUR (*((volatile unsigned char *) 0xE0024028))
|
||||
#define DOM (*((volatile unsigned char *) 0xE002402C))
|
||||
#define DOW (*((volatile unsigned char *) 0xE0024030))
|
||||
#define DOY (*((volatile unsigned short*) 0xE0024034))
|
||||
#define MONTH (*((volatile unsigned char *) 0xE0024038))
|
||||
#define YEAR (*((volatile unsigned short*) 0xE002403C))
|
||||
#define ALSEC (*((volatile unsigned char *) 0xE0024060))
|
||||
#define ALMIN (*((volatile unsigned char *) 0xE0024064))
|
||||
#define ALHOUR (*((volatile unsigned char *) 0xE0024068))
|
||||
#define ALDOM (*((volatile unsigned char *) 0xE002406C))
|
||||
#define ALDOW (*((volatile unsigned char *) 0xE0024070))
|
||||
#define ALDOY (*((volatile unsigned short*) 0xE0024074))
|
||||
#define ALMON (*((volatile unsigned char *) 0xE0024078))
|
||||
#define ALYEAR (*((volatile unsigned short*) 0xE002407C))
|
||||
#define PREINT (*((volatile unsigned short*) 0xE0024080))
|
||||
#define PREFRAC (*((volatile unsigned short*) 0xE0024084))
|
||||
|
||||
/* Watchdog */
|
||||
#define WDMOD (*((volatile unsigned char *) 0xE0000000))
|
||||
#define WDTC (*((volatile unsigned long *) 0xE0000004))
|
||||
#define WDFEED (*((volatile unsigned char *) 0xE0000008))
|
||||
#define WDTV (*((volatile unsigned long *) 0xE000000C))
|
||||
|
||||
/*
|
||||
Register define for constant
|
||||
*/
|
||||
#define REG_U0RBR 0xE000C000
|
||||
#define REG_U1RBR 0xE0010000
|
||||
|
||||
/* PLL */
|
||||
#define REG_PLLCON 0xE01FC080
|
||||
#define REG_PLLCFG 0xE01FC084
|
||||
#define REG_PLLSTAT 0xE01FC088
|
||||
#define REG_PLLFEED 0xE01FC08C
|
||||
|
||||
/* Power Control */
|
||||
|
||||
#define REG_PCON 0xE01FC0C0
|
||||
#define REG_PCOMP 0xE01FC0C4
|
||||
#define REG_PINSEL0 0xE002C000
|
||||
#define REG_MEMMAP 0xE01FC040
|
||||
#define REG_PLLSTAT 0xE01FC088
|
||||
#define REG_VPBDIV 0xE01FC100
|
||||
|
||||
|
||||
#endif /* __LPC22XX_H__ */
|
||||
48
c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_asm.S
Normal file
48
c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_asm.S
Normal file
@@ -0,0 +1,48 @@
|
||||
/*
|
||||
* LPC22XX Intererrupt handler
|
||||
*
|
||||
* Copyright (c) 2002 by Jay Monkman <jtm@lopingdog.com>
|
||||
*
|
||||
* Modified by ray
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
*
|
||||
* http://www.OARcorp.com/rtems/license.html.
|
||||
*
|
||||
*
|
||||
* bsp_irq_asm.S,v 1.1 2002/11/13 17:55:06 joel Exp
|
||||
*/
|
||||
#define __asm__
|
||||
|
||||
/*
|
||||
* BSP specific interrupt handler for INT or FIQ. In here
|
||||
* you do determine which interrupt happened and call its
|
||||
* handler.
|
||||
*/
|
||||
.globl ExecuteITHandler
|
||||
ExecuteITHandler :
|
||||
|
||||
/*
|
||||
* Look at interrupt status register to determine source.
|
||||
* From source, determine offset into expanded vector table
|
||||
* and load handler address into r0.
|
||||
*/
|
||||
|
||||
ldr r0, =0xFFFFF030 /* Read the vector number */
|
||||
ldr r1, [r0]
|
||||
|
||||
/* find the ISR's address based on the vector VICVectAddr0 */
|
||||
/*ldr r0, =0xFFFFF100*/
|
||||
/*ldr r0, [r0, r1, LSL #2]*/ /* Read the address */
|
||||
|
||||
|
||||
stmdb sp!,{lr}
|
||||
ldr lr, =IRQ_return /* prepare the return from handler */
|
||||
|
||||
mov pc, r1 /* EXECUTE INT HANDLER */
|
||||
|
||||
IRQ_return:
|
||||
ldmia sp!,{lr}
|
||||
|
||||
mov pc, lr
|
||||
48
c/src/lib/libcpu/arm/lpc22xx/timer/lpc_timer.h
Normal file
48
c/src/lib/libcpu/arm/lpc22xx/timer/lpc_timer.h
Normal file
@@ -0,0 +1,48 @@
|
||||
#ifndef __LPC_TIMER_H
|
||||
#define __LPC_TIMER_H
|
||||
|
||||
/*************************************************************************
|
||||
*
|
||||
* File name : Timer.h
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
/* Timer Control register bit descriptions */
|
||||
#define TCR_ENABLE_BIT 0
|
||||
#define TCR_RESET_BIT 1
|
||||
|
||||
// The channel name which is used in matching, in fact they represent
|
||||
// corresponding Match Register
|
||||
#define CH_MAXNUM 4
|
||||
#define CH0 0
|
||||
#define CH1 1
|
||||
#define CH2 2
|
||||
#define CH3 3
|
||||
|
||||
// The channel name which is used in capturing, in fact they represent
|
||||
// corresponding Capture Register
|
||||
#define CPCH_MAXNUM 4
|
||||
#define CPCH0 0
|
||||
#define CPCH1 1
|
||||
#define CPCH2 2
|
||||
#define CPCH3 3
|
||||
|
||||
//The actions when matching
|
||||
#define TimerAction_Interrupt 0x1
|
||||
#define TimerAction_ResetTimer 0x2
|
||||
#define TimerAction_StopTimer 0x4
|
||||
|
||||
//Interrupt source type
|
||||
#define TIMERMR0Int 0x01
|
||||
#define TIMERMR1Int 0x02
|
||||
#define TIMERMR2Int 0x04
|
||||
#define TIMERMR3Int 0x08
|
||||
#define TIMERCR0Int 0x10
|
||||
#define TIMERCR1Int 0x20
|
||||
#define TIMERCR2Int 0x40
|
||||
#define TIMERCR3Int 0x80
|
||||
|
||||
#define TIMERALLInt 0xFF
|
||||
|
||||
#endif //__LPC_Timer_H
|
||||
|
||||
115
c/src/lib/libcpu/arm/lpc22xx/timer/timer.c
Normal file
115
c/src/lib/libcpu/arm/lpc22xx/timer/timer.c
Normal file
@@ -0,0 +1,115 @@
|
||||
/*
|
||||
* RTL22xx board Timer driver
|
||||
*
|
||||
* This uses Timer1 for timing measurments.
|
||||
*
|
||||
* By Ray xu, modify form Mc9328mxl RTEMS DSP
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
*
|
||||
* http://www.OARcorp.com/rtems/license.html.
|
||||
*
|
||||
* Notes:
|
||||
* This file manages the benchmark timer used by the RTEMS Timing Test
|
||||
* Suite. Each measured time period is demarcated by calls to
|
||||
* Timer_initialize() and Read_timer(). Read_timer() usually returns
|
||||
* the number of microseconds since Timer_initialize() exitted.
|
||||
*
|
||||
* It is important that the timer start/stop overhead be determined
|
||||
* when porting or modifying this code.
|
||||
*
|
||||
* timer.c,v 1.1 2002/11/13 17:55:09 joel Exp
|
||||
*/
|
||||
|
||||
#include <rtems.h>
|
||||
#include <bsp.h>
|
||||
#include <lpc22xx.h>
|
||||
#include "lpc_timer.h"
|
||||
uint32_t g_start;
|
||||
uint32_t g_freq;
|
||||
|
||||
#ifndef __cplusplus
|
||||
#define bool int
|
||||
#define true 1
|
||||
#define false 0
|
||||
|
||||
#endif/* __cplusplus */
|
||||
|
||||
rtems_boolean Timer_driver_Find_average_overhead;
|
||||
|
||||
|
||||
/*
|
||||
* Set up Timer 1
|
||||
*/
|
||||
void Timer_initialize( void )
|
||||
{
|
||||
T1TCR &= 0; /* disable and clear timer 0 */
|
||||
g_start = (T1TC/(LPC22xx_Fpclk/1000000));
|
||||
T1PC = 0; /* TC is incrementet on every pclk.*/
|
||||
T1MR0 = ((LPC22xx_Fpclk/1000* BSP_Configuration.microseconds_per_tick) / 1000); /* initialize the timer period and prescaler */
|
||||
T1EMR = 0; /*No external match*/
|
||||
T1TCR = 1; /*enable timer1*/
|
||||
g_freq = LPC22xx_Fpclk / 1000;
|
||||
}
|
||||
|
||||
/*
|
||||
* The following controls the behavior of Read_timer().
|
||||
*
|
||||
* AVG_OVEREHAD is the overhead for starting and stopping the timer. It
|
||||
* is usually deducted from the number returned.
|
||||
*
|
||||
* LEAST_VALID is the lowest number this routine should trust. Numbers
|
||||
* below this are "noise" and zero is returned.
|
||||
*/
|
||||
|
||||
#define AVG_OVERHEAD 0 /* It typically takes X.X microseconds */
|
||||
/* (Y countdowns) to start/stop the timer. */
|
||||
/* This value is in microseconds. */
|
||||
#define LEAST_VALID 1 /* Don't trust a clicks value lower than this */
|
||||
|
||||
int Read_timer( void )
|
||||
{
|
||||
uint32_t t;
|
||||
unsigned long long total;
|
||||
|
||||
t = (T1TC/(LPC22xx_Fpclk/1000000));
|
||||
/*
|
||||
* Total is calculated by taking into account the number of timer overflow
|
||||
* interrupts since the timer was initialized and clicks since the last
|
||||
* interrupts. currently it is not supported
|
||||
*/
|
||||
|
||||
total = (t - g_start);
|
||||
|
||||
/* convert to nanoseconds */
|
||||
|
||||
if ( Timer_driver_Find_average_overhead == 1 ) {
|
||||
return (int) total;
|
||||
} else if ( total < LEAST_VALID ) {
|
||||
return 0;
|
||||
}
|
||||
/*
|
||||
* Somehow convert total into microseconds
|
||||
*/
|
||||
|
||||
return (total - AVG_OVERHEAD);
|
||||
}
|
||||
|
||||
/*
|
||||
* Empty function call used in loops to measure basic cost of looping
|
||||
* in Timing Test Suite.
|
||||
*/
|
||||
|
||||
rtems_status_code Empty_function( void )
|
||||
{
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
void Set_find_average_overhead(
|
||||
rtems_boolean find_flag
|
||||
)
|
||||
{
|
||||
Timer_driver_Find_average_overhead = find_flag;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user