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B.Robinson MIPS patch

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This commit is contained in:
Greg Menke
2006-06-08 18:03:55 +00:00
parent 549e88f623
commit 7c99007641
11 changed files with 252 additions and 189 deletions
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8
c/src/lib/libcpu/mips/ChangeLog
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@@ -1,7 +1,13 @@
2006-06-08 Bruce Robinson <brucer@pmccorp.com>
* Makefile.am: add interruptmask.c
* shared/interrupts/interuptmask.c: TX49 conditional mask computation
* shared/interrupts/vectorexceptions.c: Corrections to exception codes
& descriptions
2006-05-16 Ralf Corsépius <ralf.corsepius@rtems.org>
* configure.ac: Use RTEMS_AMPOLISH3.
2006-04-02 Ralf Corsépius <ralf.corsepius@rtems.org>
* Makefile.am: Remove bogus CFLAGS_OPTIMIZE_V.

3
c/src/lib/libcpu/mips/Makefile.am
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@@ -41,7 +41,8 @@ endif
noinst_PROGRAMS += shared/interrupts.rel
shared_interrupts_rel_SOURCES = shared/interrupts/installisrentries.c \
shared/interrupts/vectorexceptions.c shared/interrupts/isr_entries.S
shared/interrupts/vectorexceptions.c shared/interrupts/interruptmask.c \
shared/interrupts/isr_entries.S
shared_interrupts_rel_CPPFLAGS = $(AM_CPPFLAGS) $(interrupts_CPPFLAGS)
shared_interrupts_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)

24
c/src/lib/libcpu/mips/shared/interrupts/interruptmask.c Normal file
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@@ -0,0 +1,24 @@
/*
* $Id: interruptmask.c,v 1.0 2006/04/04 05:18:49
*/
#include <rtems.h>
/*
* This function returns a mask value which is used to select the bits
* in the processor status register that can be set to enable interrupts.
* The mask value should not include the 2 software interrupt enable bits.
*/
uint32_t mips_interrupt_mask( void )
{
uint32_t interrupt_mask;
#ifdef TX49
interrupt_mask = 0x00000400; /* Toshiba TX49 processors have a non-standard interrupt mask */
#else
interrupt_mask = 0x0000fc00;
#endif
return(interrupt_mask);
}

21
c/src/lib/libcpu/mips/shared/interrupts/vectorexceptions.c
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@@ -24,17 +24,18 @@ static const char *cause_strings[32] =
/* 5 */ "Address Store",
/* 6 */ "Instruction Bus Error",
/* 7 */ "Data Bus Error",
/* 9 */ "Syscall",
/* 10 */ "Breakpoint",
/* 11 */ "Reserved Instruction",
/* 12 */ "Coprocessor Unuseable",
/* 13 */ "Overflow",
/* 14 */ "Trap",
/* 15 */ "Instruction Virtual Coherency Error",
/* 16 */ "FP Exception",
/* 8 */ "Syscall",
/* 9 */ "Breakpoint",
/* 10 */ "Reserved Instruction",
/* 11 */ "Coprocessor Unuseable",
/* 12 */ "Overflow",
/* 13 */ "Trap",
/* 14 */ "Instruction Virtual Coherency Error",
/* 15 */ "FP Exception",
/* 16 */ "Reserved 16",
/* 17 */ "Reserved 17",
/* 18 */ "Reserved 17",
/* 19 */ "Reserved 17",
/* 18 */ "Reserved 18",
/* 19 */ "Reserved 19",
/* 20 */ "Reserved 20",
/* 21 */ "Reserved 21",
/* 22 */ "Reserved 22",