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Place FEC buffer descriptors in static RAM. No more cache concerns.

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This commit is contained in:
Eric Norum
2005-02-01 15:12:55 +00:00
parent 7a6d1a341f
commit 7c7184a49f
3 changed files with 23 additions and 30 deletions
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5
c/src/lib/libbsp/m68k/uC5282/ChangeLog
View File

@@ -1,3 +1,8 @@
2005-02-01 Eric Norum <norume@aps.anl.gov>
* start/start.S, network/network.c: Place FEC buffer descriptors in SRAM.
No longer need to worry about buffer descriptor caching.
2005-01-31 Eric Norum <norume@aps.anl.gov>
* network/network.c, startup/bspstart.c: Processor doesn't snoop FEC DMA

34
c/src/lib/libbsp/m68k/uC5282/network/network.c
View File

@@ -123,19 +123,19 @@ mcf5282_fec_tx_interrupt_handler( rtems_vector_number v )
}
/*
* Allocate buffer descriptors
* Allocate buffer descriptors from (non-cached) on-chip static RAM
* Ensure 128-bit (16-byte) alignment
*/
static mcf5282BufferDescriptor_t *
mcf5282_bd_allocate(unsigned int count)
{
mcf5282BufferDescriptor_t *p;
extern char __SRAMBASE[];
static mcf5282BufferDescriptor_t *bdp = (mcf5282BufferDescriptor_t *)__SRAMBASE;
mcf5282BufferDescriptor_t *p = bdp;
p = malloc((count * sizeof(mcf5282BufferDescriptor_t)) + 15, 0, M_NOWAIT);
if (!p)
rtems_panic("FEC BD");
if ((int)p & 0xF)
p = (mcf5282BufferDescriptor_t *)((char *)p + (16 - ((int)p & 0xF)));
bdp += count;
if ((int)bdp & 0xF)
bdp = (mcf5282BufferDescriptor_t *)((char *)bdp + (16 - ((int)bdp & 0xF)));
return p;
}
@@ -302,15 +302,9 @@ static void
fec_retire_tx_bd(volatile struct mcf5282_enet_struct *sc )
{
struct mbuf *m, *n;
volatile mcf5282BufferDescriptor_t *txBd;
for (;;) {
if (sc->txBdActiveCount == 0)
return;
txBd = sc->txBdBase + sc->txBdTail;
rtems_cache_invalidate_multiple_data_lines(txBd, sizeof *txBd);
if ((txBd->status & MCF5282_FEC_TxBD_R) != 0)
return;
while ((sc->txBdActiveCount != 0)
&& ((sc->txBdBase[sc->txBdTail].status & MCF5282_FEC_TxBD_R) == 0)) {
m = sc->txMbuf[sc->txBdTail];
MFREE(m, n);
if (++sc->txBdTail == sc->txBdCount)
@@ -359,9 +353,7 @@ fec_rxDaemon (void *arg)
/*
* Wait for packet if there's not one ready
*/
rtems_cache_invalidate_multiple_data_lines(rxBd, sizeof *rxBd);
if ((status = rxBd->status) & MCF5282_FEC_RxBD_E) {
int chkCount=0 ;
/*
* Clear old events.
*/
@@ -373,14 +365,10 @@ int chkCount=0 ;
* This catches the case when a packet arrives between the
* `if' above, and the clearing of the RXF bit in the EIR.
*/
for (;;) {
while ((status = rxBd->status) & MCF5282_FEC_RxBD_E) {
rtems_event_set events;
int level;
rtems_cache_invalidate_multiple_data_lines(rxBd, sizeof *rxBd);
if (((status = rxBd->status) & MCF5282_FEC_RxBD_E) == 0)
break;
rtems_interrupt_disable(level);
MCF5282_FEC_EIMR |= MCF5282_FEC_EIMR_RXF;
rtems_interrupt_enable(level);
@@ -403,7 +391,7 @@ int chkCount=0 ;
int len = rxBd->length - sizeof(rtems_unsigned32);;
/*
* Invalidate the cache and push the packet up
* Invalidate the cache and push the packet up.
* The cache is so small that it's more efficient to just
* invalidate the whole thing unless the packet is very small.
*/

14
c/src/lib/libbsp/m68k/uC5282/start/start.S
View File

@@ -313,19 +313,19 @@ SYM(_spuriousInterrupt):
.align 4
PUBLIC (start)
SYM(start):
move.w #0x2700,sr | Disable interrupts
move.l #__SRAMBASE+1,d0 | Enable the MCF5282 internal SRAM
movec d0,%rambar | ...so we have a stack
move.l #__SRAMBASE+SRAM_SIZE-4,sp | Overwrite the fake stack pointer
move.w #0x2700,sr | Disable interrupts
/*
* If we're being started by the debugger, and the debugger has
* moved the IPSBAR, we're doomed........
*/
move.l #__IPSBAR+1,d0 | Enable the MCF5282 internal peripherals
move.l #__IPSBAR+1,d0 | Enable the MCF5282 internal peripherals
move.l d0,DEFAULT_IPSBAR
move.l #__SRAMBASE+0x201,d0 | Enable the MCF5282 internal SRAM
movec d0,%rambar | CPU-space copy of RAMBAR
move.l d0,DEFAULT_IPSBAR+8 | Memory-space copy of RAMBAR
move.l #__SRAMBASE+SRAM_SIZE-4,sp | Overwrite the fake stack pointer
/*
* Copy the vector table to address 0 (VBR must be 0 mod 2^20)
* Leave the dBUG vectors (0-63) alone