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ARM bsp maintenance

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This commit is contained in:
Thomas Doerfler
2009-07-17 13:53:04 +00:00
parent 9832a22c98
commit 7ae2775132
39 changed files with 1037 additions and 607 deletions
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12
c/src/lib/libbsp/arm/ChangeLog
View File

@@ -1,3 +1,15 @@
2009-07-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
* shared/irq/irq_asm.S, shared/startup/linkcmds.rom: Removed files.
* Makefile.am: Removed references to deleted file
'shared/irq/irq_asm.S'.
* shared/irq/irq_init.c: Do not install fast interrupt handler.
Changed interrupt handler.
* shared/abort/simple_abort.c: Fixed inline assembler statement.
* shared/include/linker-symbols.h: Renamed sections. New symbols.
* shared/start/start.S: Added THUMB support. Update for linker symbol
changes.
2009-06-04 Xi Yang <hiyangxi@gmail.com>
* acinclude.m4: New Gumstix BSP.

1
c/src/lib/libbsp/arm/Makefile.am
View File

@@ -17,7 +17,6 @@ EXTRA_DIST += shared/comm/console.c
EXTRA_DIST += shared/comm/uart.c
# irq
EXTRA_DIST += shared/irq/irq_asm.S
EXTRA_DIST += shared/irq/irq_init.c
# abort

7
c/src/lib/libbsp/arm/edb7312/ChangeLog
View File

@@ -4,6 +4,13 @@
RTEMS_BSP_BOOTCARD_OPTIONS. Add RTEMS_BSP_CLEANUP_OPTIONS so all BSPs
have the same options.
2009-07-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am: Removed references to deleted file
'../shared/irq/irq_asm.S'.
* irq/bsp_irq_asm.S: Renamed ExecuteITHandler() into
bsp_interrupt_dispatch().
2009-07-12 Xi Yang <hiyangxi@gmail.com>
* configure.ac, clock/clockdrv.c, startup/bspreset.c: Adjust clock

2
c/src/lib/libbsp/arm/edb7312/Makefile.am
View File

@@ -51,7 +51,7 @@ include_HEADERS += irq/irq.h
# irq
libbsp_a_SOURCES += irq/irq.c irq/bsp_irq_init.c \
../../arm/shared/irq/irq_init.c irq/bsp_irq_asm.S \
../../arm/shared/irq/irq_asm.S irq/irq.h
irq/irq.h
if HAS_NETWORKING
network_CPPFLAGS = -D__INSIDE_RTEMS_BSD_TCPIP_STACK__

4
c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_asm.S
View File

@@ -22,8 +22,8 @@
* Function to obtain, execute an IT handler and acknowledge the IT
*/
.globl ExecuteITHandler
ExecuteITHandler :
.globl bsp_interrupt_dispatch
bsp_interrupt_dispatch :
/*
* Look at interrupt status register to determine source.
* From source, determine offset into expanded vector table

8
c/src/lib/libbsp/arm/gba/ChangeLog
View File

@@ -4,6 +4,14 @@
RTEMS_BSP_BOOTCARD_OPTIONS. Add RTEMS_BSP_CLEANUP_OPTIONS so all BSPs
have the same options.
2009-07-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
* startup/cpu.c, startup/cpu_asm.S: Removed files.
* Makefile.am: Removed references to deleted files 'startup/cpu.c' and
'startup/cpu_asm.S'.
* irq/irq_asm.S, irq/bsp_irq_asm.S: Renamed ExecuteITHandler() into
bsp_interrupt_dispatch().
2009-05-08 Joel Sherrill <joel.sherrill@oarcorp.com>
* startup/bspgetworkarea.c: Switch from ssize_t to uintptr_t for

13
c/src/lib/libbsp/arm/gba/Makefile.am
View File

@@ -33,20 +33,13 @@ dist_project_lib_DATA += startup/linkcmds
noinst_LIBRARIES += libbsp.a
libbsp_a_SOURCES =
# some objects have to be forced together to ensure they are ALWAYS
# the ones linked into the application executable. Every application
# needs startup/bspstart.c, so we will force in the others
noinst_PROGRAMS += gbaoverrides.rel
gbaoverrides_rel_SOURCES = startup/bspstart.c startup/cpu.c startup/cpu_asm.S
gbaoverrides_rel_CPPFLAGS = $(AM_CPPFLAGS)
gbaoverrides_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
# startup
libbsp_a_SOURCES += ../../shared/bsplibc.c ../../shared/bsppost.c \
startup/bspgetworkarea.c ../../shared/bsppretaskinghook.c \
../../shared/bsppredriverhook.c ../../shared/bspclean.c \
startup/bspreset.c ../../shared/bootcard.c ../../shared/sbrk.c \
../../shared/gnatinstallhandler.c
../../shared/gnatinstallhandler.c \
startup/bspstart.c
# clock
libbsp_a_SOURCES += clock/clockdrv.c ../../../shared/clockdrv_shell.h
# console
@@ -60,7 +53,5 @@ include_HEADERS += irq/irq.h
libbsp_a_SOURCES += irq/irq.c irq/bsp_irq_init.c irq/irq_init.c \
irq/bsp_irq_asm.S irq/irq_asm.S
libbsp_a_LIBADD = gbaoverrides.rel
include $(srcdir)/preinstall.am
include $(top_srcdir)/../../../../automake/local.am

6
c/src/lib/libbsp/arm/gba/irq/bsp_irq_asm.S
View File

@@ -23,7 +23,7 @@
/**
* Execute interrupt handler
* function void ExecuteITHandler(void)
* function void bsp_interrupt_dispatch(void)
*
* Look at interrupt status register to determine source.
* From source, determine offset into expanded vector table
@@ -34,7 +34,7 @@
.align
/* .section .iwram */
PUBLIC_ARM_FUNCTION(ExecuteITHandler)
PUBLIC_ARM_FUNCTION(bsp_interrupt_dispatch)
ldr r1, =GBA_REG_IE_ADDR
ldrh r1, [r1]
ldr r2, =GBA_REG_IF_ADDR
@@ -174,6 +174,6 @@ IRQ_NoInterrupt:
/* return to the "main" interrupt handler */
mov pc, lr
LABEL_END(ExecuteITHandler)
LABEL_END(bsp_interrupt_dispatch)
/* @endcond */

2
c/src/lib/libbsp/arm/gba/irq/irq_asm.S
View File

@@ -57,7 +57,7 @@ PUBLIC_ARM_FUNCTION(_ISR_Handler)
str r1, [r0]
/* BSP specific function to INT handler */
bl ExecuteITHandler
bl bsp_interrupt_dispatch
/* one less nest level */
ldr r0, =_ISR_Nest_level

12
c/src/lib/libbsp/arm/lpc24xx/ChangeLog
View File

@@ -4,6 +4,18 @@
RTEMS_BSP_BOOTCARD_OPTIONS. Add RTEMS_BSP_CLEANUP_OPTIONS so all BSPs
have the same options.
2009-07-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
* i2c/i2c.c, include/i2c.h, include/idle.h, include/io.h, misc/idle.c,
misc/io.c: New files.
* Makefile.am, README, configure.ac, preinstall.am,
clock/clock-config.c, console/console-config.c, include/irq.h,
include/dma.h, include/lpc24xx.h, include/system-clocks.h, irq/irq.c,
misc/dma.c, misc/system-clocks.c, network/network.c, rtc/rtc-config.c,
startup/bspreset.c, startup/bspstart.c, startup/linkcmds,
startup/linkcmds.lpc2478, startup/linkcmds.lpc2478_ncs,
startup/linkcmds.lpc2478_ncs_ram: Changes throughout.
2009-02-27 Sebastian Huber <sebastian.huber@embedded-brains.de>
* README: Added NCS.

14
c/src/lib/libbsp/arm/lpc24xx/Makefile.am
View File

@@ -30,6 +30,7 @@ include_bsp_HEADERS =
include_bsp_HEADERS += ../../shared/include/utility.h
include_bsp_HEADERS += ../../shared/include/irq-generic.h
include_bsp_HEADERS += ../../shared/include/irq-info.h
include_bsp_HEADERS += ../../shared/include/stackalloc.h
include_bsp_HEADERS += ../../shared/tod.h
include_bsp_HEADERS += ../shared/include/linker-symbols.h
include_bsp_HEADERS += ../shared/include/start.h
@@ -39,6 +40,9 @@ include_bsp_HEADERS += include/lpc24xx.h
include_bsp_HEADERS += include/system-clocks.h
include_bsp_HEADERS += include/ssp.h
include_bsp_HEADERS += include/dma.h
include_bsp_HEADERS += include/idle.h
include_bsp_HEADERS += include/i2c.h
include_bsp_HEADERS += include/io.h
include_HEADERS += ../../shared/include/tm27.h
@@ -53,7 +57,6 @@ libbspstart_a_SOURCES = ../shared/start/start.S
project_lib_DATA = start.$(OBJEXT)
dist_project_lib_DATA += ../shared/startup/linkcmds.base \
../shared/startup/linkcmds.rom \
startup/linkcmds.lpc2478 \
startup/linkcmds.lpc2478_ncs \
startup/linkcmds.lpc2478_ncs_ram
@@ -76,6 +79,7 @@ libbsp_a_SOURCES += ../../shared/bootcard.c \
../../shared/bsppretaskinghook.c \
../../shared/gnatinstallhandler.c \
../../shared/sbrk.c \
../../shared/src/stackalloc.c \
../shared/abort/simple_abort.c
# Startup
@@ -87,7 +91,6 @@ libbsp_a_SOURCES += ../../shared/src/irq-generic.c \
../../shared/src/irq-legacy.c \
../../shared/src/irq-info.c \
../../shared/src/irq-shell.c \
../shared/irq/irq_asm.S \
irq/irq.c
# Console
@@ -106,11 +109,16 @@ libbsp_a_SOURCES += ../../shared/timerstub.c
# Misc
libbsp_a_SOURCES += misc/system-clocks.c \
misc/dma.c
misc/dma.c \
misc/idle.c \
misc/io.c
# SSP
libbsp_a_SOURCES += ssp/ssp.c
# I2C
libbsp_a_SOURCES += i2c/i2c.c
###############################################################################
# Network #
###############################################################################

3
c/src/lib/libbsp/arm/lpc24xx/README
View File

@@ -2,6 +2,8 @@
# $Id$
#
Note: A Binutils version with REGION_ALIAS feature is required to link the BSP.
Development Board: QVGA Base Board from Embedded Artists
http://www.embeddedartists.com/products/uclinux/oem_lpc2478.php
@@ -13,6 +15,7 @@ Drivers:
o RTC
o SSP (SPI mode): This driver is in active development. Use with care.
o Network
o I2C
Howto setup QVGA Base Board?

8
c/src/lib/libbsp/arm/lpc24xx/clock/clock-config.c
View File

@@ -25,6 +25,7 @@
#include <bsp.h>
#include <bsp/lpc24xx.h>
#include <bsp/irq.h>
#include <bsp/io.h>
#include <bsp/system-clocks.h>
/* This is defined in ../../../shared/clockdrv_shell.h */
@@ -55,11 +56,8 @@ static void lpc24xx_clock_initialize( void)
uint64_t interval = ((uint64_t) lpc24xx_cclk()
* (uint64_t) rtems_configuration_get_microseconds_per_tick()) / 1000000;
/* Set timer pclk to cclk */
rtems_interrupt_disable( level);
PCONP = SET_FLAGS( PCONP, 0x02);
PCLKSEL0 = SET_FLAGS( PCLKSEL0, 0x04);
rtems_interrupt_enable( level);
/* Enable module power */
lpc24xx_module_enable( LPC24XX_MODULE_TIMER, 0, LPC24XX_MODULE_CCLK);
/* Reset timer */
T0TCR = TCR_RST;

37
c/src/lib/libbsp/arm/lpc24xx/configure.ac
View File

@@ -24,27 +24,48 @@ RTEMS_CHECK_NETWORKING
AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_MAIN],[*],[12000000U])
RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_MAIN],[Main oscillator frequency in Hz])
RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_MAIN],[main oscillator frequency in Hz])
RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_RTC],[*],[32768])
RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_RTC],[*],[32768U])
RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_RTC],[RTC oscillator frequency in Hz])
RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[*],[72000000])
RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[*],[72000000U])
RTEMS_BSPOPTS_HELP([LPC24XX_CCLK],[CPU clock in Hz])
RTEMS_BSPOPTS_SET([LPC24XX_UART_BAUD],[*],[115200])
RTEMS_BSPOPTS_HELP([LPC24XX_UART_BAUD],[Baud for UARTs])
RTEMS_BSPOPTS_SET([LPC24XX_UART_BAUD],[*],[115200U])
RTEMS_BSPOPTS_HELP([LPC24XX_UART_BAUD],[baud for UARTs])
RTEMS_BSPOPTS_SET([LPC24XX_HAS_UBOOT],[lpc2478],[1])
RTEMS_BSPOPTS_SET([LPC24XX_HAS_UBOOT],[lpc2478_ncs_ram],[1])
RTEMS_BSPOPTS_HELP([LPC24XX_HAS_UBOOT],[Enable U-Boot startup])
RTEMS_BSPOPTS_HELP([LPC24XX_HAS_UBOOT],[enable U-Boot startup])
RTEMS_BSPOPTS_SET([LPC24XX_ETHERNET_RMII],[lpc2478_ncs],[1])
RTEMS_BSPOPTS_SET([LPC24XX_ETHERNET_RMII],[lpc2478_ncs_ram],[1])
RTEMS_BSPOPTS_HELP([LPC24XX_ETHERNET_RMII],[Enable RMII for Ethernet])
RTEMS_BSPOPTS_HELP([LPC24XX_ETHERNET_RMII],[enable RMII for Ethernet])
RTEMS_BSPOPTS_SET([LPC24XX_EMC_MICRON],[lpc2478_ncs],[1])
RTEMS_BSPOPTS_HELP([LPC24XX_EMC_MICRON],[Enable RMII for Ethernet])
RTEMS_BSPOPTS_HELP([LPC24XX_EMC_MICRON],[use Micron configuration for EMC])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_CONSOLE],[*],[0])
RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_CONSOLE],[configuration for console (UART 0)])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_1],[*],[])
RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_1],[configuration for UART 1])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[*],[])
RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_2],[configuration for UART 2])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_3],[*],[])
RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_3],[configuration for UART 3])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_I2C_0],[lpc2478_ncs_ram],[0])
RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_I2C_0],[configuration for I2C 0])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_I2C_1],[*],[])
RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_I2C_1],[configuration for I2C 1])
RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_I2C_2],[*],[])
RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_I2C_2],[configuration for I2C 2])
RTEMS_BSP_BOOTCARD_OPTIONS
RTEMS_BSP_CLEANUP_OPTIONS(0, 0)

82
c/src/lib/libbsp/arm/lpc24xx/console/console-config.c
View File

@@ -25,8 +25,6 @@
#include <bsp/lpc24xx.h>
#include <bsp/irq.h>
#define LPC24XX_UART_NUMBER 1
static uint8_t lpc24xx_uart_register( uint32_t addr, uint8_t i)
{
volatile uint32_t *reg = (volatile uint32_t *) addr;
@@ -41,13 +39,10 @@ static void lpc24xx_uart_set_register( uint32_t addr, uint8_t i, uint8_t val)
reg [i] = val;
}
unsigned long Console_Port_Count = LPC24XX_UART_NUMBER;
rtems_device_minor_number Console_Port_Minor = 0;
console_data Console_Port_Data [LPC24XX_UART_NUMBER];
console_tbl Console_Port_Tbl [LPC24XX_UART_NUMBER] = {
console_tbl Console_Port_Tbl [] = {
#ifdef LPC24XX_CONFIG_CONSOLE
{
.sDeviceName = "/dev/ttyS0",
.deviceType = SERIAL_NS16550,
@@ -66,5 +61,76 @@ console_tbl Console_Port_Tbl [LPC24XX_UART_NUMBER] = {
.setData = NULL,
.ulClock = LPC24XX_CCLK,
.ulIntVector = LPC24XX_IRQ_UART_0
}
},
#endif
#ifdef LPC24XX_CONFIG_UART_1
{
.sDeviceName = "/dev/ttyS1",
.deviceType = SERIAL_NS16550,
.pDeviceFns = &ns16550_fns,
.deviceProbe = NULL,
.pDeviceFlow = NULL,
.ulMargin = 16,
.ulHysteresis = 8,
.pDeviceParams = (void *) LPC24XX_UART_BAUD,
.ulCtrlPort1 = UART1_BASE_ADDR,
.ulCtrlPort2 = 0,
.ulDataPort = UART1_BASE_ADDR,
.getRegister = lpc24xx_uart_register,
.setRegister = lpc24xx_uart_set_register,
.getData = NULL,
.setData = NULL,
.ulClock = LPC24XX_CCLK,
.ulIntVector = LPC24XX_IRQ_UART_1
},
#endif
#ifdef LPC24XX_CONFIG_UART_2
{
.sDeviceName = "/dev/ttyS2",
.deviceType = SERIAL_NS16550,
.pDeviceFns = &ns16550_fns,
.deviceProbe = NULL,
.pDeviceFlow = NULL,
.ulMargin = 16,
.ulHysteresis = 8,
.pDeviceParams = (void *) LPC24XX_UART_BAUD,
.ulCtrlPort1 = UART2_BASE_ADDR,
.ulCtrlPort2 = 0,
.ulDataPort = UART2_BASE_ADDR,
.getRegister = lpc24xx_uart_register,
.setRegister = lpc24xx_uart_set_register,
.getData = NULL,
.setData = NULL,
.ulClock = LPC24XX_CCLK,
.ulIntVector = LPC24XX_IRQ_UART_2
},
#endif
#ifdef LPC24XX_CONFIG_UART_3
{
.sDeviceName = "/dev/ttyS3",
.deviceType = SERIAL_NS16550,
.pDeviceFns = &ns16550_fns,
.deviceProbe = NULL,
.pDeviceFlow = NULL,
.ulMargin = 16,
.ulHysteresis = 8,
.pDeviceParams = (void *) LPC24XX_UART_BAUD,
.ulCtrlPort1 = UART3_BASE_ADDR,
.ulCtrlPort2 = 0,
.ulDataPort = UART3_BASE_ADDR,
.getRegister = lpc24xx_uart_register,
.setRegister = lpc24xx_uart_set_register,
.getData = NULL,
.setData = NULL,
.ulClock = LPC24XX_CCLK,
.ulIntVector = LPC24XX_IRQ_UART_3
},
#endif
};
#define LPC24XX_UART_NUMBER \
(sizeof( Console_Port_Tbl) / sizeof( Console_Port_Tbl [0]))
unsigned long Console_Port_Count = LPC24XX_UART_NUMBER;
console_data Console_Port_Data [LPC24XX_UART_NUMBER];

8
c/src/lib/libbsp/arm/lpc24xx/include/dma.h
View File

@@ -7,8 +7,8 @@
*/
/*
* Copyright (c) 2008
* Embedded Brains GmbH
* Copyright (c) 2008, 2009
* embedded brains GmbH
* Obere Lagerstr. 30
* D-82178 Puchheim
* Germany
@@ -21,7 +21,7 @@
#ifndef LIBBSP_ARM_LPC24XX_DMA_H
#define LIBBSP_ARM_LPC24XX_DMA_H
#include <stdbool.h>
#include <rtems.h>
#ifdef __cplusplus
extern "C" {
@@ -29,7 +29,7 @@ extern "C" {
void lpc24xx_dma_initialize(void);
bool lpc24xx_dma_channel_obtain( unsigned channel);
rtems_status_code lpc24xx_dma_channel_obtain(unsigned channel);
void lpc24xx_dma_channel_release(unsigned channel);

9
c/src/lib/libbsp/arm/lpc24xx/include/irq.h
View File

@@ -66,6 +66,9 @@
#define LPC24XX_IRQ_I2C_2 30
#define LPC24XX_IRQ_I2S 31
#define LPC24XX_IRQ_PRIORITY_VALUE_MIN 0
#define LPC24XX_IRQ_PRIORITY_VALUE_MAX 15
/**
* @brief Minimum vector number.
*/
@@ -76,6 +79,12 @@
*/
#define BSP_INTERRUPT_VECTOR_MAX LPC24XX_IRQ_I2S
void bsp_interrupt_dispatch( void);
void lpc24xx_irq_set_priority( rtems_vector_number vector, unsigned priority);
unsigned lpc24xx_irq_priority( rtems_vector_number vector);
/** @} */
#endif /* ASM */

138
c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h
View File

@@ -38,7 +38,7 @@
#define VICProtection (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x020))
#define VICSWPrioMask (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x024))
#define VICVectAddrBase ((uint32_t *) (VIC_BASE_ADDR + 0x100))
#define VICVectAddrBase ((volatile uint32_t *) (VIC_BASE_ADDR + 0x100))
#define VICVectAddr0 (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x100))
#define VICVectAddr1 (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x104))
#define VICVectAddr2 (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x108))
@@ -72,8 +72,7 @@
#define VICVectAddr30 (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x178))
#define VICVectAddr31 (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x17C))
#define VICVectPriorityBase ((uint32_t *) (VIC_BASE_ADDR + 0x200))
#define VICVectPriority( i) (*((volatile uint32_t *) (VIC_BASE_ADDR + 0x200) + (i)))
#define VICVectPriorityBase ((volatile uint32_t *) (VIC_BASE_ADDR + 0x200))
#define VICVectPriority0 (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x200))
#define VICVectPriority1 (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x204))
#define VICVectPriority2 (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x208))
@@ -123,6 +122,7 @@
#define PINSEL8 (*(volatile uint32_t *) (PINSEL_BASE_ADDR + 0x20))
#define PINSEL9 (*(volatile uint32_t *) (PINSEL_BASE_ADDR + 0x24))
#define PINSEL10 (*(volatile uint32_t *) (PINSEL_BASE_ADDR + 0x28))
#define PINSEL11 (*(volatile uint32_t *) (PINSEL_BASE_ADDR + 0x2C))
#define PINMODE0 (*(volatile uint32_t *) (PINSEL_BASE_ADDR + 0x40))
#define PINMODE1 (*(volatile uint32_t *) (PINSEL_BASE_ADDR + 0x44))
@@ -794,6 +794,7 @@ Reset, and Code Security/Debugging */
#define AD0CR (*(volatile uint32_t *) (AD0_BASE_ADDR + 0x00))
#define AD0GDR (*(volatile uint32_t *) (AD0_BASE_ADDR + 0x04))
#define AD0INTEN (*(volatile uint32_t *) (AD0_BASE_ADDR + 0x0C))
#define AD0_DATA_START ((volatile uint32_t *) (AD0_BASE_ADDR + 0x10))
#define AD0DR0 (*(volatile uint32_t *) (AD0_BASE_ADDR + 0x10))
#define AD0DR1 (*(volatile uint32_t *) (AD0_BASE_ADDR + 0x14))
#define AD0DR2 (*(volatile uint32_t *) (AD0_BASE_ADDR + 0x18))
@@ -1121,64 +1122,38 @@ Reset, and Code Security/Debugging */
#define MAC_POWERDOWN (*(volatile uint32_t *) (MAC_BASE_ADDR + 0xFF4)) /* Power-down reg */
#define MAC_MODULEID (*(volatile uint32_t *) (MAC_BASE_ADDR + 0xFFC)) /* Module ID reg (RO) */
/* LCD Controller */
#define LCD_BASE_ADDR 0xFFE10000
#define LCD_CFG (*(volatile uint32_t *) 0xE01FC1B8)
#define LCD_TIMH (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x000))
#define LCD_TIMV (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x004))
#define LCD_POL (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x008))
#define LCD_LE (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x00C))
#define LCD_UPBASE (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x010))
#define LCD_LPBASE (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x014))
#define LCD_CTRL (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x018))
#define LCD_INTMSK (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x01C))
#define LCD_INTRAW (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x020))
#define LCD_INTSTAT (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x024))
#define LCD_INTCLR (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x028))
#define LCD_UPCURR (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x02C))
#define LCD_LPCURR (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x030))
#define LCD_PAL_ADDR (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x200))
#define CRSR_IMG (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x800))
#define CRSR_CTLR (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC00))
#define CRSR_CFG (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC04))
#define CRSR_PAL0 (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC08))
#define CRSR_PAL1 (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC0C))
#define CRSR_XY (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC10))
#define CRSR_CLIP (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC14))
#define CRSR_INTMSK (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC20))
#define CRSR_INTCLR (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC24))
#define CRSR_INTRAW (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC28))
#define CRSR_INTSTAT (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC2C))
/* Register Fields */
/* PCONP */
#define PCONP_PCTIM0 0x00000002U
#define PCONP_PCTIM1 0x00000004U
#define PCONP_PCUART0 0x00000008U
#define PCONP_PCUART1 0x00000010U
#define PCONP_PCPWM0 0x00000020U
#define PCONP_PCPWM1 0x00000040U
#define PCONP_PCI2C0 0x00000080U
#define PCONP_PCSPI 0x00000100U
#define PCONP_PCRTC 0x00000200U
#define PCONP_PCSSP1 0x00000400U
#define PCONP_PCEMC 0x00000800U
#define PCONP_PCAD 0x00001000U
#define PCONP_PCCAN1 0x00002000U
#define PCONP_PCCAN2 0x00004000U
#define PCONP_PCI2C1 0x00080000U
#define PCONP_PCLCD 0x00100000U
#define PCONP_PCSSP0 0x00200000U
#define PCONP_PCTIM2 0x00400000U
#define PCONP_PCTIM3 0x00800000U
#define PCONP_PCUART2 0x01000000U
#define PCONP_PCUART3 0x02000000U
#define PCONP_PCI2C2 0x04000000U
#define PCONP_PCI2S 0x08000000U
#define PCONP_PCSDC 0x10000000U
#define PCONP_PCGPDMA 0x20000000U
#define PCONP_PCENET 0x40000000U
#define PCONP_PCUSB 0x80000000U
/* CLKSRCSEL */
#define CLKSRCSEL_CLKSRC_MASK 0x00000003U
@@ -2022,6 +1997,12 @@ typedef struct {
#define ETH_CMD_FULL_DUPLEX 0x00000400U
/* ETH_STAT */
#define ETH_STAT_RX_ACTIVE 0x00000001U
#define ETH_STAT_TX_ACTIVE 0x00000002U
/* AHBCFG */
#define AHBCFG_SCHEDULER_UNIFORM 0x00000001U
@@ -2106,4 +2087,43 @@ typedef struct {
#define EMC_DYN_CTRL_CMD_NOP 0x00000180U
/* I2C */
typedef struct {
uint32_t conset;
uint32_t stat;
uint32_t dat;
uint32_t adr;
uint32_t sclh;
uint32_t scll;
uint32_t conclr;
} lpc24xx_i2c;
#define LPC24XX_I2C_AA (1U << 2U)
#define LPC24XX_I2C_SI (1U << 3U)
#define LPC24XX_I2C_STO (1U << 4U)
#define LPC24XX_I2C_STA (1U << 5U)
#define LPC24XX_I2C_EN (1U << 6U)
/* IO */
typedef struct {
uint32_t dir;
uint32_t reserved [3];
uint32_t mask;
uint32_t pin;
uint32_t set;
uint32_t clr;
} lpc24xx_fio;
static volatile uint32_t * const LPC24XX_PINSEL = &PINSEL0;
static volatile uint32_t * const LPC24XX_PINMODE = &PINMODE0;
static volatile lpc24xx_fio * const LPC24XX_FIO = (volatile lpc24xx_fio *) FIO_BASE_ADDR;
#endif /* LIBBSP_ARM_LPC24XX_LPC24XX_H */

2
c/src/lib/libbsp/arm/lpc24xx/include/system-clocks.h
View File

@@ -27,6 +27,8 @@ extern "C" {
void lpc24xx_micro_seconds_delay( unsigned us);
unsigned lpc24xx_pllclk( void);
unsigned lpc24xx_cclk( void);
void lpc24xx_set_pll( unsigned clksrc, unsigned nsel, unsigned msel, unsigned cclksel);

52
c/src/lib/libbsp/arm/lpc24xx/irq/irq.c
View File

@@ -7,8 +7,8 @@
*/
/*
* Copyright (c) 2008
* Embedded Brains GmbH
* Copyright (c) 2008, 2009
* embedded brains GmbH
* Obere Lagerstr. 30
* D-82178 Puchheim
* Germany
@@ -23,32 +23,70 @@
#include <bsp/irq-generic.h>
#include <bsp/lpc24xx.h>
void ExecuteITHandler( void)
static inline bool lpc24xx_irq_is_valid( rtems_vector_number vector)
{
return vector <= BSP_INTERRUPT_VECTOR_MAX;
}
void lpc24xx_irq_set_priority( rtems_vector_number vector, unsigned priority)
{
if (lpc24xx_irq_is_valid( vector)) {
if (priority > LPC24XX_IRQ_PRIORITY_VALUE_MAX) {
priority = LPC24XX_IRQ_PRIORITY_VALUE_MAX;
}
VICVectPriorityBase [vector] = priority;
}
}
unsigned lpc24xx_irq_priority( rtems_vector_number vector)
{
if (lpc24xx_irq_is_valid( vector)) {
return VICVectPriorityBase [vector];
} else {
return LPC24XX_IRQ_PRIORITY_VALUE_MIN - 1;
}
}
void bsp_interrupt_dispatch( void)
{
/* Read current vector number */
rtems_vector_number vector = VICVectAddr;
/* Acknowledge interrupt */
VICVectAddr = 0;
/* Enable interrupts in program status register */
uint32_t psr = arm_status_irq_enable();
/* Dispatch interrupt handlers */
bsp_interrupt_handler_dispatch( vector);
/* Restore program status register */
arm_status_restore( psr);
/* Acknowledge interrupt */
VICVectAddr = 0;
}
rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number vector)
{
if (lpc24xx_irq_is_valid( vector)) {
VICIntEnable = 1U << vector;
}
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number vector)
{
if (lpc24xx_irq_is_valid( vector)) {
VICIntEnClear = 1U << vector;
}
return RTEMS_SUCCESSFUL;
}
/* FIXME */
void arm_exc_interrupt( void);
rtems_status_code bsp_interrupt_facility_initialize( void)
{
volatile uint32_t *addr = VICVectAddrBase;
@@ -79,12 +117,12 @@ rtems_status_code bsp_interrupt_facility_initialize( void)
VICVectAddr = 0;
/* Install the IRQ exception handler */
_CPU_ISR_install_vector( ARM_EXCEPTION_IRQ, _ISR_Handler, NULL);
_CPU_ISR_install_vector( ARM_EXCEPTION_IRQ, arm_exc_interrupt, NULL);
return RTEMS_SUCCESSFUL;
}
void bsp_interrupt_handler_default( rtems_vector_number vector)
{
printk( "Spurious interrupt: %u\n", vector);
printk( "spurious interrupt: %u\n", vector);
}

50
c/src/lib/libbsp/arm/lpc24xx/misc/dma.c
View File

@@ -7,8 +7,8 @@
*/
/*
* Copyright (c) 2008
* Embedded Brains GmbH
* Copyright (c) 2008, 2009
* embedded brains GmbH
* Obere Lagerstr. 30
* D-82178 Puchheim
* Germany
@@ -22,6 +22,7 @@
#include <bsp/lpc24xx.h>
#include <bsp/dma.h>
#include <bsp/io.h>
/**
* @brief Table that indicates if a channel is currently occupied.
@@ -35,10 +36,8 @@ void lpc24xx_dma_initialize( void)
{
rtems_interrupt_level level;
/* Enable power */
rtems_interrupt_disable( level);
PCONP = SET_FLAG( PCONP, PCONP_PCGPDMA);
rtems_interrupt_enable( level);
/* Enable module power */
lpc24xx_module_enable(LPC24XX_MODULE_GPDMA, 0, LPC24XX_MODULE_PCLK_DEFAULT);
/* Disable module */
GPDMA_CONFIG = 0;
@@ -59,50 +58,51 @@ void lpc24xx_dma_initialize( void)
}
/**
* @brief Returns true if the channel @a channel was obtained.
* @brief Tries to obtain the channel @a channel.
*
* If the channel number @a channel is out of range the last valid channel will
* be used.
* @retval RTEMS_SUCCESSFUL Successful operation.
* @retval RTEMS_INVALID_ID Invalid channel number.
* @retval RTEMS_RESOURCE_IN_USE Channel already occupied.
*/
bool lpc24xx_dma_channel_obtain( unsigned channel)
rtems_status_code lpc24xx_dma_channel_obtain(unsigned channel)
{
if (channel < GPDMA_CH_NUMBER) {
rtems_interrupt_level level;
bool occupation = true;
if (channel > GPDMA_CH_NUMBER) {
channel = GPDMA_CH_NUMBER - 1;
}
rtems_interrupt_disable(level);
occupation = lpc24xx_dma_channel_occupation [channel];
lpc24xx_dma_channel_occupation [channel] = true;
rtems_interrupt_enable(level);
return !occupation;
return occupation ? RTEMS_RESOURCE_IN_USE : RTEMS_SUCCESSFUL;
} else {
return RTEMS_INVALID_ID;
}
}
/**
* @brief Releases the channel @a channel. You must have obtained this channel
* with lpc24xx_dma_channel_obtain() previously.
* @brief Releases the channel @a channel.
*
* If the channel number @a channel is out of range the last valid channel will
* be used.
* You must have obtained this channel with lpc24xx_dma_channel_obtain()
* previously.
*
* If the channel number @a channel is out of range nothing will happen.
*/
void lpc24xx_dma_channel_release(unsigned channel)
{
if (channel > GPDMA_CH_NUMBER) {
channel = GPDMA_CH_NUMBER - 1;
}
if (channel < GPDMA_CH_NUMBER) {
lpc24xx_dma_channel_occupation [channel] = false;
}
}
/**
* @brief Disables the channel @a channel.
*
* If @a force is false the channel will be halted and disabled when the
* channel is inactive. If the channel number @a channel is out of range the
* last valid channel will be used.
* channel is inactive.
*
* If the channel number @a channel is out of range the behaviour is undefined.
*/
void lpc24xx_dma_channel_disable(unsigned channel, bool force)
{

24
c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c
View File

@@ -68,16 +68,15 @@ void lpc24xx_micro_seconds_delay( unsigned us)
}
/**
* @brief Returns the CPU clock frequency in [Hz].
* @brief Returns the PLL output clock frequency in [Hz].
*
* Return zero in case of an unexpected PLL input frequency.
* Returns zero in case of an unexpected PLL input frequency.
*/
unsigned lpc24xx_cclk( void)
unsigned lpc24xx_pllclk( void)
{
unsigned clksrc = GET_CLKSRCSEL_CLKSRC( CLKSRCSEL);
unsigned pllinclk = 0;
unsigned pllclk = 0;
unsigned cclk = 0;
/* Get PLL input frequency */
switch (clksrc) {
@@ -105,8 +104,21 @@ unsigned lpc24xx_cclk( void)
pllclk = pllinclk;
}
/* Get CPU clock frequency */
cclk = pllclk / (GET_CCLKCFG_CCLKSEL( CCLKCFG) + 1);
return pllclk;
}
/**
* @brief Returns the CPU clock frequency in [Hz].
*
* Returns zero in case of an unexpected PLL input frequency.
*/
unsigned lpc24xx_cclk( void)
{
/* Get PLL output frequency */
unsigned pllclk = lpc24xx_pllclk();
/* Get CPU frequency */
unsigned cclk = pllclk / (GET_CCLKCFG_CCLKSEL( CCLKCFG) + 1);
return cclk;
}

204
c/src/lib/libbsp/arm/lpc24xx/network/network.c
View File

@@ -43,6 +43,7 @@
#include <bsp.h>
#include <bsp/lpc24xx.h>
#include <bsp/irq.h>
#include <bsp/io.h>
#include <bsp/utility.h>
#include <rtems/status-checks.h>
@@ -141,22 +142,17 @@ static char lpc24xx_eth_transmit_buffer [LPC24XX_ETH_TRANSMIT_DATA_SIZE];
(LPC24XX_ETH_TRANSMIT_STATUS_START \
+ LPC24XX_ETH_TRANSMIT_UNIT_NUMBER * ETH_TRANSMIT_STATUS_SIZE)
#define LPC24XX_ETH_EVENT_TRANSMIT RTEMS_EVENT_1
#define LPC24XX_ETH_EVENT_INITIALIZE RTEMS_EVENT_1
#define LPC24XX_ETH_EVENT_TRANSMIT_START RTEMS_EVENT_2
#define LPC24XX_ETH_EVENT_START RTEMS_EVENT_2
#define LPC24XX_ETH_EVENT_TRANSMIT_ERROR RTEMS_EVENT_3
#define LPC24XX_ETH_EVENT_RECEIVE RTEMS_EVENT_4
#define LPC24XX_ETH_EVENT_RECEIVE_ERROR RTEMS_EVENT_5
#define LPC24XX_ETH_TIMEOUT 10
#define LPC24XX_ETH_EVENT_INTERRUPT RTEMS_EVENT_3
#define LPC24XX_ETH_INTERRUPT_RECEIVE \
(ETH_INT_RX_ERROR | ETH_INT_RX_FINISHED | ETH_INT_RX_DONE)
#define LPC24XX_ETH_INTERRUPT_TRANSMIT (ETH_INT_TX_DONE | ETH_INT_TX_FINISHED | ETH_INT_TX_ERROR)
#define LPC24XX_ETH_INTERRUPT_TRANSMIT \
(ETH_INT_TX_DONE | ETH_INT_TX_FINISHED | ETH_INT_TX_ERROR)
#define LPC24XX_ETH_RX_STAT_ERRORS \
(ETH_RX_STAT_CRC_ERROR \
@@ -272,13 +268,10 @@ static void lpc24xx_eth_interrupt_handler(
/* Check receive interrupts */
if (IS_FLAG_SET( is, ETH_INT_RX_OVERRUN)) {
re = LPC24XX_ETH_EVENT_RECEIVE_ERROR;
re = LPC24XX_ETH_EVENT_INITIALIZE;
++e->receive_fatal_errors;
/* FIXME */
printk( "%s: fatal receive error\n", __func__);
while (1);
} else if (IS_ANY_FLAG_SET( is, LPC24XX_ETH_INTERRUPT_RECEIVE)) {
re = LPC24XX_ETH_EVENT_RECEIVE;
re = LPC24XX_ETH_EVENT_INTERRUPT;
ie = SET_FLAGS( ie, LPC24XX_ETH_INTERRUPT_RECEIVE);
}
@@ -290,13 +283,10 @@ static void lpc24xx_eth_interrupt_handler(
/* Check transmit interrupts */
if (IS_FLAG_SET( is, ETH_INT_TX_UNDERRUN)) {
te = LPC24XX_ETH_EVENT_TRANSMIT_ERROR;
te = LPC24XX_ETH_EVENT_INITIALIZE;
++e->transmit_fatal_errors;
/* FIXME */
printk( "%s: fatal transmit error\n", __func__);
while (1);
} else if (IS_ANY_FLAG_SET( is, LPC24XX_ETH_INTERRUPT_TRANSMIT)) {
te = LPC24XX_ETH_EVENT_TRANSMIT;
te = LPC24XX_ETH_EVENT_INTERRUPT;
ie = SET_FLAGS( ie, LPC24XX_ETH_INTERRUPT_TRANSMIT);
}
@@ -379,7 +369,7 @@ static bool lpc24xx_eth_add_new_mbuf(
struct ifnet *ifp,
volatile lpc24xx_eth_transfer_descriptor *desc,
struct mbuf **mbuf_table,
unsigned i,
uint32_t i,
bool wait
)
{
@@ -416,24 +406,61 @@ static void lpc24xx_eth_receive_task( void *arg)
LPC24XX_ETH_RECEIVE_INFO_START;
struct mbuf **const mbuf_table =
(struct mbuf **) LPC24XX_ETH_RECEIVE_MBUF_START;
uint32_t index_max = e->receive_unit_number - 1;
uint32_t index_max = 0;
uint32_t produce_index = 0;
uint32_t consume_index = 0;
uint32_t receive_index = 0;
LPC24XX_ETH_PRINTF( "%s\n", __func__);
/* Main event loop */
while (true) {
bool wait_for_mbuf = false;
/* Wait for events */
sc = rtems_bsdnet_event_receive(
LPC24XX_ETH_EVENT_INITIALIZE | LPC24XX_ETH_EVENT_INTERRUPT,
RTEMS_EVENT_ANY | RTEMS_WAIT,
RTEMS_NO_TIMEOUT,
&events
);
RTEMS_CLEANUP_SC( sc, cleanup, "wait for events");
LPC24XX_ETH_PRINTF( "rx: wake up: 0x%08" PRIx32 "\n", events);
/* Initialize receiver? */
if (IS_FLAG_SET( events, LPC24XX_ETH_EVENT_INITIALIZE)) {
/* Disable receive interrupts */
lpc24xx_eth_disable_receive_interrupts();
/* Disable receiver */
MAC_COMMAND = CLEAR_FLAG( MAC_COMMAND, ETH_CMD_RX_ENABLE);
/* Wait for inactive status */
while (IS_FLAG_SET( MAC_STATUS, ETH_STAT_RX_ACTIVE)) {
/* Wait */
}
/* Reset */
MAC_COMMAND = SET_FLAG( MAC_COMMAND, ETH_CMD_RX_RESET);
/* Clear receive interrupts */
MAC_INTCLEAR = LPC24XX_ETH_INTERRUPT_RECEIVE;
/* Fill receive queue */
/* Index maximum (determines queue size) */
index_max = e->receive_unit_number - 1;
/* Move existing mbufs to the front */
consume_index = 0;
for (produce_index = 0; produce_index <= index_max; ++produce_index) {
if (mbuf_table [produce_index] != NULL) {
mbuf_table [consume_index] = mbuf_table [produce_index];
++consume_index;
}
}
/* Fill receive queue */
for (produce_index = consume_index; produce_index <= index_max; ++produce_index) {
if (
!lpc24xx_eth_add_new_mbuf( ifp, desc, mbuf_table, produce_index, false)
) {
@@ -445,13 +472,13 @@ static void lpc24xx_eth_receive_task( void *arg)
if (produce_index == 0) {
RTEMS_DO_CLEANUP(
cleanup,
"no buffers to fill receive queue: terminate receive task\n"
"no mbufs to fill receive queue: terminate receive task\n"
);
} else if (produce_index <= index_max) {
/* Reduce the queue size */
index_max = produce_index - 1;
RTEMS_SYSLOG_ERROR( "not enough buffers to fill receive queue");
RTEMS_SYSLOG_ERROR( "not enough mbufs to fill receive queue");
}
/* Receive descriptor table */
@@ -470,20 +497,9 @@ static void lpc24xx_eth_receive_task( void *arg)
/* Enable receive interrupts */
lpc24xx_eth_enable_receive_interrupts();
/* Main event loop */
while (true) {
bool wait_for_mbuf = false;
/* Wait for events */
sc = rtems_bsdnet_event_receive(
LPC24XX_ETH_EVENT_RECEIVE,
RTEMS_EVENT_ANY | RTEMS_WAIT,
RTEMS_NO_TIMEOUT,
&events
);
RTEMS_CLEANUP_SC( sc, cleanup, "wait for events");
LPC24XX_ETH_PRINTF( "rx: wake up: 0x%08" PRIx32 "\n", events);
continue;
}
while (true) {
/* Clear receive interrupt status */
@@ -497,6 +513,9 @@ static void lpc24xx_eth_receive_task( void *arg)
struct mbuf *m = mbuf_table [receive_index];
uint32_t stat = info [receive_index].status;
/* Remove mbuf from table */
mbuf_table [receive_index] = NULL;
if (
IS_FLAG_SET( stat, ETH_RX_STAT_LAST_FLAG)
&& ARE_FLAGS_CLEARED( stat, LPC24XX_ETH_RX_STAT_ERRORS)
@@ -585,6 +604,9 @@ static void lpc24xx_eth_receive_task( void *arg)
cleanup:
/* Clear task ID */
e->receive_task = RTEMS_ID_NONE;
/* Release network semaphore */
rtems_bsdnet_semaphore_release();
@@ -665,22 +687,46 @@ static void lpc24xx_eth_transmit_task( void *arg)
LPC24XX_ETH_PRINTF( "%s\n", __func__);
/* Initialize descriptor table */
for (produce_index = 0; produce_index <= index_max; ++produce_index) {
desc [produce_index].start =
(uint32_t) (buf + produce_index * LPC24XX_ETH_TRANSMIT_BUFFER_SIZE);
}
/* Main event loop */
while (true) {
/* Wait for events */
sc = rtems_bsdnet_event_receive(
LPC24XX_ETH_EVENT_INITIALIZE
| LPC24XX_ETH_EVENT_START
| LPC24XX_ETH_EVENT_INTERRUPT,
RTEMS_EVENT_ANY | RTEMS_WAIT,
RTEMS_NO_TIMEOUT,
&events
);
RTEMS_CLEANUP_SC( sc, cleanup, "wait for events");
LPC24XX_ETH_PRINTF( "tx: wake up: 0x%08" PRIx32 "\n", events);
/* Initialize transmitter? */
if (IS_FLAG_SET( events, LPC24XX_ETH_EVENT_INITIALIZE)) {
/* Disable transmit interrupts */
lpc24xx_eth_disable_transmit_interrupts();
/* Disable transmitter */
MAC_COMMAND = CLEAR_FLAG( MAC_COMMAND, ETH_CMD_TX_ENABLE);
/* Wait for inactive status */
while (IS_FLAG_SET( MAC_STATUS, ETH_STAT_TX_ACTIVE)) {
/* Wait */
}
/* Reset */
MAC_COMMAND = SET_FLAG( MAC_COMMAND, ETH_CMD_TX_RESET);
/* Clear transmit interrupts */
MAC_INTCLEAR = LPC24XX_ETH_INTERRUPT_TRANSMIT;
/* Initialize descriptor table */
for (produce_index = 0; produce_index <= index_max; ++produce_index) {
desc [produce_index].start =
(uint32_t) (buf + produce_index * LPC24XX_ETH_TRANSMIT_BUFFER_SIZE);
desc [produce_index].control = 0;
}
/* Transmit descriptors */
MAC_TXDESCRIPTORNUM = index_max;
MAC_TXDESCRIPTOR = (uint32_t) desc;
@@ -695,19 +741,7 @@ static void lpc24xx_eth_transmit_task( void *arg)
/* Enable transmitter */
MAC_COMMAND = SET_FLAG( MAC_COMMAND, ETH_CMD_TX_ENABLE);
/* Main event loop */
while (true) {
/* Wait for events */
sc = rtems_bsdnet_event_receive(
LPC24XX_ETH_EVENT_TRANSMIT | LPC24XX_ETH_EVENT_TRANSMIT_START,
RTEMS_EVENT_ANY | RTEMS_WAIT,
RTEMS_NO_TIMEOUT,
&events
);
RTEMS_CLEANUP_SC( sc, cleanup, "wait for events");
LPC24XX_ETH_PRINTF( "tx: wake up: 0x%08" PRIx32 "\n", events);
}
/* Free consumed fragments */
while (true) {
@@ -749,9 +783,6 @@ static void lpc24xx_eth_transmit_task( void *arg)
}
}
/* Reinitialize control field */
desc [c].control = 0;
/* Next consume index */
c = lpc24xx_eth_increment( c, index_max);
}
@@ -849,6 +880,9 @@ static void lpc24xx_eth_transmit_task( void *arg)
cleanup:
/* Clear task ID */
e->transmit_task = RTEMS_ID_NONE;
/* Release network semaphore */
rtems_bsdnet_semaphore_release();
@@ -858,6 +892,7 @@ cleanup:
static void lpc24xx_eth_interface_init( void *arg)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
lpc24xx_eth_driver_entry *e = (lpc24xx_eth_driver_entry *) arg;
struct ifnet *ifp = &e->arpcom.ac_if;
@@ -865,28 +900,25 @@ static void lpc24xx_eth_interface_init( void *arg)
if (e->state == LPC24XX_ETH_INITIALIZED) {
#ifndef LPC24XX_HAS_UBOOT
rtems_interrupt_level level;
/* Enable module power */
lpc24xx_module_enable(
LPC24XX_MODULE_ETHERNET,
0,
LPC24XX_MODULE_PCLK_DEFAULT
);
rtems_interrupt_disable( level);
/* Enable power */
PCONP = SET_FLAGS( PCONP, 0x40000000);
/* Set PIN selects */
/* Module IO configuration */
#ifdef LPC24XX_ETHERNET_RMII
PINSEL2 = SET_FLAGS( PINSEL2, 0x55555555);
lpc24xx_io_config( LPC24XX_MODULE_ETHERNET, 0, 0);
#else
PINSEL2 = SET_FLAGS( PINSEL2, 0x50150105);
lpc24xx_io_config( LPC24XX_MODULE_ETHERNET, 0, 1);
#endif
PINSEL3 = SET_FLAGS( PINSEL3, 0x05);
rtems_interrupt_enable( level);
/* Soft reset */
/* Do soft reset */
MAC_MAC1 = 0xcf00;
MAC_COMMAND = 0x38;
MAC_MAC1 = 0xcf00;
/* Initialize PHY */
/* TODO */
@@ -919,18 +951,14 @@ static void lpc24xx_eth_interface_init( void *arg)
/* Enable receiver */
MAC_MAC1 = 0x03;
#else /* LPC24XX_HAS_UBOOT */
uint32_t reg = 0;
/* TODO */
/* Reset receiver and transmitter */
MAC_COMMAND = SET_FLAGS(
MAC_COMMAND,
ETH_CMD_RX_RESET | ETH_CMD_TX_RESET | ETH_CMD_REG_RESET
);
/* MAC configuration */
MAC_MAC1 = 0x3;
/* Disable and reset receiver and transmitter */
reg = MAC_COMMAND;
reg = CLEAR_FLAGS( reg, ETH_CMD_RX_ENABLE | ETH_CMD_TX_ENABLE);
reg = SET_FLAGS( reg, ETH_CMD_RX_RESET | ETH_CMD_TX_RESET);
MAC_COMMAND = reg;
#endif /* LPC24XX_HAS_UBOOT */
/* Start receive task */
@@ -941,6 +969,8 @@ static void lpc24xx_eth_interface_init( void *arg)
lpc24xx_eth_receive_task,
e
);
sc = rtems_event_send( e->receive_task, LPC24XX_ETH_EVENT_INITIALIZE);
RTEMS_SYSLOG_ERROR_SC( sc, "send receive initialize event");
}
/* Start transmit task */
@@ -951,6 +981,8 @@ static void lpc24xx_eth_interface_init( void *arg)
lpc24xx_eth_transmit_task,
e
);
sc = rtems_event_send( e->transmit_task, LPC24XX_ETH_EVENT_INITIALIZE);
RTEMS_SYSLOG_ERROR_SC( sc, "send transmit initialize event");
}
/* Change state */
@@ -983,6 +1015,8 @@ static void lpc24xx_eth_interface_init( void *arg)
static void lpc24xx_eth_interface_stats( const lpc24xx_eth_driver_entry *e)
{
rtems_bsdnet_semaphore_release();
printf( "received frames: %u\n", e->received_frames);
printf( "receive interrupts: %u\n", e->receive_interrupts);
printf( "transmitted frames: %u\n", e->transmitted_frames);
@@ -1002,6 +1036,8 @@ static void lpc24xx_eth_interface_stats( const lpc24xx_eth_driver_entry *e)
printf( "transmit no descriptor errors: %u\n", e->transmit_no_descriptor_errors);
printf( "transmit overflow errors: %u\n", e->transmit_overflow_errors);
printf( "transmit fatal errors: %u\n", e->transmit_fatal_errors);
rtems_bsdnet_semaphore_obtain();
}
static int lpc24xx_eth_interface_ioctl(
@@ -1051,7 +1087,7 @@ static void lpc24xx_eth_interface_start( struct ifnet *ifp)
ifp->if_flags = SET_FLAG( ifp->if_flags, IFF_OACTIVE);
sc = rtems_event_send( e->transmit_task, LPC24XX_ETH_EVENT_TRANSMIT_START);
sc = rtems_event_send( e->transmit_task, LPC24XX_ETH_EVENT_START);
RTEMS_SYSLOG_ERROR_SC( sc, "send transmit start event");
}

20
c/src/lib/libbsp/arm/lpc24xx/preinstall.am
View File

@@ -65,6 +65,10 @@ $(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INC
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h
$(PROJECT_INCLUDE)/bsp/stackalloc.h: ../../shared/include/stackalloc.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/stackalloc.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/stackalloc.h
$(PROJECT_INCLUDE)/bsp/tod.h: ../../shared/tod.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/tod.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/tod.h
@@ -101,6 +105,18 @@ $(PROJECT_INCLUDE)/bsp/dma.h: include/dma.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/dma.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/dma.h
$(PROJECT_INCLUDE)/bsp/idle.h: include/idle.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/idle.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/idle.h
$(PROJECT_INCLUDE)/bsp/i2c.h: include/i2c.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/i2c.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/i2c.h
$(PROJECT_INCLUDE)/bsp/io.h: include/io.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/io.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/io.h
$(PROJECT_INCLUDE)/tm27.h: ../../shared/include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
@@ -113,10 +129,6 @@ $(PROJECT_LIB)/linkcmds.base: ../shared/startup/linkcmds.base $(PROJECT_LIB)/$(d
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.base
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.base
$(PROJECT_LIB)/linkcmds.rom: ../shared/startup/linkcmds.rom $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.rom
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.rom
$(PROJECT_LIB)/linkcmds.lpc2478: startup/linkcmds.lpc2478 $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.lpc2478
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.lpc2478

6
c/src/lib/libbsp/arm/lpc24xx/rtc/rtc-config.c
View File

@@ -21,11 +21,17 @@
#include <libchip/rtc.h>
#include <bsp/lpc24xx.h>
#include <bsp/io.h>
#define LPC24XX_RTC_NUMBER 1
static void lpc24xx_rtc_initialize( int minor)
{
rtems_interrupt_level level;
/* Enable module power */
lpc24xx_module_enable( LPC24XX_MODULE_RTC, 0, LPC24XX_MODULE_PCLK_DEFAULT);
/* Enable the RTC and use external clock */
RTC_CCR = RTC_CCR_CLKEN | RTC_CCR_CLKSRC;

19
c/src/lib/libbsp/arm/lpc24xx/startup/bspreset.c
View File

@@ -18,10 +18,25 @@
* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
*/
#include <rtems.h>
#include <bsp/bootcard.h>
#include <bsp/start.h>
#include <bsp/lpc24xx.h>
void bsp_reset( void)
{
start();
rtems_interrupt_level level;
rtems_interrupt_disable( level);
/* Trigger watchdog reset */
WDCLKSEL = 0;
WDTC = 0xff;
WDMOD = 0x3;
WDFEED = 0xaa;
WDFEED = 0x55;
while (true) {
/* Do nothing */
}
}

122
c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c
View File

@@ -23,9 +23,12 @@
#include <bsp.h>
#include <bsp/bootcard.h>
#include <bsp/dma.h>
#include <bsp/io.h>
#include <bsp/irq-generic.h>
#include <bsp/irq.h>
#include <bsp/linker-symbols.h>
#include <bsp/lpc24xx.h>
#include <bsp/stackalloc.h>
#include <bsp/start.h>
#include <bsp/system-clocks.h>
@@ -38,15 +41,17 @@ static void lpc24xx_fatal_error( void)
static void lpc24xx_ram_test_32( void)
{
volatile unsigned *out = (volatile unsigned *) bsp_ram_ext_start;
const unsigned *end = (const unsigned *) bsp_region_data_end;
unsigned *begin = (unsigned *) bsp_region_data_begin;
unsigned *out = begin;
while (out < (volatile unsigned *) bsp_ram_ext_end) {
while (out != end) {
*out = (unsigned) out;
++out;
}
out = (volatile unsigned *) bsp_ram_ext_start;
while (out < (volatile unsigned *) bsp_ram_ext_end) {
out = begin;
while (out != end) {
if (*out != (unsigned) out) {
lpc24xx_fatal_error();
}
@@ -65,14 +70,11 @@ static void lpc24xx_init_emc( void)
int i = 0;
uint32_t mode = 0;
/* Enable power */
PCONP = SET_FLAGS( PCONP, 0x0800);
/* Enable module power */
lpc24xx_module_enable( LPC24XX_MODULE_EMC, 0, LPC24XX_MODULE_PCLK_DEFAULT);
/* Set PIN selects */
PINSEL5 = SET_FLAGS( PINSEL5, 0x05050555);
PINSEL6 = SET_FLAGS( PINSEL6, 0x55555555);
PINSEL8 = SET_FLAGS( PINSEL8, 0x55555555);
PINSEL9 = SET_FLAGS( PINSEL9, 0x50555555);
/* IO configuration */
lpc24xx_io_config( LPC24XX_MODULE_EMC, 0, 0);
/* Enable module, normal memory map and normal power mode */
EMC_CTRL = 1;
@@ -166,14 +168,8 @@ static void lpc24xx_init_emc( void)
/* Enable buffer */
EMC_DYN_CFG0 |= 0x00080000;
/* Static Memory 0 settings */
EMC_STA_WAITWEN0 = 0x02;
EMC_STA_WAITOEN0 = 0x02;
EMC_STA_WAITRD0 = 0x1f;
EMC_STA_WAITPAGE0 = 0x1f;
EMC_STA_WAITWR0 = 0x1f;
EMC_STA_WAITTURN0 = 0x0f;
EMC_STA_CFG0 = 0x81;
/* Extended wait register */
EMC_STA_EXT_WAIT = 0;
/* Static Memory 1 settings */
EMC_STA_WAITWEN1 = 0x02;
@@ -182,25 +178,25 @@ static void lpc24xx_init_emc( void)
EMC_STA_WAITPAGE1 = 0x1f;
EMC_STA_WAITWR1 = 0x08;
EMC_STA_WAITTURN1 = 0x0f;
EMC_STA_CFG1 = 0x80;
EMC_STA_CFG1 = 0x81;
/* RAM test */
lpc24xx_ram_test_32();
#endif /* LPC24XX_EMC_MICRON */
#endif
}
static void lpc24xx_init_pll( void)
{
#ifndef LPC24XX_HAS_UBOOT
/* Enable main oscillator */
SCS = SET_FLAGS( SCS, 0x20);
SCS = SET_FLAG( SCS, 0x20);
while (IS_FLAG_CLEARED( SCS, 0x40)) {
/* Wait */
}
/* Set PLL */
lpc24xx_set_pll( 1, 0, 11, 3);
#endif /* LPC24XX_HAS_UBOOT */
#endif
}
void /* __attribute__ ((section (".entry"))) */ bsp_start_hook_0( void)
@@ -221,6 +217,19 @@ void /* __attribute__ ((section (".entry"))) */ bsp_start_hook_0( void)
PINSEL8 = 0;
PINSEL9 = 0;
PINSEL10 = 0;
PINSEL11 = 0;
/* Set pin modes */
PINMODE0 = 0;
PINMODE1 = 0;
PINMODE2 = 0;
PINMODE3 = 0;
PINMODE4 = 0;
PINMODE5 = 0;
PINMODE6 = 0;
PINMODE7 = 0;
PINMODE8 = 0;
PINMODE9 = 0;
/* Set periperal clocks */
PCLKSEL0 = 0;
@@ -233,11 +242,8 @@ void /* __attribute__ ((section (".entry"))) */ bsp_start_hook_0( void)
MAMCR = 0;
MAMTIM = 4;
/* Set general purpose IO */
IODIR0 = 0;
IODIR1 = 0;
IOSET0 = 0xffffffff;
IOSET1 = 0xffffffff;
/* Enable fast IO for ports 0 and 1 */
SCS = SET_FLAG( SCS, 0x1);
/* Set fast IO */
FIO0DIR = 0;
@@ -245,16 +251,16 @@ void /* __attribute__ ((section (".entry"))) */ bsp_start_hook_0( void)
FIO2DIR = 0;
FIO3DIR = 0;
FIO4DIR = 0;
FIO0SET = 0xffffffff;
FIO1SET = 0xffffffff;
FIO2SET = 0xffffffff;
FIO3SET = 0xffffffff;
FIO4SET = 0xffffffff;
FIO0CLR = 0xffffffff;
FIO1CLR = 0xffffffff;
FIO2CLR = 0xffffffff;
FIO3CLR = 0xffffffff;
FIO4CLR = 0xffffffff;
/* Initialize UART 0 */
PCONP = SET_FLAGS( PCONP, 0x08);
PCLKSEL0 = SET_FLAGS( PCLKSEL0, 0x40);
PINSEL0 = SET_FLAGS( PINSEL0, 0x50);
/* Initialize console */
#ifdef LPC24XX_CONFIG_CONSOLE
lpc24xx_module_enable( LPC24XX_MODULE_UART, 0, LPC24XX_MODULE_CCLK);
lpc24xx_io_config( LPC24XX_MODULE_UART, 0, LPC24XX_CONFIG_CONSOLE);
U0LCR = 0;
U0IER = 0;
U0LCR = 0x80;
@@ -262,34 +268,36 @@ void /* __attribute__ ((section (".entry"))) */ bsp_start_hook_0( void)
U0DLM = 0;
U0LCR = 0x03;
U0FCR = 0x07;
#endif
/* Initialize Timer 1 */
PCONP = SET_FLAGS( PCONP, 0x04);
PCLKSEL0 = SET_FLAGS( PCLKSEL0, 0x10);
#endif /* LPC24XX_HAS_UBOOT */
lpc24xx_module_enable( LPC24XX_MODULE_TIMER, 1, LPC24XX_MODULE_CCLK);
#endif
}
static void lpc24xx_copy_data( void)
{
#ifndef LPC24XX_HAS_UBOOT
unsigned *in = bsp_section_text_end;
unsigned *out = bsp_section_data_start;
const unsigned *end = (const unsigned *) bsp_section_data_end;
unsigned *in = (unsigned *) bsp_section_data_load_begin;
unsigned *out = (unsigned *) bsp_section_data_begin;
/* Copy data */
while (out < bsp_section_data_end) {
while (out != end) {
*out = *in;
++out;
++in;
}
#endif /* LPC24XX_HAS_UBOOT */
#endif
}
static void lpc24xx_clear_bss( void)
{
unsigned *out = bsp_section_bss_start;
const unsigned *end = (const unsigned *) bsp_section_bss_end;
unsigned *out = (unsigned *) bsp_section_bss_begin;
/* Clear BSS */
while (out < bsp_section_bss_end) {
while (out != end) {
*out = 0;
++out;
}
@@ -315,7 +323,9 @@ void bsp_start( void)
printk( "CPU clock (CCLK): %u\n", lpc24xx_cclk());
/* Exceptions */
/* FIXME
rtems_exception_init_mngt();
*/
/* Interrupts */
if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
@@ -326,6 +336,26 @@ void bsp_start( void)
/* DMA */
lpc24xx_dma_initialize();
/* Task stacks */
bsp_stack_initialize(
bsp_section_stack_begin,
(intptr_t) bsp_section_stack_size
);
/* UART configurations */
#ifdef LPC24XX_CONFIG_UART_1
lpc24xx_module_enable( LPC24XX_MODULE_UART, 1, LPC24XX_MODULE_CCLK);
lpc24xx_io_config( LPC24XX_MODULE_UART, 1, LPC24XX_CONFIG_UART_1);
#endif
#ifdef LPC24XX_CONFIG_UART_2
lpc24xx_module_enable( LPC24XX_MODULE_UART, 2, LPC24XX_MODULE_CCLK);
lpc24xx_io_config( LPC24XX_MODULE_UART, 2, LPC24XX_CONFIG_UART_2);
#endif
#ifdef LPC24XX_CONFIG_UART_3
lpc24xx_module_enable( LPC24XX_MODULE_UART, 3, LPC24XX_MODULE_CCLK);
lpc24xx_io_config( LPC24XX_MODULE_UART, 3, LPC24XX_CONFIG_UART_3);
#endif
}
#define ULSR_THRE 0x00000020U

14
c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds
View File

@@ -10,4 +10,18 @@ MEMORY {
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", RAM_EXT);
REGION_ALIAS ("REGION_VECTOR", RAM_INT);
REGION_ALIAS ("REGION_TEXT", RAM_EXT);
REGION_ALIAS ("REGION_TEXT_LOAD", RAM_EXT);
REGION_ALIAS ("REGION_RODATA", RAM_EXT);
REGION_ALIAS ("REGION_RODATA_LOAD", RAM_EXT);
REGION_ALIAS ("REGION_DATA", RAM_EXT);
REGION_ALIAS ("REGION_DATA_LOAD", RAM_EXT);
REGION_ALIAS ("REGION_FAST", RAM_INT);
REGION_ALIAS ("REGION_FAST_LOAD", RAM_INT);
REGION_ALIAS ("REGION_BSS", RAM_EXT);
REGION_ALIAS ("REGION_WORK", RAM_EXT);
REGION_ALIAS ("REGION_STACK", RAM_INT);
INCLUDE linkcmds.base

14
c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2478
View File

@@ -11,4 +11,18 @@ MEMORY {
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", RAM_EXT);
REGION_ALIAS ("REGION_VECTOR", RAM_INT);
REGION_ALIAS ("REGION_TEXT", RAM_EXT);
REGION_ALIAS ("REGION_TEXT_LOAD", RAM_EXT);
REGION_ALIAS ("REGION_RODATA", RAM_EXT);
REGION_ALIAS ("REGION_RODATA_LOAD", RAM_EXT);
REGION_ALIAS ("REGION_DATA", RAM_EXT);
REGION_ALIAS ("REGION_DATA_LOAD", RAM_EXT);
REGION_ALIAS ("REGION_FAST", RAM_INT);
REGION_ALIAS ("REGION_FAST_LOAD", RAM_INT);
REGION_ALIAS ("REGION_BSS", RAM_EXT);
REGION_ALIAS ("REGION_WORK", RAM_EXT);
REGION_ALIAS ("REGION_STACK", RAM_INT);
INCLUDE linkcmds.base

23
c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2478_ncs
View File

@@ -1,14 +1,29 @@
/**
* @file
*
* LPC2478 (NCS).
* LPC2478 (NCS, bootloader configuration).
*/
MEMORY {
RAM_INT (AIW) : ORIGIN = 0x40000000, LENGTH = 64k
RAM_EXT (AIW) : ORIGIN = 0xa0400000, LENGTH = 4M
RAM_VEC (AIW) : ORIGIN = 0x40000000, LENGTH = 32k
RAM_INT (AIW) : ORIGIN = 0x40008000, LENGTH = 32k
RAM_EXT (AIW) : ORIGIN = 0xa0c00000, LENGTH = 4M
ROM_INT (RX) : ORIGIN = 0x00000000, LENGTH = 512k - 8k
NIRVANA : ORIGIN = 0, LENGTH = 0
}
INCLUDE linkcmds.rom
REGION_ALIAS ("REGION_START", ROM_INT);
REGION_ALIAS ("REGION_VECTOR", RAM_VEC);
REGION_ALIAS ("REGION_TEXT", ROM_INT);
REGION_ALIAS ("REGION_TEXT_LOAD", ROM_INT);
REGION_ALIAS ("REGION_RODATA", ROM_INT);
REGION_ALIAS ("REGION_RODATA_LOAD", ROM_INT);
REGION_ALIAS ("REGION_DATA", RAM_EXT);
REGION_ALIAS ("REGION_DATA_LOAD", ROM_INT);
REGION_ALIAS ("REGION_FAST", RAM_INT);
REGION_ALIAS ("REGION_FAST_LOAD", RAM_INT);
REGION_ALIAS ("REGION_BSS", RAM_EXT);
REGION_ALIAS ("REGION_WORK", RAM_EXT);
REGION_ALIAS ("REGION_STACK", RAM_INT);
INCLUDE linkcmds.base

16
c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2478_ncs_ram
View File

@@ -6,9 +6,23 @@
MEMORY {
RAM_INT (AIW) : ORIGIN = 0x40000000, LENGTH = 64k
RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 8M
RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 16M
ROM_INT (RX) : ORIGIN = 0x00000000, LENGTH = 512k - 8k
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", RAM_EXT);
REGION_ALIAS ("REGION_VECTOR", RAM_INT);
REGION_ALIAS ("REGION_TEXT", RAM_EXT);
REGION_ALIAS ("REGION_TEXT_LOAD", RAM_EXT);
REGION_ALIAS ("REGION_RODATA", RAM_EXT);
REGION_ALIAS ("REGION_RODATA_LOAD", RAM_EXT);
REGION_ALIAS ("REGION_DATA", RAM_EXT);
REGION_ALIAS ("REGION_DATA_LOAD", RAM_EXT);
REGION_ALIAS ("REGION_FAST", RAM_INT);
REGION_ALIAS ("REGION_FAST_LOAD", RAM_INT);
REGION_ALIAS ("REGION_BSS", RAM_EXT);
REGION_ALIAS ("REGION_WORK", RAM_EXT);
REGION_ALIAS ("REGION_STACK", RAM_INT);
INCLUDE linkcmds.base

4
c/src/lib/libbsp/arm/nds/ChangeLog
View File

@@ -4,6 +4,10 @@
RTEMS_BSP_BOOTCARD_OPTIONS. Add RTEMS_BSP_CLEANUP_OPTIONS so all BSPs
have the same options.
2009-07-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
* startup/bspstart.c: Removed variable declaration.
2009-05-08 Joel Sherrill <joel.sherrill@oarcorp.com>
* startup/bspgetworkarea.c: Switch from ssize_t to uintptr_t for

5
c/src/lib/libbsp/arm/nds/startup/bspstart.c
View File

@@ -15,11 +15,6 @@
#include <bsp/bootcard.h>
#include <nds.h>
/*
* This definition comes from ARM cpu code.
*/
extern unsigned int arm_cpu_mode;
/*
* start the platform.
*/

27
c/src/lib/libbsp/arm/shared/abort/simple_abort.c
View File

@@ -64,25 +64,20 @@ void _print_full_context(uint32_t spsr)
mode=_print_full_context_mode2txt[(spsr&0x1f)-0x10];
if(!mode) mode="unknown";
#if defined(__thumb__)
asm volatile (" .code 16 \n" \
"adr %[tmp], arm_code \n" \
"bx %[tmp] \n" \
"nop \n" \
".code 32 \n" \
"arm_code: \n" \
: [tmp]"=&r" (tmp) );
#endif
asm volatile (" MRS %[cpsr], cpsr \n"
" ORR %[tmp], %[spsr], #0xc0 \n"
" MSR cpsr_c, %[tmp] \n"
" MOV %[prev_sp], sp \n"
" MOV %[prev_lr], lr \n"
" MSR cpsr_c, %[cpsr] \n"
asm volatile (
THUMB_TO_ARM
"mrs %[cpsr], cpsr\n"
"orr %[tmp], %[spsr], #0xc0\n"
"msr cpsr_c, %[tmp]\n"
"mov %[prev_sp], sp\n"
"mov %[prev_lr], lr\n"
"msr cpsr_c, %[cpsr]\n"
ARM_TO_THUMB
: [prev_sp] "=&r" (prev_sp), [prev_lr] "=&r" (prev_lr),
[cpsr] "=&r" (cpsr), [tmp] "=&r" (tmp)
: [spsr] "r" (spsr)
: "cc");
: "cc"
);
printk(
"Previous sp=0x%08x lr=0x%08x and actual cpsr=%08x\n",

83
c/src/lib/libbsp/arm/shared/include/linker-symbols.h
View File

@@ -5,15 +5,16 @@
*/
/*
* Copyright (c) 2008
* Embedded Brains GmbH
* Copyright (c) 2008, 2009
* embedded brains GmbH
* Obere Lagerstr. 30
* D-82178 Puchheim
* Germany
* rtems@embedded-brains.de
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be found in the file
* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#ifndef LIBBSP_ARM_SHARED_LINKER_SYMBOLS_H
@@ -25,56 +26,72 @@
#define LINKER_SYMBOL(sym) .extern sym
#endif
LINKER_SYMBOL( bsp_stack_irq_size)
LINKER_SYMBOL( bsp_stack_irq_start)
LINKER_SYMBOL(bsp_region_text_begin)
LINKER_SYMBOL(bsp_region_text_end)
LINKER_SYMBOL(bsp_region_text_size)
LINKER_SYMBOL( bsp_stack_irq_size)
LINKER_SYMBOL( bsp_stack_fiq_start)
LINKER_SYMBOL(bsp_region_data_begin)
LINKER_SYMBOL(bsp_region_data_end)
LINKER_SYMBOL(bsp_region_data_size)
LINKER_SYMBOL(bsp_stack_irq_begin)
LINKER_SYMBOL(bsp_stack_irq_end)
LINKER_SYMBOL(bsp_stack_irq_size)
LINKER_SYMBOL(bsp_stack_fiq_begin)
LINKER_SYMBOL(bsp_stack_fiq_end)
LINKER_SYMBOL(bsp_stack_irq_size)
LINKER_SYMBOL(bsp_stack_abt_begin)
LINKER_SYMBOL(bsp_stack_abt_end)
LINKER_SYMBOL(bsp_stack_abt_size)
LINKER_SYMBOL( bsp_stack_abt_start)
LINKER_SYMBOL(bsp_stack_undef_begin)
LINKER_SYMBOL(bsp_stack_undef_end)
LINKER_SYMBOL(bsp_stack_undef_size)
LINKER_SYMBOL( bsp_stack_undef_start)
LINKER_SYMBOL(bsp_stack_svc_begin)
LINKER_SYMBOL(bsp_stack_svc_end)
LINKER_SYMBOL(bsp_stack_svc_size)
LINKER_SYMBOL( bsp_stack_svc_start)
LINKER_SYMBOL( bsp_ram_int_start)
LINKER_SYMBOL( bsp_ram_int_end)
LINKER_SYMBOL( bsp_ram_int_size)
LINKER_SYMBOL(bsp_section_start_begin)
LINKER_SYMBOL(bsp_section_start_end)
LINKER_SYMBOL(bsp_section_start_size)
LINKER_SYMBOL( bsp_ram_ext_start)
LINKER_SYMBOL( bsp_ram_ext_load_start)
LINKER_SYMBOL( bsp_ram_ext_end)
LINKER_SYMBOL( bsp_ram_ext_size)
LINKER_SYMBOL( bsp_rom_start)
LINKER_SYMBOL( bsp_rom_end)
LINKER_SYMBOL( bsp_rom_size)
LINKER_SYMBOL( bsp_section_vector_start)
LINKER_SYMBOL(bsp_section_vector_begin)
LINKER_SYMBOL(bsp_section_vector_end)
LINKER_SYMBOL(bsp_section_vector_size)
LINKER_SYMBOL( bsp_section_text_start)
LINKER_SYMBOL(bsp_section_text_begin)
LINKER_SYMBOL(bsp_section_text_end)
LINKER_SYMBOL(bsp_section_text_size)
LINKER_SYMBOL(bsp_section_text_load_begin)
LINKER_SYMBOL( bsp_section_data_start)
LINKER_SYMBOL(bsp_section_rodata_begin)
LINKER_SYMBOL(bsp_section_rodata_end)
LINKER_SYMBOL(bsp_section_rodata_size)
LINKER_SYMBOL(bsp_section_rodata_load_begin)
LINKER_SYMBOL(bsp_section_data_begin)
LINKER_SYMBOL(bsp_section_data_end)
LINKER_SYMBOL(bsp_section_data_size)
LINKER_SYMBOL(bsp_section_data_load_begin)
LINKER_SYMBOL( bsp_section_bss_start)
LINKER_SYMBOL(bsp_section_fast_begin)
LINKER_SYMBOL(bsp_section_fast_end)
LINKER_SYMBOL(bsp_section_fast_size)
LINKER_SYMBOL(bsp_section_fast_load_begin)
LINKER_SYMBOL(bsp_section_bss_begin)
LINKER_SYMBOL(bsp_section_bss_end)
LINKER_SYMBOL(bsp_section_bss_size)
LINKER_SYMBOL( bsp_section_stack_start)
LINKER_SYMBOL(bsp_section_work_begin)
LINKER_SYMBOL(bsp_section_work_end)
LINKER_SYMBOL(bsp_section_work_size)
LINKER_SYMBOL(bsp_section_stack_begin)
LINKER_SYMBOL(bsp_section_stack_end)
LINKER_SYMBOL(bsp_section_stack_size)
LINKER_SYMBOL( bsp_section_work_area_start)
LINKER_SYMBOL( bsp_section_work_area_end)
LINKER_SYMBOL( bsp_section_work_area_size)
#endif /* LIBBSP_ARM_SHARED_LINKER_SYMBOLS_H */

10
c/src/lib/libbsp/arm/shared/irq/irq_init.c
View File

@@ -17,11 +17,6 @@
#include <bsp.h>
#include <rtems/bspIo.h>
/*
* default int vector
*/
extern void _ISR_Handler(void);
void default_int_handler(void)
{
printk("raw_idt_notify has been called \n");
@@ -33,9 +28,8 @@ void rtems_irq_mngt_init(void)
rtems_interrupt_disable(level);
/* First, connect the ISR_Handler for IRQ and FIQ interrupts */
_CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _ISR_Handler, NULL);
_CPU_ISR_install_vector(ARM_EXCEPTION_FIQ, _ISR_Handler, NULL);
/* First, connect the ISR_Handler for IRQ interrupts */
_CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, arm_exc_interrupt, NULL);
/* Initialize the INT at the BSP level */
BSP_rtems_irq_mngt_init();

71
c/src/lib/libbsp/arm/shared/start/start.S
View File

@@ -16,11 +16,6 @@
* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
*/
#warning Call to boot_card has changed and needs checking.
#warning The call is "void boot_card(const char* cmdline);"
#warning You need to pass a NULL.
#warning Please check and remove these warnings.
#include <bsp/linker-symbols.h>
#include <bsp/start.h>
@@ -47,7 +42,8 @@
.equ PSR_F, 0x40
.equ PSR_T, 0x20
.section ".entry"
.arm
.section ".bsp_start", "x"
/*
* This is the exception vector table and the pointers to the default
@@ -120,49 +116,49 @@ start:
/* Enter IRQ mode and set up the IRQ stack pointer */
mov r0, #(PSR_MODE_IRQ | PSR_I | PSR_F)
msr cpsr, r0
ldr r1, =bsp_stack_irq_size
ldr sp, =bsp_stack_irq_start
add sp, sp, r1
ldr sp, =bsp_stack_irq_end
/* Enter FIQ mode and set up the FIQ stack pointer */
mov r0, #(PSR_MODE_FIQ | PSR_I | PSR_F)
msr cpsr, r0
ldr r1, =bsp_stack_fiq_size
ldr sp, =bsp_stack_fiq_start
add sp, sp, r1
ldr sp, =bsp_stack_fiq_end
/* Enter ABT mode and set up the ABT stack pointer */
mov r0, #(PSR_MODE_ABT | PSR_I | PSR_F)
msr cpsr, r0
ldr r1, =bsp_stack_abt_size
ldr sp, =bsp_stack_abt_start
add sp, sp, r1
ldr sp, =bsp_stack_abt_end
/* Enter UNDEF mode and set up the UNDEF stack pointer */
mov r0, #(PSR_MODE_UNDEF | PSR_I | PSR_F)
msr cpsr, r0
ldr r1, =bsp_stack_undef_size
ldr sp, =bsp_stack_undef_start
add sp, sp, r1
ldr sp, =bsp_stack_undef_end
/* Enter SVC mode and set up the SVC stack pointer */
mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
msr cpsr, r0
ldr r1, =bsp_stack_svc_size
ldr sp, =bsp_stack_svc_start
add sp, sp, r1
ldr sp, =bsp_stack_svc_end
/* Stay in SVC mode */
/* Brach to start hook 0 */
#ifdef __thumb__
ldr r3, =bsp_start_hook_0
mov lr, pc
bx r3
.thumb
bx pc
nop
.arm
#else
bl bsp_start_hook_0
#endif
/*
* Initialize the exception vectors. This includes the exceptions
* vectors and the pointers to the default exception handlers.
*/
ldr r0, =bsp_section_vector_start
ldr r0, =bsp_section_vector_begin
adr r1, vector_block
ldmia r1!, {r2-r9}
stmia r0!, {r2-r9}
@@ -170,14 +166,45 @@ start:
stmia r0!, {r2-r9}
/* Brach to start hook 1 */
#ifdef __thumb__
ldr r3, =bsp_start_hook_1
mov lr, pc
bx r3
.thumb
bx pc
nop
.arm
#else
bl bsp_start_hook_1
#endif
/* Brach to boot card */
mov r0, #0
#ifdef __thumb__
ldr r3, =boot_card
mov lr, pc
bx r3
.thumb
bx pc
nop
.arm
#else
bl boot_card
#endif
/* Branch to reset function */
#ifdef __thumb__
ldr r3, =bsp_reset
mov lr, pc
bx r3
.thumb
bx pc
nop
.arm
#else
bl bsp_reset
#endif
/* Spin forever */

314
c/src/lib/libbsp/arm/shared/startup/linkcmds.base
View File

@@ -1,47 +1,7 @@
/**
* @file
*
* @brief Linker command base file for configuration with internal and external
* RAM and optional ROM load.
*
* You need to add a linker command file to your board support package that
* includes this file at the end and provides the following definitions.
*
* Compulsory are the memory regions RAM_INT, RAM_EXT and NIRVANA.
* <pre>
* MEMORY {
* RAM_INT (AIW) : ORIGIN = 0x40000000, LENGTH = 64k
* RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 32M
* NIRVANA : ORIGIN = 0, LENGTH = 0
* }
* </pre>
*
* You may optionally provide ROM start and size values.
* <pre>
* bsp_rom_start = 0x80000000;
* bsp_rom_size = 0x01000000;
* </pre>
*
* Optionally you can enable the load to ROM. It is enabled then
* bsp_enable_rom_load is defined. The value is arbitrary.
* <pre>
* bsp_enable_rom_load = 1;
* </pre>
*
* Include the linker command base file. This file has to be installed in the
* same directory than your linker command file.
* <pre>
* INCLUDE linkcmds.base
* </pre>
*
* You may define optionally values for the following sizes:
* - bsp_ram_int_size
* - bsp_ram_ext_size
* - bsp_stack_abt_size
* - bsp_stack_fiq_size
* - bsp_stack_irq_size
* - bsp_stack_svc_size
* - bsp_stack_undef_size
* @brief Linker command base file.
*/
/*
@@ -62,51 +22,68 @@ OUTPUT_ARCH (arm)
ENTRY (start)
/*
* BSP: Symbols that may be defined externally. The minimum alignment
* requirement for regions is bsp_section_align.
*/
bsp_ram_int_size = DEFINED (bsp_ram_int_size) ? bsp_ram_int_size : LENGTH (RAM_INT);
bsp_ram_ext_size = DEFINED (bsp_ram_ext_size) ? bsp_ram_ext_size : LENGTH (RAM_EXT);
bsp_rom_start = DEFINED (bsp_rom_start) ? bsp_rom_start : 0;
bsp_rom_size = DEFINED (bsp_rom_size) ? bsp_rom_size : 0;
bsp_ram_ext_load_start = DEFINED (bsp_enable_rom_load) ? bsp_rom_start : bsp_ram_ext_start;
bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 128;
bsp_stack_fiq_size = DEFINED (bsp_stack_fiq_size) ? bsp_stack_fiq_size : 128;
bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 256;
bsp_stack_svc_size = DEFINED (bsp_stack_svc_size) ? bsp_stack_svc_size : 256;
bsp_stack_undef_size = DEFINED (bsp_stack_undef_size) ? bsp_stack_undef_size : 128;
/*
* BSP: Global symbols
*/
bsp_ram_int_start = ORIGIN (RAM_INT);
bsp_ram_int_end = bsp_ram_int_start + bsp_ram_int_size;
bsp_ram_ext_start = ORIGIN (RAM_EXT);
bsp_ram_ext_end = bsp_ram_ext_start + bsp_ram_ext_size;
bsp_section_align = 32;
bsp_rom_end = bsp_rom_start + bsp_rom_size;
bsp_stack_align = 4;
bsp_section_align = 16;
bsp_region_text_begin = ORIGIN (REGION_TEXT);
bsp_region_text_size = LENGTH (REGION_TEXT);
bsp_region_text_end = bsp_region_text_begin + bsp_region_text_size;
bsp_stack_align = 16;
bsp_region_data_begin = ORIGIN (REGION_DATA);
bsp_region_data_size = LENGTH (REGION_DATA);
bsp_region_data_end = bsp_region_data_begin + bsp_region_data_size;
/*
* BSP: Symbols that may be defined externally
*/
bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 128;
bsp_stack_abt_size = ALIGN (bsp_stack_abt_size, bsp_stack_align);
bsp_stack_fiq_size = DEFINED (bsp_stack_fiq_size) ? bsp_stack_fiq_size : 128;
bsp_stack_fiq_size = ALIGN (bsp_stack_fiq_size, bsp_stack_align);
bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 512;
bsp_stack_irq_size = ALIGN (bsp_stack_irq_size, bsp_stack_align);
bsp_stack_svc_size = DEFINED (bsp_stack_svc_size) ? bsp_stack_svc_size : 512;
bsp_stack_svc_size = ALIGN (bsp_stack_svc_size, bsp_stack_align);
bsp_stack_undef_size = DEFINED (bsp_stack_undef_size) ? bsp_stack_undef_size : 128;
bsp_stack_undef_size = ALIGN (bsp_stack_undef_size, bsp_stack_align);
SECTIONS {
.start : {
/*
* BSP: Begin of start section
*/
bsp_section_start_begin = .;
/*
* BSP: System startup entry
*/
KEEP (*(.bsp_start))
. = ALIGN (bsp_section_align);
/*
* BSP: End of start section
*/
bsp_section_start_end = .;
} > REGION_START AT > REGION_START
bsp_section_start_size = bsp_section_start_end - bsp_section_start_begin;
.vector : {
/*
* BSP: Start of vector section
* BSP: Begin of vector section
*/
bsp_section_vector_start = .;
bsp_section_vector_begin = .;
/*
* BSP: Reserve space for the the exception vector table and
@@ -114,26 +91,57 @@ SECTIONS {
*/
. = . + 64;
/*
* BSP: Reserve space for mode stacks
*/
. = ALIGN (bsp_stack_align);
bsp_stack_abt_begin = .;
. = . + bsp_stack_abt_size;
bsp_stack_abt_end = .;
bsp_stack_fiq_begin = .;
. = . + bsp_stack_fiq_size;
bsp_stack_fiq_end = .;
bsp_stack_irq_begin = .;
. = . + bsp_stack_irq_size;
bsp_stack_irq_end = .;
bsp_stack_svc_begin = .;
. = . + bsp_stack_svc_size;
bsp_stack_svc_end = .;
bsp_stack_undef_begin = .;
. = . + bsp_stack_undef_size;
bsp_stack_undef_end = .;
/*
* BSP: Special vector data
*/
*(.bsp_vector)
. = ALIGN (bsp_section_align);
/*
* BSP: End of vector section
*/
bsp_section_vector_end = .;
} > RAM_INT
} > REGION_VECTOR AT > REGION_VECTOR
bsp_section_vector_size = bsp_section_vector_end - bsp_section_vector_start;
bsp_section_vector_size = bsp_section_vector_end - bsp_section_vector_begin;
.text : AT (bsp_ram_ext_load_start) {
.text : {
/*
* BSP: Start of text section
* BSP: Begin of text section
*/
bsp_section_text_start = .;
bsp_section_text_begin = .;
/*
* BSP: System startup entry
*/
KEEP (*(.entry))
KEEP (*(.bsp_start))
/*
* BSP: Moved into .text from .init
@@ -166,8 +174,6 @@ SECTIONS {
/*
* BSP: Moved into .text from .*
*/
*(.rodata .rodata.* .gnu.linkonce.r.*)
*(.rodata1)
*(.eh_frame_hdr)
/*
@@ -186,15 +192,45 @@ SECTIONS {
* BSP: End of text section
*/
bsp_section_text_end = .;
} > RAM_EXT
} > REGION_TEXT AT > REGION_TEXT_LOAD
bsp_section_text_size = bsp_section_text_end - bsp_section_text_start;
bsp_section_text_size = bsp_section_text_end - bsp_section_text_begin;
bsp_section_text_load_begin = LOADADDR (.text);
.rodata : {
/*
* BSP: Begin of rodata section
*/
bsp_section_rodata_begin = .;
__start_set_modmetadata_set = .;
*(set_modmetadata_set);
__stop_set_modmetadata_set = .;
/*
* BSP: Moved into .rodata from .*
*/
*(.rodata .rodata.* .gnu.linkonce.r.*)
*(.rodata1)
. = ALIGN (bsp_section_align);
/*
* BSP: End of rodata section
*/
bsp_section_rodata_end = .;
} > REGION_RODATA AT > REGION_RODATA_LOAD
bsp_section_rodata_size = bsp_section_rodata_end - bsp_section_rodata_begin;
bsp_section_rodata_load_begin = LOADADDR (.rodata);
.data : {
/*
* BSP: Start of data section
* BSP: Begin of data section
*/
bsp_section_data_start = .;
bsp_section_data_begin = .;
/*
* BSP: Moved into .data from .ctors
@@ -245,15 +281,31 @@ SECTIONS {
* BSP: End of data section
*/
bsp_section_data_end = .;
} > RAM_EXT
} > REGION_DATA AT > REGION_DATA_LOAD
bsp_section_data_size = bsp_section_data_end - bsp_section_data_start;
bsp_section_data_size = bsp_section_data_end - bsp_section_data_begin;
bsp_section_data_load_begin = LOADADDR (.data);
.fast : {
bsp_section_fast_begin = .;
*(.fast)
. = ALIGN (bsp_section_align);
bsp_section_fast_end = .;
} > REGION_FAST AT > REGION_FAST_LOAD
bsp_section_fast_size = bsp_section_fast_end - bsp_section_fast_begin;
bsp_section_fast_load_begin = LOADADDR (.fast);
.bss : {
/*
* BSP: Start of bss section
* BSP: Begin of bss section
*/
bsp_section_bss_start = .;
bsp_section_bss_begin = .;
*(COMMON)
*(.dynbss)
@@ -265,73 +317,53 @@ SECTIONS {
* BSP: End of bss section
*/
bsp_section_bss_end = .;
} > RAM_EXT
} > REGION_BSS AT > REGION_BSS
bsp_section_bss_size = bsp_section_bss_end - bsp_section_bss_start;
bsp_section_bss_size = bsp_section_bss_end - bsp_section_bss_begin;
.work : {
/*
* BSP: Begin of work section. The work section will occupy
* the remaining REGION_WORK region and contains the RTEMS work
* space and heap.
*/
bsp_section_work_begin = .;
. += ORIGIN (REGION_WORK) + LENGTH (REGION_WORK) - ABSOLUTE (.);
/*
* BSP: End of work section
*/
bsp_section_work_end = .;
} > REGION_WORK AT > REGION_WORK
bsp_section_work_size = bsp_section_work_end - bsp_section_work_begin;
.stack : {
/*
* BSP: Start of stack section
* BSP: Begin of stack section. The stack section will occupy
* the remaining REGION_STACK region and may contain the task
* stacks. Depending on the region distribution this section
* may be of zero size.
*/
bsp_section_stack_start = .;
bsp_section_stack_begin = .;
. = ALIGN (bsp_stack_align);
bsp_stack_abt_start = .;
. = . + bsp_stack_abt_size;
. = ALIGN (bsp_stack_align);
bsp_stack_fiq_start = .;
. = . + bsp_stack_fiq_size;
. = ALIGN (bsp_stack_align);
bsp_stack_irq_start = .;
. = . + bsp_stack_irq_size;
. = ALIGN (bsp_stack_align);
bsp_stack_svc_start = .;
. = . + bsp_stack_svc_size;
. = ALIGN (bsp_stack_align);
bsp_stack_undef_start = .;
. = . + bsp_stack_undef_size;
. = ALIGN (bsp_section_align);
. += ORIGIN (REGION_STACK) + LENGTH (REGION_STACK) - ABSOLUTE (.);
/*
* BSP: End of stack section
*/
bsp_section_stack_end = .;
} > RAM_INT
} > REGION_STACK AT > REGION_STACK
bsp_section_stack_size = bsp_section_stack_end - bsp_section_stack_start;
.work_area : {
/*
* BSP: Start of work area. The work area will occupy the remaining
* RAM_EXT region and contains the RTEMS work space and heap. We cannot
* assign the region end directly since this leads to a region full
* warning.
*/
bsp_section_work_area_start = .;
. = bsp_ram_ext_end - 4;
. = ALIGN (bsp_section_align);
/*
* BSP: End of work area
*/
bsp_section_work_area_end = .;
} > RAM_EXT
bsp_section_work_area_size = bsp_section_work_area_end - bsp_section_work_area_start;
bsp_section_stack_size = bsp_section_stack_end - bsp_section_stack_begin;
/*
* BSP: External symbols (FIXME)
*/
RamBase = bsp_ram_ext_start;
RamSize = bsp_ram_ext_size;
WorkAreaBase = bsp_section_work_area_start;
RamBase = ORIGIN (REGION_WORK);
RamSize = LENGTH (REGION_WORK);
WorkAreaBase = bsp_section_work_begin;
HeapSize = 0;
/* Stabs debugging sections. */

4
c/src/lib/libbsp/shared/ChangeLog
View File

@@ -1,3 +1,7 @@
2009-05-27 Sebastian Huber <sebastian.huber@embedded-brains.de>
* include/stackalloc.h, src/stackalloc.c: New files.
2009-07-06 Joel Sherrill <joel.sherrill@oarcorp.com>
* setvec.c: Add CVS Id.