RTOS/rtems
1
0
Fork 0
forked from Imagelibrary/rtems
Code Pull Requests Activity

Added BeagleBoard BSP

Browse Source 
Coding done in course of GSoC2012.

Commit edited to be brought up-to-date with mainline by
Ben Gras <beng@shrike-systems.com>.
This commit is contained in:
Claas Ziemke
2012-08-22 14:39:02 +02:00
committed by Joel Sherrill
parent b51842bb38
commit 7a669866ee
29 changed files with 4596 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
c/src/lib/libbsp/arm/acinclude.m4
View File

@@ -4,6 +4,8 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR],
case "$1" in
altera-cyclone-v )
AC_CONFIG_SUBDIRS([altera-cyclone-v]);;
beagle )
AC_CONFIG_SUBDIRS([beagle]);;
csb336 )
AC_CONFIG_SUBDIRS([csb336]);;
csb337 )

144
c/src/lib/libbsp/arm/beagle/Makefile.am Normal file
View File

@@ -0,0 +1,144 @@
##
#
# @file
#
# @brief Makefile of LibBSP for the BeagleBoards.
#
ACLOCAL_AMFLAGS = -I ../../../../aclocal
include $(top_srcdir)/../../../../automake/compile.am
include_bspdir = $(includedir)/bsp
include_libcpudir = $(includedir)/libcpu
dist_project_lib_DATA = bsp_specs
###############################################################################
# Header #
###############################################################################
include_HEADERS = include/bsp.h
nodist_include_HEADERS = ../../shared/include/coverhd.h \
include/bspopts.h
nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h
include_bsp_HEADERS =
include_bsp_HEADERS += ../../shared/include/utility.h
include_bsp_HEADERS += ../../shared/include/irq-generic.h
include_bsp_HEADERS += ../../shared/include/irq-info.h
include_bsp_HEADERS += ../../shared/include/stackalloc.h
include_bsp_HEADERS += ../../shared/include/uart-output-char.h
include_bsp_HEADERS += ../../shared/tod.h
include_bsp_HEADERS += ../shared/include/start.h
include_bsp_HEADERS += include/irq.h
include_bsp_HEADERS += include/beagle.h
include_bsp_HEADERS += include/beagle-clock-config.h
include_bsp_HEADERS += include/beagle-timer.h
include_bsp_HEADERS += include/boot.h
include_bsp_HEADERS += include/i2c.h
include_libcpu_HEADERS = ../../../libcpu/arm/shared/include/arm-cp15.h
###############################################################################
# Data #
###############################################################################
noinst_LIBRARIES = libbspstart.a
libbspstart_a_SOURCES = ../shared/start/start.S
project_lib_DATA = start.$(OBJEXT)
project_lib_DATA += startup/linkcmds
project_lib_DATA += startup/linkcmds.beagle
EXTRA_DIST = startup/linkcmds.beagle
###############################################################################
# LibBSP #
###############################################################################
noinst_LIBRARIES += libbsp.a
libbsp_a_SOURCES =
libbsp_a_CPPFLAGS =
libbsp_a_LIBADD =
# Shared
libbsp_a_SOURCES += ../../shared/bootcard.c
libbsp_a_SOURCES += ../../shared/bspclean.c
libbsp_a_SOURCES += ../../shared/bspgetworkarea.c
libbsp_a_SOURCES += ../../shared/bsplibc.c
libbsp_a_SOURCES += ../../shared/bsppost.c
libbsp_a_SOURCES += ../../shared/bsppredriverhook.c
libbsp_a_SOURCES += ../../shared/bsppretaskinghook.c
libbsp_a_SOURCES += ../../shared/gnatinstallhandler.c
libbsp_a_SOURCES += ../../shared/sbrk.c
libbsp_a_SOURCES += ../../shared/src/stackalloc.c
libbsp_a_SOURCES += ../../shared/src/uart-output-char.c
libbsp_a_SOURCES += ../shared/abort/simple_abort.c
libbsp_a_SOURCES += ../shared/startup/bsp-start-memcpy.S
# Startup
libbsp_a_SOURCES += startup/bspreset.c
libbsp_a_SOURCES += startup/bspstart.c
# IRQ
libbsp_a_SOURCES += ../../shared/src/irq-default-handler.c
libbsp_a_SOURCES += ../../shared/src/irq-generic.c
libbsp_a_SOURCES += ../../shared/src/irq-info.c
libbsp_a_SOURCES += ../../shared/src/irq-legacy.c
libbsp_a_SOURCES += ../../shared/src/irq-server.c
libbsp_a_SOURCES += ../../shared/src/irq-shell.c
libbsp_a_SOURCES += irq/irq.c
# Console
libbsp_a_SOURCES += ../../shared/console.c \
../../shared/console_select.c \
console/console-config.c \
../../shared/console_read.c \
../../shared/console_write.c \
../../shared/console_control.c
# Clock
libbsp_a_SOURCES += clock/beagle-clock-config.c
libbsp_a_SOURCES += ../../shared/clockdrv_shell.h
# RTC
libbsp_a_SOURCES += ../../shared/tod.c \
rtc/rtc-config.c
# Misc
libbsp_a_SOURCES += misc/boot.c
libbsp_a_SOURCES += misc/i2c.c
libbsp_a_SOURCES += misc/restart.c
libbsp_a_SOURCES += misc/system-clocks.c
libbsp_a_SOURCES += misc/timer.c
# SSP
# I2C
# Cache
libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
libbsp_a_SOURCES += ../../../libcpu/arm/shared/include/cache_.h
libbsp_a_CPPFLAGS += -I$(srcdir)/../../../libcpu/arm/shared/include
# Start hooks
libbsp_a_SOURCES += startup/bspstarthooks.c
###############################################################################
# Network #
###############################################################################
###############################################################################
# Special Rules #
###############################################################################
DISTCLEANFILES = include/bspopts.h
include $(srcdir)/preinstall.am
include $(top_srcdir)/../../../../automake/local.am

6
c/src/lib/libbsp/arm/beagle/README Normal file
View File

@@ -0,0 +1,6 @@
Development board is a BeagleBoard Rev Cx. Basic initialization via stage 1
bootloader or U-Boot will be assumed. Drivers:
o Standard UART 3, 4, 5, 6 (Console = 5, 115200N1)
o Clock uses TIMER 0
o Ethernet

13
c/src/lib/libbsp/arm/beagle/bsp_specs Normal file
View File

@@ -0,0 +1,13 @@
%rename endfile old_endfile
%rename startfile old_startfile
%rename link old_link
*startfile:
%{!qrtems: %(old_startfile)} \
%{!nostdlib: %{qrtems: start.o%s crti.o%s crtbegin.o%s -e _start}}
*link:
%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N}
*endfile:
%{!qrtems: *(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s }

135
c/src/lib/libbsp/arm/beagle/clock/beagle-clock-config.c Normal file
View File

@@ -0,0 +1,135 @@
/**
* @file
*
* @ingroup beagle_clock
*
* @brief Clock driver configuration.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#include <rtems.h>
#include <bsp/beagle-clock-config.h>
#include <bsp/beagle-timer.h>
#ifdef ARM_MULTILIB_ARCH_V4
/* This is defined in ../../../shared/clockdrv_shell.h */
void Clock_isr(rtems_irq_hdl_param arg);
static volatile beagle_timer *const beagle_clock =
(volatile beagle_timer *) BEAGLE_CLOCK_TIMER_BASE;
static void beagle_clock_at_tick(void)
{
beagle_clock->ir = BEAGLE_TIMER_IR_MR0;
}
static void beagle_clock_handler_install(void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
sc = rtems_interrupt_handler_install(
BEAGLE_CLOCK_INTERRUPT,
"Clock",
RTEMS_INTERRUPT_UNIQUE,
(rtems_interrupt_handler) Clock_isr,
NULL
);
if (sc != RTEMS_SUCCESSFUL) {
rtems_fatal_error_occurred(0xdeadbeef);
}
}
static void beagle_clock_initialize(void)
{
uint64_t interval = ((uint64_t) BEAGLE_CLOCK_REFERENCE
* (uint64_t) rtems_configuration_get_microseconds_per_tick()) / 1000000;
/* Enable module */
BEAGLE_CLOCK_MODULE_ENABLE();
/* Reset timer */
beagle_clock->tcr = BEAGLE_TIMER_TCR_RST;
/* Clear interrupt flags */
beagle_clock->ir = BEAGLE_TIMER_IR_ALL;
/* Set timer mode */
beagle_clock->ccr = 0;
/* Timer is incremented every PERIPH_CLK tick */
beagle_clock->pr = 0;
/* Set match registers */
beagle_clock->mr0 = (uint32_t) interval;
/* Generate interrupt and reset counter on match with MR0 */
beagle_clock->mcr = BEAGLE_TIMER_MCR_MR0_INTR | BEAGLE_TIMER_MCR_MR0_RST;
/* No external match */
beagle_clock->emr = 0x0;
/* Enable timer */
beagle_clock->tcr = BEAGLE_TIMER_TCR_EN;
}
static void beagle_clock_cleanup(void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
/* Disable timer */
beagle_clock->tcr = 0x0;
/* Remove interrupt handler */
sc = rtems_interrupt_handler_remove(
BEAGLE_CLOCK_INTERRUPT,
(rtems_interrupt_handler) Clock_isr,
NULL
);
if (sc != RTEMS_SUCCESSFUL) {
rtems_fatal_error_occurred(0xdeadbeef);
}
}
static uint32_t beagle_clock_nanoseconds_since_last_tick(void)
{
uint64_t k = (1000000000ULL << 32) / BEAGLE_CLOCK_REFERENCE;
uint64_t c = beagle_clock->tc;
if ((beagle_clock->ir & BEAGLE_TIMER_IR_MR0) != 0) {
c = beagle_clock->tc + beagle_clock->mr0;
}
return (uint32_t) ((c * k) >> 32);
}
#define Clock_driver_support_at_tick() beagle_clock_at_tick()
#define Clock_driver_support_initialize_hardware() beagle_clock_initialize()
#define Clock_driver_support_install_isr(isr, old_isr) \
do { \
beagle_clock_handler_install(); \
old_isr = NULL; \
} while (0)
#define Clock_driver_support_shutdown_hardware() beagle_clock_cleanup()
#define Clock_driver_nanoseconds_since_last_tick \
beagle_clock_nanoseconds_since_last_tick
/* Include shared source clock driver code */
#include "../../../shared/clockdrv_shell.h"
#endif /* ARM_MULTILIB_ARCH_V4 */

98
c/src/lib/libbsp/arm/beagle/configure.ac Normal file
View File

@@ -0,0 +1,98 @@
##
#
# @file
#
# @brief Configure script of LibBSP for the BeagleBoards.
#
AC_PREREQ([2.68])
AC_INIT([rtems-c-src-lib-libbsp-arm-beagle],[_RTEMS_VERSION],[rtems-bugs@rtems.com])
AC_CONFIG_SRCDIR([bsp_specs])
RTEMS_TOP(../../../../../..)
RTEMS_CANONICAL_TARGET_CPU
AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.11.1])
RTEMS_BSP_CONFIGURE
RTEMS_PROG_CC_FOR_TARGET
RTEMS_CANONICALIZE_TOOLS
RTEMS_PROG_CCAS
RTEMS_CHECK_NETWORKING
AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
RTEMS_BSPOPTS_SET([BSP_SMALL_MEMORY],[beagle_mzx_stage_1],[1])
RTEMS_BSPOPTS_SET([BSP_SMALL_MEMORY],[*],[])
RTEMS_BSPOPTS_HELP([BSP_SMALL_MEMORY],[disable testsuite samples with high memory demands])
RTEMS_BSPOPTS_SET([BEAGLE_OSCILLATOR_MAIN],[*],[13000000U])
RTEMS_BSPOPTS_HELP([BEAGLE_OSCILLATOR_MAIN],[main oscillator frequency in Hz])
RTEMS_BSPOPTS_SET([BEAGLE_OSCILLATOR_RTC],[*],[32768U])
RTEMS_BSPOPTS_HELP([BEAGLE_OSCILLATOR_RTC],[RTC oscillator frequency in Hz])
RTEMS_BSPOPTS_SET([BEAGLE_PERIPH_CLK],[*],[13000000U])
RTEMS_BSPOPTS_HELP([BEAGLE_PERIPH_CLK],[peripheral clock in Hz])
RTEMS_BSPOPTS_SET([BEAGLE_ETHERNET_RMII],[*],[1])
RTEMS_BSPOPTS_HELP([BEAGLE_ETHERNET_RMII],[enable RMII for Ethernet])
RTEMS_BSPOPTS_SET([BEAGLE_UART_1_BAUD],[*],[])
RTEMS_BSPOPTS_HELP([BEAGLE_UART_1_BAUD],[baud for UART 1])
RTEMS_BSPOPTS_SET([BEAGLE_UART_2_BAUD],[*],[])
RTEMS_BSPOPTS_HELP([BEAGLE_UART_2_BAUD],[baud for UART 2])
RTEMS_BSPOPTS_SET([BEAGLE_UART_7_BAUD],[*],[])
RTEMS_BSPOPTS_HELP([BEAGLE_UART_7_BAUD],[baud for UART 7])
RTEMS_BSPOPTS_SET([BEAGLE_CONFIG_U3CLK],[*],[])
RTEMS_BSPOPTS_HELP([BEAGLE_CONFIG_U3CLK],[clock configuration for UART 3])
RTEMS_BSPOPTS_SET([BEAGLE_CONFIG_U4CLK],[*],[])
RTEMS_BSPOPTS_HELP([BEAGLE_CONFIG_U4CLK],[clock configuration for UART 4])
RTEMS_BSPOPTS_SET([BEAGLE_CONFIG_U5CLK],[*],[0x00001386U])
RTEMS_BSPOPTS_HELP([BEAGLE_CONFIG_U5CLK],[clock configuration for UART 5])
RTEMS_BSPOPTS_SET([BEAGLE_CONFIG_U6CLK],[*],[])
RTEMS_BSPOPTS_HELP([BEAGLE_CONFIG_U6CLK],[clock configuration for UART 6])
RTEMS_BSPOPTS_SET([BEAGLE_CONFIG_UART_CLKMODE],[*],[0x00000200U])
RTEMS_BSPOPTS_HELP([BEAGLE_CONFIG_UART_CLKMODE],[clock mode configuration for UARTs])
RTEMS_BSPOPTS_SET([BEAGLE_DISABLE_MMU],[*],[])
RTEMS_BSPOPTS_HELP([BEAGLE_DISABLE_MMU],[disable MMU])
RTEMS_BSPOPTS_SET([BEAGLE_DISABLE_READ_WRITE_DATA_CACHE],[*],[])
RTEMS_BSPOPTS_HELP([BEAGLE_DISABLE_READ_WRITE_DATA_CACHE],[disable cache for read-write data sections])
RTEMS_BSPOPTS_SET([BEAGLE_DISABLE_READ_ONLY_PROTECTION],[*],[])
RTEMS_BSPOPTS_HELP([BEAGLE_DISABLE_READ_ONLY_PROTECTION],[disable MMU protection of read-only sections])
RTEMS_BSPOPTS_SET([BEAGLE_SCRATCH_AREA_SIZE],[beagle_mzx*],[4096])
RTEMS_BSPOPTS_HELP([BEAGLE_SCRATCH_AREA_SIZE],[size of scratch area])
RTEMS_BSPOPTS_SET([BEAGLE_STOP_GPDMA],[*],[1])
RTEMS_BSPOPTS_HELP([BEAGLE_STOP_GPDMA],[stop general purpose DMA at start-up to avoid DMA interference])
RTEMS_BSPOPTS_SET([BEAGLE_STOP_ETHERNET],[*],[1])
RTEMS_BSPOPTS_HELP([BEAGLE_STOP_ETHERNET],[stop Ethernet controller at start-up to avoid DMA interference])
RTEMS_BSPOPTS_SET([BEAGLE_STOP_USB],[*],[1])
RTEMS_BSPOPTS_HELP([BEAGLE_STOP_USB],[stop USB controller at start-up to avoid DMA interference])
RTEMS_BSPOPTS_SET([BEAGLE_ENABLE_WATCHDOG_RESET],[*],[1])
RTEMS_BSPOPTS_HELP([BEAGLE_ENABLE_WATCHDOG_RESET],[bsp_reset() will use the watchdog to reset the chip])
RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[])
RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start])
RTEMS_BSPOPTS_SET([TESTS_USE_PRINTK],[*],[1])
RTEMS_BSPOPTS_HELP([TESTS_USE_PRINTK],[tests use printk() for output])
RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
RTEMS_BSP_LINKCMDS
AC_CONFIG_FILES([Makefile])
AC_OUTPUT

231
c/src/lib/libbsp/arm/beagle/console/console-config.c Normal file
View File

@@ -0,0 +1,231 @@
/**
* @file
*
* @ingroup beagle
*
* @brief Console configuration.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#include <libchip/serial.h>
#include <libchip/ns16550.h>
#include <bsp.h>
#include <bsp/beagle.h>
#include <bsp/irq.h>
#define UART3_THR (*(volatile unsigned int *)0x49020000)
#define UART3_RHR (*(volatile unsigned int *)0x49020000)
#define UART3_LSR (*(volatile unsigned int *)0x49020014)
#define TX_FIFO_E (1<<5)
#define RX_FIFO_E (1<<0)
static uint8_t beagle_uart_get_register(uint32_t addr, uint8_t i)
{
volatile uint32_t *reg = (volatile uint32_t *) addr;
return (uint8_t) reg [i];
}
static void beagle_uart_set_register(uint32_t addr, uint8_t i, uint8_t val)
{
volatile uint32_t *reg = (volatile uint32_t *) addr;
reg [i] = val;
}
/* FIXME: Console selection */
console_tbl Console_Configuration_Ports [] = {
#ifdef BEAGLE_CONFIG_U5CLK
{
.sDeviceName = "/dev/ttyS5",
.deviceType = SERIAL_NS16550,
.pDeviceFns = &ns16550_fns_polled,
.deviceProbe = NULL,
.pDeviceFlow = NULL,
.ulMargin = 16,
.ulHysteresis = 8,
.pDeviceParams = (void *) 1,
.ulCtrlPort1 = BEAGLE_BASE_UART_5,
.ulCtrlPort2 = 0,
.ulDataPort = BEAGLE_BASE_UART_5,
.getRegister = beagle_uart_get_register,
.setRegister = beagle_uart_set_register,
.getData = NULL,
.setData = NULL,
.ulClock = 16,
.ulIntVector = BEAGLE_IRQ_UART_5
},
#endif
#ifdef BEAGLE_CONFIG_U3CLK
{
.sDeviceName = "/dev/ttyS3",
.deviceType = SERIAL_NS16550,
.pDeviceFns = &ns16550_fns,
.deviceProbe = NULL,
.pDeviceFlow = NULL,
.ulMargin = 16,
.ulHysteresis = 8,
.pDeviceParams = (void *) 1,
.ulCtrlPort1 = BEAGLE_BASE_UART_3,
.ulCtrlPort2 = 0,
.ulDataPort = BEAGLE_BASE_UART_3,
.getRegister = beagle_uart_get_register,
.setRegister = beagle_uart_set_register,
.getData = NULL,
.setData = NULL,
.ulClock = 16,
.ulIntVector = BEAGLE_IRQ_UART_3
},
#endif
#ifdef BEAGLE_CONFIG_U4CLK
{
.sDeviceName = "/dev/ttyS4",
.deviceType = SERIAL_NS16550,
.pDeviceFns = &ns16550_fns,
.deviceProbe = NULL,
.pDeviceFlow = NULL,
.ulMargin = 16,
.ulHysteresis = 8,
.pDeviceParams = (void *) 1,
.ulCtrlPort1 = BEAGLE_BASE_UART_4,
.ulCtrlPort2 = 0,
.ulDataPort = BEAGLE_BASE_UART_4,
.getRegister = beagle_uart_get_register,
.setRegister = beagle_uart_set_register,
.getData = NULL,
.setData = NULL,
.ulClock = 16,
.ulIntVector = BEAGLE_IRQ_UART_4
},
#endif
#ifdef BEAGLE_CONFIG_U6CLK
{
.sDeviceName = "/dev/ttyS6",
.deviceType = SERIAL_NS16550,
.pDeviceFns = &ns16550_fns,
.deviceProbe = NULL,
.pDeviceFlow = NULL,
.ulMargin = 16,
.ulHysteresis = 8,
.pDeviceParams = (void *) 1,
.ulCtrlPort1 = BEAGLE_BASE_UART_6,
.ulCtrlPort2 = 0,
.ulDataPort = BEAGLE_BASE_UART_6,
.getRegister = beagle_uart_get_register,
.setRegister = beagle_uart_set_register,
.getData = NULL,
.setData = NULL,
.ulClock = 16,
.ulIntVector = BEAGLE_IRQ_UART_6
},
#endif
#ifdef BEAGLE_UART_1_BAUD
{
.sDeviceName = "/dev/ttyS1",
.deviceType = SERIAL_CUSTOM,
.pDeviceFns = &ns16550_fns,
.deviceProbe = NULL,
.pDeviceFlow = NULL,
.ulMargin = 16,
.ulHysteresis = 8,
.pDeviceParams = (void *) BEAGLE_UART_1_BAUD,
.ulCtrlPort1 = BEAGLE_BASE_UART_1,
.ulCtrlPort2 = 0,
.ulDataPort = 0,
.getRegister = NULL,
.setRegister = NULL,
.getData = NULL,
.setData = NULL,
.ulClock = 16,
.ulIntVector = BEAGLE_IRQ_UART_1
},
#endif
#ifdef BEAGLE_UART_2_BAUD
{
.sDeviceName = "/dev/ttyS2",
.deviceType = SERIAL_CUSTOM,
.pDeviceFns = &ns16550_fns,
.deviceProbe = NULL,
.pDeviceFlow = NULL,
.ulMargin = 16,
.ulHysteresis = 8,
.pDeviceParams = (void *) BEAGLE_UART_2_BAUD,
.ulCtrlPort1 = BEAGLE_BASE_UART_2,
.ulCtrlPort2 = 0,
.ulDataPort = 0,
.getRegister = NULL,
.setRegister = NULL,
.getData = NULL,
.setData = NULL,
.ulClock = 16,
.ulIntVector = BEAGLE_IRQ_UART_2
},
#endif
#ifdef BEAGLE_UART_7_BAUD
{
.sDeviceName = "/dev/ttyS7",
.deviceType = SERIAL_CUSTOM,
.pDeviceFns = &ns16550_fns,
.deviceProbe = NULL,
.pDeviceFlow = NULL,
.ulMargin = 16,
.ulHysteresis = 8,
.pDeviceParams = (void *) BEAGLE_UART_7_BAUD,
.ulCtrlPort1 = BEAGLE_BASE_UART_7,
.ulCtrlPort2 = 0,
.ulDataPort = 0,
.getRegister = NULL,
.setRegister = NULL,
.getData = NULL,
.setData = NULL,
.ulClock = 16,
.ulIntVector = BEAGLE_IRQ_UART_7
},
#endif
};
#define BEAGLE_UART_COUNT \
(sizeof(Console_Configuration_Ports) / \
sizeof(Console_Configuration_Ports [0]))
unsigned long Console_Configuration_Count = BEAGLE_UART_COUNT;
static void uart_write_polled( char c ) {
// wait until TX-Buffer is empty
while( ( UART3_LSR & TX_FIFO_E ) == 0 )
;
// send character
UART3_THR = c;
return c;
}
/*
* Write a character to the console. This is used by printk() and
* maybe other low level functions. It should not use interrupts or any
* RTEMS system calls. It needs to be very simple
*/
static void _BSP_put_char( char c ) {
uart_write_polled( c );
if (c == '\n') {
uart_write_polled('\r');
}
}
BSP_output_char_function_type BSP_output_char = _BSP_put_char;

58
c/src/lib/libbsp/arm/beagle/include/beagle-clock-config.h Normal file
View File

@@ -0,0 +1,58 @@
/**
* @file
*
* @ingroup beagle_clock
*
* @brief Clock driver configuration.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#ifndef LIBBSP_ARM_BEAGLE_BEAGLE_CLOCK_CONFIG_H
#define LIBBSP_ARM_BEAGLE_BEAGLE_CLOCK_CONFIG_H
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/beagle.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup beagle_clock Clock Support
*
* @ingroup beagle
*
* @brief Clock support.
*
* @{
*/
#define BEAGLE_CLOCK_INTERRUPT BEAGLE_IRQ_TIMER_0
#define BEAGLE_CLOCK_TIMER_BASE BEAGLE_BASE_TIMER_0
#define BEAGLE_CLOCK_REFERENCE BEAGLE_PERIPH_CLK
#define BEAGLE_CLOCK_MODULE_ENABLE()
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_ARM_BEAGLE_BEAGLE_CLOCK_CONFIG_H */

159
c/src/lib/libbsp/arm/beagle/include/beagle-timer.h Normal file
View File

@@ -0,0 +1,159 @@
/**
* @file
*
* @ingroup beagle_timer
*
* @brief Timer API.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#ifndef LIBBSP_ARM_SHARED_BEAGLE_TIMER_H
#define LIBBSP_ARM_SHARED_BEAGLE_TIMER_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup beagle_timer Timer Support
*
* @ingroup beagle
*
* @brief Timer support.
*
* @{
*/
/**
* @name Interrupt Register Defines
*
* @{
*/
#define BEAGLE_TIMER_IR_MR0 0x1U
#define BEAGLE_TIMER_IR_MR1 0x2U
#define BEAGLE_TIMER_IR_MR2 0x4U
#define BEAGLE_TIMER_IR_MR3 0x8U
#define BEAGLE_TIMER_IR_CR0 0x10U
#define BEAGLE_TIMER_IR_CR1 0x20U
#define BEAGLE_TIMER_IR_CR2 0x40U
#define BEAGLE_TIMER_IR_CR3 0x80U
#define BEAGLE_TIMER_IR_ALL 0xffU
/** @} */
/**
* @name Timer Control Register Defines
*
* @{
*/
#define BEAGLE_TIMER_TCR_EN 0x1U
#define BEAGLE_TIMER_TCR_RST 0x2U
/** @} */
/**
* @name Match Control Register Defines
*
* @{
*/
#define BEAGLE_TIMER_MCR_MR0_INTR 0x1U
#define BEAGLE_TIMER_MCR_MR0_RST 0x2U
#define BEAGLE_TIMER_MCR_MR0_STOP 0x4U
#define BEAGLE_TIMER_MCR_MR1_INTR 0x8U
#define BEAGLE_TIMER_MCR_MR1_RST 0x10U
#define BEAGLE_TIMER_MCR_MR1_STOP 0x20U
#define BEAGLE_TIMER_MCR_MR2_INTR 0x40U
#define BEAGLE_TIMER_MCR_MR2_RST 0x80U
#define BEAGLE_TIMER_MCR_MR2_STOP 0x100U
#define BEAGLE_TIMER_MCR_MR3_INTR 0x200U
#define BEAGLE_TIMER_MCR_MR3_RST 0x400U
#define BEAGLE_TIMER_MCR_MR3_STOP 0x800U
/** @} */
/**
* @name Capture Control Register Defines
*
* @{
*/
#define BEAGLE_TIMER_CCR_CAP0_RE 0x1U
#define BEAGLE_TIMER_CCR_CAP0_FE 0x2U
#define BEAGLE_TIMER_CCR_CAP0_INTR 0x4U
#define BEAGLE_TIMER_CCR_CAP1_RE 0x8U
#define BEAGLE_TIMER_CCR_CAP1_FE 0x10U
#define BEAGLE_TIMER_CCR_CAP1_INTR 0x20U
#define BEAGLE_TIMER_CCR_CAP2_RE 0x40U
#define BEAGLE_TIMER_CCR_CAP2_FE 0x80U
#define BEAGLE_TIMER_CCR_CAP2_INTR 0x100U
#define BEAGLE_TIMER_CCR_CAP3_RE 0x200U
#define BEAGLE_TIMER_CCR_CAP3_FE 0x400U
#define BEAGLE_TIMER_CCR_CAP3_INTR 0x800U
/** @} */
/**
* @name External Match Register Defines
*
* @{
*/
#define BEAGLE_TIMER_EMR_EM0_RE 0x1U
#define BEAGLE_TIMER_EMR_EM1_FE 0x2U
#define BEAGLE_TIMER_EMR_EM2_INTR 0x4U
#define BEAGLE_TIMER_EMR_EM3_RE 0x8U
#define BEAGLE_TIMER_EMR_EMC0_FE 0x10U
#define BEAGLE_TIMER_EMR_EMC1_INTR 0x20U
#define BEAGLE_TIMER_EMR_EMC2_RE 0x40U
#define BEAGLE_TIMER_EMR_EMC3_FE 0x80U
/** @} */
/**
* @brief Timer control block.
*/
typedef struct {
uint32_t ir;
uint32_t tcr;
uint32_t tc;
uint32_t pr;
uint32_t pc;
uint32_t mcr;
uint32_t mr0;
uint32_t mr1;
uint32_t mr2;
uint32_t mr3;
uint32_t ccr;
uint32_t cr0;
uint32_t cr1;
uint32_t cr2;
uint32_t cr3;
uint32_t emr;
uint32_t ctcr;
} beagle_timer;
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_ARM_SHARED_BEAGLE_TIMER_H */

760
c/src/lib/libbsp/arm/beagle/include/beagle.h Normal file
View File

@@ -0,0 +1,760 @@
/**
* @file
*
* @ingroup beagle_reg
*
* @brief Register base addresses.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#ifndef LIBBSP_ARM_BEAGLE_BEAGLE_H
#define LIBBSP_ARM_BEAGLE_BEAGLE_H
#include <stdint.h>
#include <bsp/beagle-timer.h>
#define __arch_getb(a) (*(volatile unsigned char *)(a))
#define __arch_getw(a) (*(volatile unsigned short *)(a))
#define __arch_getl(a) (*(volatile unsigned int *)(a))
#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v))
#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v))
/*
* TODO: do we need a barrier here?
*/
#define writeb(v,c) ({ unsigned char __v = v; __arch_putb(__v,c); __v; })
#define writew(v,c) ({ unsigned short __v = v; __arch_putw(__v,c); __v; })
#define writel(v,c) ({ unsigned int __v = v; __arch_putl(__v,c); __v; })
#define readb(c) ({ unsigned char __v = __arch_getb(c); __v; })
#define readw(c) ({ unsigned short __v = __arch_getw(c); __v; })
#define readl(c) ({ unsigned int __v = __arch_getl(c); __v; })
#define SYSTEM_CLOCK_12 12000000
#define SYSTEM_CLOCK_13 13000000
#define SYSTEM_CLOCK_192 19200000
#define SYSTEM_CLOCK_96 96000000
#define OMAP34XX_CORE_L4_IO_BASE 0x48000000
#define BEAGLE_BASE_UART_1 0x4806A000
#define BEAGLE_BASE_UART_2 0x4806C000
#define BEAGLE_BASE_UART_3 0x49020000
#define BEAGLE_BASE_UART_4 0x49020000
#define BEAGLE_BASE_UART_5 0x49020000
#define BEAGLE_BASE_UART_5 0x49020000
#define BEAGLE_BASE_UART_6 0x49020000
#define BEAGLE_BASE_UART_7 0x49020000
#define BEAGLE_UART_DLL_REG_OFFSET 0x000
#define BEAGLE_UART_RHR_REG_OFFSET 0x000
#define BEAGLE_UART_THR_REG_OFFSET 0x000
#define BEAGLE_UART_DLH_REG_OFFSET 0x004
#define BEAGLE_UART_IER_REG_OFFSET 0x004
#define BEAGLE_UART_IIR_REG_OFFSET 0x008
#define BEAGLE_UART_FCR_REG_OFFSET 0x008
#define BEAGLE_UART_EFR_REG_OFFSET 0x008
#define BEAGLE_UART_LCR_REG_OFFSET 0x00C
#define BEAGLE_UART_MCR_REG_OFFSET 0x010
#define BEAGLE_UART_XON1_ADDR1_REG_OFFSET 0x010
#define BEAGLE_UART_LSR_REG_OFFSET 0x014
#define BEAGLE_UART_XON2_ADDR2_REG_OFFSET 0x014
#define BEAGLE_UART_MSR_REG_OFFSET 0x018
#define BEAGLE_UART_TCR_REG_OFFSET 0x018
#define BEAGLE_UART_XOFF1_REG_OFFSET 0x018
#define BEAGLE_UART_SPR_REG_OFFSET 0x01C
#define BEAGLE_UART_TLR_REG_OFFSET 0x01C
#define BEAGLE_UART_XOFF2_REG_OFFSET 0x01C
#define BEAGLE_UART_MDR1_REG_OFFSET 0x020
#define BEAGLE_UART_MDR2_REG_OFFSET 0x024
#define BEAGLE_UART_SFLSR_REG_OFFSET 0x028
#define BEAGLE_UART_TXFLL_REG_OFFSET 0x028
#define BEAGLE_UART_RESUME_REG_OFFSET 0x02C
#define BEAGLE_UART_TXFLH_REG_OFFSET 0x02C
#define BEAGLE_UART_SFREGL_REG_OFFSET 0x030
#define BEAGLE_UART_RXFLL_REG_OFFSET 0x030
#define BEAGLE_UART_SFREGH_REG_OFFSET 0x034
#define BEAGLE_UART_RXFLH_REG_OFFSET 0x034
#define BEAGLE_UART_UASR_REG_OFFSET 0x038
#define BEAGLE_UART_BLR_REG_OFFSET 0x038
#define BEAGLE_UART_ACREG_REG_OFFSET 0x03C
#define BEAGLE_UART_SCR_REG_OFFSET 0x040
#define BEAGLE_UART_SSR_REG_OFFSET 0x044
#define BEAGLE_UART_EBLR_REG_OFFSET 0x048
#define BEAGLE_UART_MVR_REG_OFFSET 0x050
#define BEAGLE_UART_SYSC_REG_OFFSET 0x054
#define BEAGLE_UART_SYSS_REG_OFFSET 0x058
#define BEAGLE_UART_WER_REG_OFFSET 0x05C
#define BEAGLE_UART_CFPS_REG_OFFSET 0x060
#define BEAGLE_UART5_DLL = BAGLE_BASE_UART5 + BEAGLE_UART_DLL_REG_OFFSET
#define BEAGLE_UART5_RHR = BAGLE_BASE_UART5 + \
BEAGLE_UART_BEAGLE_UART_RHR_REG_OFFSET
#define BEAGLE_UART5_THR = BAGLE_BASE_UART5 + BEAGLE_UART_THR_REG_OFFSET
#define BEAGLE_UART5_DLH = BAGLE_BASE_UART5 + BEAGLE_UART_DLH_REG_OFFSET
#define BEAGLE_UART5_IER = BAGLE_BASE_UART5 + BEAGLE_UART_IER_REG_OFFSET
#define BEAGLE_UART5_IIR = BAGLE_BASE_UART5 + BEAGLE_UART_IIR_REG_OFFSET
#define BEAGLE_UART5_FCR = BAGLE_BASE_UART5 + BEAGLE_UART_FCR_REG_OFFSET
#define BEAGLE_UART5_EFR = BAGLE_BASE_UART5 + BEAGLE_UART_EFR_REG_OFFSET
#define BEAGLE_UART5_LCR = BAGLE_BASE_UART5 + BEAGLE_UART_LCR_REG_OFFSET
#define BEAGLE_UART5_MCR = BAGLE_BASE_UART5 + BEAGLE_UART_MCR_REG_OFFSET
#define BEAGLE_UART5_XON1_ADDR1 = BAGLE_BASE_UART5 + \
BEAGLE_UART_XON1_ADDR1_REG_OFFSET
#define BEAGLE_UART5_LSR = BAGLE_BASE_UART5 + BEAGLE_UART_LSR_REG_OFFSET
#define BEAGLE_UART5_XON2_ADDR2 = BAGLE_BASE_UART5 + \
BEAGLE_UART_XON2_ADDR2_REG_OFFSET
#define BEAGLE_UART5_MSR = BAGLE_BASE_UART5 + BEAGLE_UART_MSR_REG_OFFSET
#define BEAGLE_UART5_TCR = BAGLE_BASE_UART5 + BEAGLE_UART_TCR_REG_OFFSET
#define BEAGLE_UART5_XOFF1 = BAGLE_BASE_UART5 + BEAGLE_UART_XOFF1_REG_OFFSET
#define BEAGLE_UART5_SPR = BAGLE_BASE_UART5 + BEAGLE_UART_SPR_REG_OFFSET
#define BEAGLE_UART5_TLR = BAGLE_BASE_UART5 + BEAGLE_UART_TLR_REG_OFFSET
#define BEAGLE_UART5_XOFF2 = BAGLE_BASE_UART5 + BEAGLE_UART_XOFF2_REG_OFFSET
#define BEAGLE_UART5_MDR1 = BAGLE_BASE_UART5 + BEAGLE_UART_MDR1_REG_OFFSET
#define BEAGLE_UART5_MDR2 = BAGLE_BASE_UART5 + BEAGLE_UART_MDR2_REG_OFFSET
#define BEAGLE_UART5_SFLSR = BAGLE_BASE_UART5 + BEAGLE_UART_SFLSR_REG_OFFSET
#define BEAGLE_UART5_TXFLL = BAGLE_BASE_UART5 + BEAGLE_UART_TXFLL_REG_OFFSET
#define BEAGLE_UART5_RESUME = BAGLE_BASE_UART5 + BEAGLE_UART_RESUME_REG_OFFSET
#define BEAGLE_UART5_TXFLH = BAGLE_BASE_UART5 + BEAGLE_UART_TXFLH_REG_OFFSET
#define BEAGLE_UART5_SFREGL = BAGLE_BASE_UART5 + BEAGLE_UART_SFREGL_REG_OFFSET
#define BEAGLE_UART5_RXFLL = BAGLE_BASE_UART5 + BEAGLE_UART_RXFLL_REG_OFFSET
#define BEAGLE_UART5_SFREGH = BAGLE_BASE_UART5 + BEAGLE_UART_SFREGH_REG_OFFSET
#define BEAGLE_UART5_RXFLH = BAGLE_BASE_UART5 + BEAGLE_UART_RXFLH_REG_OFFSET
#define BEAGLE_UART5_UASR = BAGLE_BASE_UART5 + BEAGLE_UART_UASR_REG_OFFSET
#define BEAGLE_UART5_BLR = BAGLE_BASE_UART5 + BEAGLE_UART_BLR_REG_OFFSET
#define BEAGLE_UART5_ACREG = BAGLE_BASE_UART5 + BEAGLE_UART_ACREG_REG_OFFSET
#define BEAGLE_UART5_SCR = BAGLE_BASE_UART5 + BEAGLE_UART_SCR_REG_OFFSET
#define BEAGLE_UART5_SSR = BAGLE_BASE_UART5 + BEAGLE_UART_SSR_REG_OFFSET
#define BEAGLE_UART5_EBLR = BAGLE_BASE_UART5 + BEAGLE_UART_EBLR_REG_OFFSET
#define BEAGLE_UART5_MVR = BAGLE_BASE_UART5 + BEAGLE_UART_MVR_REG_OFFSET
#define BEAGLE_UART5_SYSC = BAGLE_BASE_UART5 + BEAGLE_UART_SYSC_REG_OFFSET
#define BEAGLE_UART5_SYSS = BAGLE_BASE_UART5 + BEAGLE_UART_SYSS_REG_OFFSET
#define BEAGLE_UART5_WER = BAGLE_BASE_UART5 + BEAGLE_UART_WER_REG_OFFSET
#define BEAGLE_UART5_CFPS = BAGLE_BASE_UART5 + BEAGLE_UART_CFPS_REG_OFFSET
/**
* @defgroup beagle_reg Register Definitions
*
* @ingroup beagle
*
* @brief Register definitions.
*
* @{
*/
/**
* @name Register Base Addresses
*
* @{
*/
#define BEAGLE_BASE_ADC 0x40048000
#define BEAGLE_BASE_SYSCON 0x40004000
#define BEAGLE_BASE_DEBUG_CTRL 0x40040000
#define BEAGLE_BASE_DMA 0x31000000
#define BEAGLE_BASE_EMC 0x31080000
#define BEAGLE_BASE_EMC_CS_0 0xe0000000
#define BEAGLE_BASE_EMC_CS_1 0xe1000000
#define BEAGLE_BASE_EMC_CS_2 0xe2000000
#define BEAGLE_BASE_EMC_CS_3 0xe3000000
#define BEAGLE_BASE_EMC_DYCS_0 0x80000000
#define BEAGLE_BASE_EMC_DYCS_1 0xa0000000
#define BEAGLE_BASE_ETB_CFG 0x310c0000
#define BEAGLE_BASE_ETB_DATA 0x310e0000
#define BEAGLE_BASE_ETHERNET 0x31060000
#define BEAGLE_BASE_GPIO 0x40028000
#define BEAGLE_BASE_I2C_1 0x400a0000
#define BEAGLE_BASE_I2C_2 0x400a8000
#define BEAGLE_BASE_I2S_0 0x20094000
#define BEAGLE_BASE_I2S_1 0x2009c000
#define BEAGLE_BASE_IRAM 0x08000000
#define BEAGLE_BASE_IROM 0x0c000000
#define BEAGLE_BASE_KEYSCAN 0x40050000
#define BEAGLE_BASE_LCD 0x31040000
#define BEAGLE_BASE_MCPWM 0x400e8000
#define BEAGLE_BASE_MIC 0x40008000
#define BEAGLE_BASE_NAND_MLC 0x200a8000
#define BEAGLE_BASE_NAND_SLC 0x20020000
#define BEAGLE_BASE_PWM_1 0x4005c000
#define BEAGLE_BASE_PWM_2 0x4005c004
#define BEAGLE_BASE_PWM_3 0x4002c000
#define BEAGLE_BASE_PWM_4 0x40030000
#define BEAGLE_BASE_RTC 0x40024000
#define BEAGLE_BASE_RTC_RAM 0x40024080
#define BEAGLE_BASE_SDCARD 0x20098000
#define BEAGLE_BASE_SIC_1 0x4000c000
#define BEAGLE_BASE_SIC_2 0x40010000
#define BEAGLE_BASE_SPI_1 0x20088000
#define BEAGLE_BASE_SPI_2 0x20090000
#define BEAGLE_BASE_SSP_0 0x20084000
#define BEAGLE_BASE_SSP_1 0x2008c000
#define BEAGLE_BASE_TIMER_0 0x40044000
#define BEAGLE_BASE_TIMER_1 0x4004c000
#define BEAGLE_BASE_TIMER_2 0x40058000
#define BEAGLE_BASE_TIMER_3 0x40060000
#define BEAGLE_BASE_TIMER_5 0x4002c000
#define BEAGLE_BASE_TIMER_6 0x40030000
#define BEAGLE_BASE_TIMER_HS 0x40038000
#define BEAGLE_BASE_TIMER_MS 0x40034000
//#define BEAGLE_BASE_UART_1 0x40014000
//#define BEAGLE_BASE_UART_2 0x40018000
//#define BEAGLE_BASE_UART_3 0x40080000
//#define BEAGLE_BASE_UART_4 0x40088000
//#define BEAGLE_BASE_UART_5 0x40090000
//#define BEAGLE_BASE_UART_5 0x49020000
//#define BEAGLE_BASE_UART_6 0x40098000
//#define BEAGLE_BASE_UART_7 0x4001c000
#define BEAGLE_BASE_USB 0x31020000
#define BEAGLE_BASE_USB_OTG_I2C 0x31020300
#define BEAGLE_BASE_WDT 0x4003c000
/** @} */
/**
* @name Miscanellanous Registers
*
* @{
*/
#define BEAGLE_U3CLK (*(volatile uint32_t *) 0x400040d0)
#define BEAGLE_U4CLK (*(volatile uint32_t *) 0x400040d4)
#define BEAGLE_U5CLK (*(volatile uint32_t *) 0x400040d8)
#define BEAGLE_U6CLK (*(volatile uint32_t *) 0x400040dc)
#define BEAGLE_IRDACLK (*(volatile uint32_t *) 0x400040e0)
#define BEAGLE_UART_CTRL (*(volatile uint32_t *) 0x40054000)
#define BEAGLE_UART_CLKMODE (*(volatile uint32_t *) 0x40054004)
#define BEAGLE_UART_LOOP (*(volatile uint32_t *) 0x40054008)
#define BEAGLE_SW_INT (*(volatile uint32_t *) 0x400040a8)
#define BEAGLE_MAC_CLK_CTRL (*(volatile uint32_t *) 0x40004090)
#define BEAGLE_USB_DIV (*(volatile uint32_t *) 0x4000401c)
#define BEAGLE_OTG_CLK_CTRL (*(volatile uint32_t *) 0x31020ff4)
#define BEAGLE_OTG_CLK_STAT (*(volatile uint32_t *) 0x31020ff8)
#define BEAGLE_OTG_STAT_CTRL (*(volatile uint32_t *) 0x31020110)
#define BEAGLE_I2C_RX (*(volatile uint32_t *) 0x31020300)
#define BEAGLE_I2C_TX (*(volatile uint32_t *) 0x31020300)
#define BEAGLE_I2C_STS (*(volatile uint32_t *) 0x31020304)
#define BEAGLE_I2C_CTL (*(volatile uint32_t *) 0x31020308)
#define BEAGLE_I2C_CLKHI (*(volatile uint32_t *) 0x3102030c)
#define BEAGLE_I2C_CLKLO (*(volatile uint32_t *) 0x31020310)
#define BEAGLE_PWR_CTRL (*(volatile uint32_t *) 0x40004044)
#define BEAGLE_OSC_CTRL (*(volatile uint32_t *) 0x4000404c)
#define BEAGLE_SYSCLK_CTRL (*(volatile uint32_t *) 0x40004050)
#define BEAGLE_PLL397_CTRL (*(volatile uint32_t *) 0x40004048)
#define BEAGLE_HCLKPLL_CTRL (*(volatile uint32_t *) 0x40004058)
#define BEAGLE_HCLKDIV_CTRL (*(volatile uint32_t *) 0x40004040)
#define BEAGLE_TEST_CLK (*(volatile uint32_t *) 0x400040a4)
#define BEAGLE_AUTOCLK_CTRL (*(volatile uint32_t *) 0x400040ec)
#define BEAGLE_START_ER_PIN (*(volatile uint32_t *) 0x40004030)
#define BEAGLE_START_ER_INT (*(volatile uint32_t *) 0x40004020)
#define BEAGLE_P0_INTR_ER (*(volatile uint32_t *) 0x40004018)
#define BEAGLE_START_SR_PIN (*(volatile uint32_t *) 0x40004038)
#define BEAGLE_START_SR_INT (*(volatile uint32_t *) 0x40004028)
#define BEAGLE_START_RSR_PIN (*(volatile uint32_t *) 0x40004034)
#define BEAGLE_START_RSR_INT (*(volatile uint32_t *) 0x40004024)
#define BEAGLE_START_APR_PIN (*(volatile uint32_t *) 0x4000403c)
#define BEAGLE_START_APR_INT (*(volatile uint32_t *) 0x4000402c)
#define BEAGLE_USB_CTRL (*(volatile uint32_t *) 0x40004064)
#define BEAGLE_USBDIV_CTRL (*(volatile uint32_t *) 0x4000401c)
#define BEAGLE_MS_CTRL (*(volatile uint32_t *) 0x40004080)
#define BEAGLE_DMACLK_CTRL (*(volatile uint32_t *) 0x400040e8)
#define BEAGLE_FLASHCLK_CTRL (*(volatile uint32_t *) 0x400040c8)
#define BEAGLE_MACCLK_CTRL (*(volatile uint32_t *) 0x40004090)
#define BEAGLE_LCDCLK_CTRL (*(volatile uint32_t *) 0x40004054)
#define BEAGLE_I2S_CTRL (*(volatile uint32_t *) 0x4000407c)
#define BEAGLE_SSP_CTRL (*(volatile uint32_t *) 0x40004078)
#define BEAGLE_SPI_CTRL (*(volatile uint32_t *) 0x400040c4)
#define BEAGLE_I2CCLK_CTRL (*(volatile uint32_t *) 0x400040ac)
#define BEAGLE_TIMCLK_CTRL1 (*(volatile uint32_t *) 0x400040c0)
#define BEAGLE_TIMCLK_CTRL (*(volatile uint32_t *) 0x400040bc)
#define BEAGLE_ADCLK_CTRL (*(volatile uint32_t *) 0x400040b4)
#define BEAGLE_ADCLK_CTRL1 (*(volatile uint32_t *) 0x40004060)
#define BEAGLE_KEYCLK_CTRL (*(volatile uint32_t *) 0x400040b0)
#define BEAGLE_PWMCLK_CTRL (*(volatile uint32_t *) 0x400040b8)
#define BEAGLE_UARTCLK_CTRL (*(volatile uint32_t *) 0x400040e4)
#define BEAGLE_POS0_IRAM_CTRL (*(volatile uint32_t *) 0x40004110)
#define BEAGLE_POS1_IRAM_CTRL (*(volatile uint32_t *) 0x40004114)
#define BEAGLE_SDRAMCLK_CTRL (*(volatile uint32_t *) 0x40004068)
/** @} */
/**
* @name Power Control Register (PWR_CTRL)
*
* @{
*/
#define PWR_STOP BSP_BIT32(0)
#define PWR_HIGHCORE_ALWAYS BSP_BIT32(1)
#define PWR_NORMAL_RUN_MODE BSP_BIT32(2)
#define PWR_SYSCLKEN_ALWAYS BSP_BIT32(3)
#define PWR_SYSCLKEN_HIGH BSP_BIT32(4)
#define PWR_HIGHCORE_HIGH BSP_BIT32(5)
#define PWR_SDRAM_AUTO_REFRESH BSP_BIT32(7)
#define PWR_UPDATE_EMCSREFREQ BSP_BIT32(8)
#define PWR_EMCSREFREQ BSP_BIT32(9)
#define PWR_HCLK_USES_PERIPH_CLK BSP_BIT32(10)
/** @} */
/**
* @name HCLK PLL Control Register (HCLKPLL_CTRL)
*
* @{
*/
#define HCLK_PLL_LOCK BSP_BIT32(0)
#define HCLK_PLL_M(val) BSP_FLD32(val, 1, 8)
#define HCLK_PLL_M_GET(reg) BSP_FLD32GET(reg, 1, 8)
#define HCLK_PLL_N(val) BSP_FLD32(val, 9, 10)
#define HCLK_PLL_N_GET(reg) BSP_FLD32GET(reg, 9, 10)
#define HCLK_PLL_P(val) BSP_FLD32(val, 11, 12)
#define HCLK_PLL_P_GET(reg) BSP_FLD32GET(reg, 11, 12)
#define HCLK_PLL_FBD_FCLKOUT BSP_BIT32(13)
#define HCLK_PLL_DIRECT BSP_BIT32(14)
#define HCLK_PLL_BYPASS BSP_BIT32(15)
#define HCLK_PLL_POWER BSP_BIT32(16)
/** @} */
/**
* @name HCLK Divider Control Register (HCLKDIV_CTRL)
*
* @{
*/
#define HCLK_DIV_HCLK(val) BSP_FLD32(val, 0, 1)
#define HCLK_DIV_HCLK_GET(reg) BSP_FLD32GET(reg, 0, 1)
#define HCLK_DIV_PERIPH_CLK(val) BSP_FLD32(val, 2, 6)
#define HCLK_DIV_PERIPH_CLK_GET(reg) BSP_FLD32GET(reg, 2, 6)
#define HCLK_DIV_DDRAM_CLK(val) BSP_FLD32(val, 7, 8)
#define HCLK_DIV_DDRAM_CLK_GET(reg) BSP_FLD32GET(reg, 7, 8)
/** @} */
/**
* @name Timer Clock Control Register (TIMCLK_CTRL)
*
* @{
*/
#define TIMCLK_CTRL_WDT BSP_BIT32(0)
#define TIMCLK_CTRL_HST BSP_BIT32(1)
/** @} */
#define BEAGLE_FILL(a, b, s) uint8_t reserved_ ## b [b - a - sizeof(s)]
#define BEAGLE_RESERVE(a, b) uint8_t reserved_ ## b [b - a]
typedef struct {
} beagle_nand_slc;
typedef struct {
} beagle_ssp;
typedef struct {
} beagle_spi;
typedef struct {
} beagle_sd_card;
typedef struct {
} beagle_usb;
typedef struct {
} beagle_lcd;
typedef struct {
} beagle_etb;
typedef struct {
} beagle_syscon;
typedef struct {
} beagle_uart_ctrl;
typedef struct {
} beagle_uart;
typedef struct {
} beagle_ms_timer;
typedef struct {
} beagle_hs_timer;
/**
* @name Watchdog Timer Interrupt Status Register (WDTIM_INT)
*
* @{
*/
#define WDTTIM_INT_MATCH_INT BSP_BIT32(0)
/** @} */
/**
* @name Watchdog Timer Control Register (WDTIM_CTRL)
*
* @{
*/
#define WDTTIM_CTRL_COUNT_ENAB BSP_BIT32(0)
#define WDTTIM_CTRL_RESET_COUNT BSP_BIT32(1)
#define WDTTIM_CTRL_PAUSE_EN BSP_BIT32(2)
/** @} */
/**
* @name Watchdog Timer Match Control Register (WDTIM_MCTRL)
*
* @{
*/
#define WDTTIM_MCTRL_MR0_INT BSP_BIT32(0)
#define WDTTIM_MCTRL_RESET_COUNT0 BSP_BIT32(1)
#define WDTTIM_MCTRL_STOP_COUNT0 BSP_BIT32(2)
#define WDTTIM_MCTRL_M_RES1 BSP_BIT32(3)
#define WDTTIM_MCTRL_M_RES2 BSP_BIT32(4)
#define WDTTIM_MCTRL_RESFRC1 BSP_BIT32(5)
#define WDTTIM_MCTRL_RESFRC2 BSP_BIT32(6)
/** @} */
/**
* @name Watchdog Timer External Match Control Register (WDTIM_EMR)
*
* @{
*/
#define WDTTIM_EMR_EXT_MATCH0 BSP_BIT32(0)
#define WDTTIM_EMR_MATCH_CTRL(val) BSP_FLD32(val, 4, 5)
#define WDTTIM_EMR_MATCH_CTRL_SET(reg, val) BSP_FLD32SET(reg, val, 4, 5)
/** @} */
/**
* @name Watchdog Timer Reset Source Register (WDTIM_RES)
*
* @{
*/
#define WDTTIM_RES_WDT BSP_BIT32(0)
/** @} */
typedef struct {
uint32_t intr;
uint32_t ctrl;
uint32_t counter;
uint32_t mctrl;
uint32_t match0;
uint32_t emr;
uint32_t pulse;
uint32_t res;
} beagle_wdt;
typedef struct {
} beagle_debug;
typedef struct {
} beagle_adc;
typedef struct {
} beagle_keyscan;
typedef struct {
} beagle_pwm;
typedef struct {
} beagle_mcpwm;
typedef struct {
uint32_t mac1;
uint32_t mac2;
uint32_t ipgt;
uint32_t ipgr;
uint32_t clrt;
uint32_t maxf;
uint32_t supp;
uint32_t test;
uint32_t mcfg;
uint32_t mcmd;
uint32_t madr;
uint32_t mwtd;
uint32_t mrdd;
uint32_t mind;
uint32_t reserved_0 [2];
uint32_t sa0;
uint32_t sa1;
uint32_t sa2;
uint32_t reserved_1 [45];
uint32_t command;
uint32_t status;
uint32_t rxdescriptor;
uint32_t rxstatus;
uint32_t rxdescriptornum;
uint32_t rxproduceindex;
uint32_t rxconsumeindex;
uint32_t txdescriptor;
uint32_t txstatus;
uint32_t txdescriptornum;
uint32_t txproduceindex;
uint32_t txconsumeindex;
uint32_t reserved_2 [10];
uint32_t tsv0;
uint32_t tsv1;
uint32_t rsv;
uint32_t reserved_3 [3];
uint32_t flowcontrolcnt;
uint32_t flowcontrolsts;
uint32_t reserved_4 [34];
uint32_t rxfilterctrl;
uint32_t rxfilterwolsts;
uint32_t rxfilterwolclr;
uint32_t reserved_5 [1];
uint32_t hashfilterl;
uint32_t hashfilterh;
uint32_t reserved_6 [882];
uint32_t intstatus;
uint32_t intenable;
uint32_t intclear;
uint32_t intset;
uint32_t reserved_7 [1];
uint32_t powerdown;
} beagle_eth;
typedef struct {
uint32_t er;
uint32_t rsr;
uint32_t sr;
uint32_t apr;
uint32_t atr;
uint32_t itr;
} beagle_irq;
typedef struct {
uint32_t p3_inp_state;
uint32_t p3_outp_set;
uint32_t p3_outp_clr;
uint32_t p3_outp_state;
uint32_t p2_dir_set;
uint32_t p2_dir_clr;
uint32_t p2_dir_state;
uint32_t p2_inp_state;
uint32_t p2_outp_set;
uint32_t p2_outp_clr;
uint32_t p2_mux_set;
uint32_t p2_mux_clr;
uint32_t p2_mux_state;
BEAGLE_RESERVE(0x034, 0x040);
uint32_t p0_inp_state;
uint32_t p0_outp_set;
uint32_t p0_outp_clr;
uint32_t p0_outp_state;
uint32_t p0_dir_set;
uint32_t p0_dir_clr;
uint32_t p0_dir_state;
BEAGLE_RESERVE(0x05c, 0x060);
uint32_t p1_inp_state;
uint32_t p1_outp_set;
uint32_t p1_outp_clr;
uint32_t p1_outp_state;
uint32_t p1_dir_set;
uint32_t p1_dir_clr;
uint32_t p1_dir_state;
BEAGLE_RESERVE(0x07c, 0x110);
uint32_t p3_mux_set;
uint32_t p3_mux_clr;
uint32_t p3_mux_state;
uint32_t p0_mux_set;
uint32_t p0_mux_clr;
uint32_t p0_mux_state;
uint32_t p1_mux_set;
uint32_t p1_mux_clr;
uint32_t p1_mux_state;
} beagle_gpio;
typedef struct {
uint32_t rx_or_tx;
uint32_t stat;
uint32_t ctrl;
uint32_t clk_hi;
uint32_t clk_lo;
uint32_t adr;
uint32_t rxfl;
uint32_t txfl;
uint32_t rxb;
uint32_t txb;
uint32_t s_tx;
uint32_t s_txfl;
} beagle_i2c;
typedef struct {
uint32_t ucount;
uint32_t dcount;
uint32_t match0;
uint32_t match1;
uint32_t ctrl;
uint32_t intstat;
uint32_t key;
uint32_t sram [32];
} beagle_rtc;
typedef struct {
uint32_t control;
uint32_t status;
uint32_t timeout;
uint32_t reserved_0 [5];
} beagle_emc_ahb;
typedef struct {
union {
uint32_t w32;
uint16_t w16;
uint8_t w8;
} buff;
uint32_t reserved_0 [8191];
union {
uint32_t w32;
uint16_t w16;
uint8_t w8;
} data;
uint32_t reserved_1 [8191];
uint32_t cmd;
uint32_t addr;
uint32_t ecc_enc;
uint32_t ecc_dec;
uint32_t ecc_auto_enc;
uint32_t ecc_auto_dec;
uint32_t rpr;
uint32_t wpr;
uint32_t rubp;
uint32_t robp;
uint32_t sw_wp_add_low;
uint32_t sw_wp_add_hig;
uint32_t icr;
uint32_t time;
uint32_t irq_mr;
uint32_t irq_sr;
uint32_t reserved_2;
uint32_t lock_pr;
uint32_t isr;
uint32_t ceh;
} beagle_nand_mlc;
typedef struct {
beagle_nand_slc nand_slc;
BEAGLE_FILL(0x20020000, 0x20084000, beagle_nand_slc);
beagle_ssp ssp_0;
BEAGLE_FILL(0x20084000, 0x20088000, beagle_ssp);
beagle_spi spi_1;
BEAGLE_FILL(0x20088000, 0x2008c000, beagle_spi);
beagle_ssp ssp_1;
BEAGLE_FILL(0x2008c000, 0x20090000, beagle_ssp);
beagle_spi spi_2;
BEAGLE_FILL(0x20090000, 0x20094000, beagle_spi);
//beagle_i2s i2s_0;
//BEAGLE_FILL(0x20094000, 0x20098000, beagle_i2s);
beagle_sd_card sd_card;
BEAGLE_FILL(0x20098000, 0x2009c000, beagle_sd_card);
//beagle_i2s i2s_1;
//BEAGLE_FILL(0x2009c000, 0x200a8000, beagle_i2s);
beagle_nand_mlc nand_mlc;
BEAGLE_FILL(0x200a8000, 0x31000000, beagle_nand_mlc);
//beagle_dma dma;
//BEAGLE_FILL(0x31000000, 0x31020000, beagle_dma);
beagle_usb usb;
BEAGLE_FILL(0x31020000, 0x31040000, beagle_usb);
beagle_lcd lcd;
BEAGLE_FILL(0x31040000, 0x31060000, beagle_lcd);
beagle_eth eth;
BEAGLE_FILL(0x31060000, 0x31080000, beagle_eth);
//beagle_emc emc;
//BEAGLE_FILL(0x31080000, 0x31080400, beagle_emc);
beagle_emc_ahb emc_ahb [5];
BEAGLE_FILL(0x31080400, 0x310c0000, beagle_emc_ahb [5]);
beagle_etb etb;
BEAGLE_FILL(0x310c0000, 0x40004000, beagle_etb);
beagle_syscon syscon;
BEAGLE_FILL(0x40004000, 0x40008000, beagle_syscon);
beagle_irq mic;
BEAGLE_FILL(0x40008000, 0x4000c000, beagle_irq);
beagle_irq sic_1;
BEAGLE_FILL(0x4000c000, 0x40010000, beagle_irq);
beagle_irq sic_2;
BEAGLE_FILL(0x40010000, 0x40014000, beagle_irq);
beagle_uart uart_1;
BEAGLE_FILL(0x40014000, 0x40018000, beagle_uart);
beagle_uart uart_2;
BEAGLE_FILL(0x40018000, 0x4001c000, beagle_uart);
beagle_uart uart_7;
BEAGLE_FILL(0x4001c000, 0x40024000, beagle_uart);
beagle_rtc rtc;
BEAGLE_FILL(0x40024000, 0x40028000, beagle_rtc);
beagle_gpio gpio;
BEAGLE_FILL(0x40028000, 0x4002c000, beagle_gpio);
beagle_timer timer_4;
BEAGLE_FILL(0x4002c000, 0x40030000, beagle_timer);
beagle_timer timer_5;
BEAGLE_FILL(0x40030000, 0x40034000, beagle_timer);
beagle_ms_timer ms_timer;
BEAGLE_FILL(0x40034000, 0x40038000, beagle_ms_timer);
beagle_hs_timer hs_timer;
BEAGLE_FILL(0x40038000, 0x4003c000, beagle_hs_timer);
beagle_wdt wdt;
BEAGLE_FILL(0x4003c000, 0x40040000, beagle_wdt);
beagle_debug debug;
BEAGLE_FILL(0x40040000, 0x40044000, beagle_debug);
beagle_timer timer_0;
BEAGLE_FILL(0x40044000, 0x40048000, beagle_timer);
beagle_adc adc;
BEAGLE_FILL(0x40048000, 0x4004c000, beagle_adc);
beagle_timer timer_1;
BEAGLE_FILL(0x4004c000, 0x40050000, beagle_timer);
beagle_keyscan keyscan;
BEAGLE_FILL(0x40050000, 0x40054000, beagle_keyscan);
beagle_uart_ctrl uart_ctrl;
BEAGLE_FILL(0x40054000, 0x40058000, beagle_uart_ctrl);
beagle_timer timer_2;
BEAGLE_FILL(0x40058000, 0x4005c000, beagle_timer);
beagle_pwm pwm_1_and_pwm_2;
BEAGLE_FILL(0x4005c000, 0x40060000, beagle_pwm);
beagle_timer timer3;
BEAGLE_FILL(0x40060000, 0x40080000, beagle_timer);
beagle_uart uart_3;
BEAGLE_FILL(0x40080000, 0x40088000, beagle_uart);
beagle_uart uart_4;
BEAGLE_FILL(0x40088000, 0x40090000, beagle_uart);
beagle_uart uart_5;
BEAGLE_FILL(0x40090000, 0x40098000, beagle_uart);
beagle_uart uart_6;
BEAGLE_FILL(0x40098000, 0x400a0000, beagle_uart);
beagle_i2c i2c_1;
BEAGLE_FILL(0x400a0000, 0x400a8000, beagle_i2c);
beagle_i2c i2c_2;
BEAGLE_FILL(0x400a8000, 0x400e8000, beagle_i2c);
beagle_mcpwm mcpwm;
} beagle_registers;
extern volatile beagle_registers beagle;
/** @} */
#endif /* LIBBSP_ARM_BEAGLE_BEAGLE_H */

117
c/src/lib/libbsp/arm/beagle/include/boot.h Normal file
View File

@@ -0,0 +1,117 @@
/**
* @file
*
* @ingroup beagle_boot
*
* @brief Boot support API.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#ifndef LIBBSP_ARM_BEAGLE_BOOT_H
#define LIBBSP_ARM_BEAGLE_BOOT_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup beagle_boot Boot Support
*
* @ingroup beagle
*
* @brief Boot support.
*
* The NXP internal boot program shall be the "stage-0 program".
*
* The boot program within the first page of the first or second block shall be
* "stage-1 program". It will be invoked by the stage-0 program from NXP.
*
* The program loaded by the stage-1 program will be the "stage-2 program" or
* the "boot loader".
*
* The program loaded by the stage-2 program will be the "stage-3 program" or
* the "application".
*
* The stage-1 program image must have a format specified by NXP.
*
* The stage-2 and stage-3 program images may have any format.
*
* @{
*/
#define MLC_SMALL_DATA_SIZE 512
#define MLC_SMALL_DATA_WORD_COUNT (MLC_SMALL_DATA_SIZE / 4)
#define BEAGLE_BOOT_BLOCK_0 0
#define BEAGLE_BOOT_BLOCK_1 1
#define BEAGLE_BOOT_ICR_SP_3AC_8IF 0xf0
#define BEAGLE_BOOT_ICR_SP_4AC_8IF 0xd2
#define BEAGLE_BOOT_ICR_LP_4AC_8IF 0xb4
#define BEAGLE_BOOT_ICR_LP_5AC_8IF 0x96
typedef union {
struct {
uint8_t d0;
uint8_t reserved_0 [3];
uint8_t d1;
uint8_t reserved_1 [3];
uint8_t d2;
uint8_t reserved_2 [3];
uint8_t d3;
uint8_t reserved_3 [3];
uint8_t d4;
uint8_t reserved_4 [3];
uint8_t d5;
uint8_t reserved_5 [3];
uint8_t d6;
uint8_t reserved_6 [3];
uint8_t d7;
uint8_t reserved_7 [3];
uint8_t d8;
uint8_t reserved_8 [3];
uint8_t d9;
uint8_t reserved_9 [3];
uint8_t d10;
uint8_t reserved_10 [3];
uint8_t d11;
uint8_t reserved_11 [3];
uint8_t d12;
uint8_t reserved_12 [463];
} field;
uint32_t data [MLC_SMALL_DATA_WORD_COUNT];
} beagle_boot_block;
void beagle_setup_boot_block(
beagle_boot_block *boot_block,
uint8_t icr,
uint8_t page_count
);
void beagle_set_boot_block_bad(
beagle_boot_block *boot_block
);
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_ARM_BEAGLE_BOOT_H */

249
c/src/lib/libbsp/arm/beagle/include/bsp.h Normal file
View File

@@ -0,0 +1,249 @@
/**
* @file
*
* @ingroup beagle
*
* @brief Global BSP definitions.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#ifndef LIBBSP_ARM_BEAGLE_BSP_H
#define LIBBSP_ARM_BEAGLE_BSP_H
#include <bspopts.h>
#include <rtems.h>
//#include <rtems/console.h>
//#include <rtems/clockdrv.h>
#include <bsp/beagle.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_FEATURE_IRQ_EXTENSION
#ifndef ASM
struct rtems_bsdnet_ifconfig;
/**
* @defgroup beagle BEAGLE Support
*
* @ingroup bsp_kit
*
* @brief BEAGLE support package.
*
* @{
*/
/**
* @brief Network driver attach and detach function.
*/
int beagle_eth_attach_detach(
struct rtems_bsdnet_ifconfig *config,
int attaching
);
/**
* @brief Standard network driver attach and detach function.
*/
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH beagle_eth_attach_detach
/**
* @brief Standard network driver name.
*/
#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0"
/**
* @brief Optimized idle task.
*
* This idle task sets the power mode to idle. This causes the processor clock
* to be stopped, while on-chip peripherals remain active. Any enabled
* interrupt from a peripheral or an external interrupt source will cause the
* processor to resume execution.
*
* To enable the idle task use the following in the system configuration:
*
* @code
* #include <bsp.h>
*
* #define CONFIGURE_INIT
*
* #define CONFIGURE_IDLE_TASK_BODY beagle_idle
*
* #include <confdefs.h>
* @endcode
*/
void *beagleboard_idle(uintptr_t ignored);
#define BEAGLE_STANDARD_TIMER (&beagle.timer_1)
static inline unsigned beagleboard_timer(void)
{
volatile beagle_timer *timer = BEAGLE_STANDARD_TIMER;
return timer->tc;
}
static inline void beagleboard_micro_seconds_delay(unsigned us)
{
unsigned start = beagleboard_timer();
unsigned delay = us * (BEAGLE_PERIPH_CLK / 1000000);
unsigned elapsed = 0;
do {
elapsed = beagleboard_timer() - start;
} while (elapsed < delay);
}
#if BEAGLE_OSCILLATOR_MAIN == 13000000U
#define BEAGLE_HCLKPLL_CTRL_INIT_VALUE \
(HCLK_PLL_POWER | HCLK_PLL_DIRECT | HCLK_PLL_M(16 - 1))
#define BEAGLE_HCLKDIV_CTRL_INIT_VALUE \
(HCLK_DIV_HCLK(2 - 1) | \
HCLK_DIV_PERIPH_CLK(16 - 1) | \
HCLK_DIV_DDRAM_CLK(1))
#else
#error "unexpected main oscillator frequency"
#endif
bool beagleboard_start_pll_setup(
uint32_t hclkpll_ctrl,
uint32_t hclkdiv_ctrl,
bool force
);
uint32_t beagleboard__sysclk(void);
uint32_t beagleboard_hclkpll_clk(void);
uint32_t beagleboard_periph_clk(void);
uint32_t beagleboard_hclk(void);
uint32_t beagleboard_arm_clk(void);
uint32_t beagleboard_dram_clk(void);
void bsp_restart(void *addr);
#define BSP_CONSOLE_UART_BASE BEAGLE_BASE_UART_5
/**
* @brief Begin of magic zero area.
*
* A read from this area returns zero. Writes have no effect.
*/
//extern uint32_t beagle_magic_zero_begin [];
/**
* @brief End of magic zero area.
*
* A read from this area returns zero. Writes have no effect.
*/
//extern uint32_t beagle_magic_zero_end [];
/**
* @brief Size of magic zero area.
*
* A read from this area returns zero. Writes have no effect.
*/
//extern uint32_t beagle_magic_zero_size [];
#ifdef BEAGLE_SCRATCH_AREA_SIZE
/**
* @rief Scratch area.
*
* The usage is application specific.
*/
//extern uint8_t beagle_scratch_area [BEAGLE_SCRATCH_AREA_SIZE];
#endif
#define BEAGLE_DO_STOP_GPDMA \
do { \
if ((BEAGLE_DMACLK_CTRL & 0x1) != 0) { \
if ((beagle.dma.cfg & DMA_CFG_E) != 0) { \
int i = 0; \
for (i = 0; i < 8; ++i) { \
beagle.dma.channels [i].cfg = 0; \
} \
beagle.dma.cfg &= ~DMA_CFG_E; \
} \
BEAGLE_DMACLK_CTRL = 0; \
} \
} while (0)
#define BEAGLE_DO_STOP_ETHERNET \
do { \
if ((BEAGLE_MAC_CLK_CTRL & 0x7) == 0x7) { \
beagle.eth.command = 0x38; \
beagle.eth.mac1 = 0xcf00; \
beagle.eth.mac1 = 0; \
BEAGLE_MAC_CLK_CTRL = 0; \
} \
} while (0)
#define BEAGLE_DO_STOP_USB \
do { \
if ((BEAGLE_USB_CTRL & 0x010e8000) != 0) { \
BEAGLE_OTG_CLK_CTRL = 0; \
BEAGLE_USB_CTRL = 0x80000; \
} \
} while (0)
#define BEAGLE_DO_RESTART(addr) \
do { \
ARM_SWITCH_REGISTERS; \
rtems_interrupt_level level; \
uint32_t ctrl = 0; \
\
rtems_interrupt_disable(level); \
\
arm_cp15_data_cache_test_and_clean(); \
arm_cp15_instruction_cache_invalidate(); \
\
ctrl = arm_cp15_get_control(); \
ctrl &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M); \
arm_cp15_set_control(ctrl); \
\
__asm__ volatile ( \
ARM_SWITCH_TO_ARM \
"mov pc, %[addr]\n" \
ARM_SWITCH_BACK \
: ARM_SWITCH_OUTPUT \
: [addr] "r" (addr) \
); \
} while (0)
/** @} */
/**
* @defgroup beagle BEAGLE Support
*
* @ingroup beagle
*
* @brief BEAGLE support package.
*/
#endif /* ASM */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_ARM_BEAGLE_BSP_H */

453
c/src/lib/libbsp/arm/beagle/include/i2c.h Normal file
View File

@@ -0,0 +1,453 @@
/**
* @file
*
* @ingroup beagle_i2c
*
* @brief I2C support API.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#ifndef LIBBSP_ARM_BEAGLE_I2C_H
#define LIBBSP_ARM_BEAGLE_I2C_H
#include <rtems.h>
#include <bsp/beagle.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/* I2C Configuration Register (I2C_CON): */
#define I2C_CON_EN (1 << 15) /* I2C module enable */
#define I2C_CON_BE (1 << 14) /* Big endian mode */
#define I2C_CON_STB (1 << 11) /* Start byte mode (master mode only) */
#define I2C_CON_MST (1 << 10) /* Master/slave mode */
#define I2C_CON_TRX (1 << 9) /* Transmitter/receiver mode */
/* (master mode only) */
#define I2C_CON_XA (1 << 8) /* Expand address */
#define I2C_CON_STP (1 << 1) /* Stop condition (master mode only) */
#define I2C_CON_STT (1 << 0) /* Start condition (master mode only) */
/* I2C Status Register (I2C_STAT): */
#define I2C_STAT_SBD (1 << 15) /* Single byte data */
#define I2C_STAT_BB (1 << 12) /* Bus busy */
#define I2C_STAT_ROVR (1 << 11) /* Receive overrun */
#define I2C_STAT_XUDF (1 << 10) /* Transmit underflow */
#define I2C_STAT_AAS (1 << 9) /* Address as slave */
#define I2C_STAT_GC (1 << 5)
#define I2C_STAT_XRDY (1 << 4) /* Transmit data ready */
#define I2C_STAT_RRDY (1 << 3) /* Receive data ready */
#define I2C_STAT_ARDY (1 << 2) /* Register access ready */
#define I2C_STAT_NACK (1 << 1) /* No acknowledgment interrupt enable */
#define I2C_STAT_AL (1 << 0) /* Arbitration lost interrupt enable */
/* I2C Interrupt Enable Register (I2C_IE): */
#define I2C_IE_GC_IE (1 << 5)
#define I2C_IE_XRDY_IE (1 << 4) /* Transmit data ready interrupt enable */
#define I2C_IE_RRDY_IE (1 << 3) /* Receive data ready interrupt enable */
#define I2C_IE_ARDY_IE (1 << 2) /* Register access ready interrupt enable */
#define I2C_IE_NACK_IE (1 << 1) /* No acknowledgment interrupt enable */
#define I2C_IE_AL_IE (1 << 0) /* Arbitration lost interrupt enable */
/*
* The equation for the low and high time is
* tlow = scll + scll_trim = (sampling clock * tlow_duty) / speed
* thigh = sclh + sclh_trim = (sampling clock * (1 - tlow_duty)) / speed
*
* If the duty cycle is 50%
*
* tlow = scll + scll_trim = sampling clock / (2 * speed)
* thigh = sclh + sclh_trim = sampling clock / (2 * speed)
*
* In TRM
* scll_trim = 7
* sclh_trim = 5
*
* The linux 2.6.30 kernel uses
* scll_trim = 6
* sclh_trim = 6
*
* These are the trim values for standard and fast speed
*/
#ifndef I2C_FASTSPEED_SCLL_TRIM
#define I2C_FASTSPEED_SCLL_TRIM 6
#endif
#ifndef I2C_FASTSPEED_SCLH_TRIM
#define I2C_FASTSPEED_SCLH_TRIM 6
#endif
/* These are the trim values for high speed */
#ifndef I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM
#define I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM
#endif
#ifndef I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM
#define I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM I2C_FASTSPEED_SCLH_TRIM
#endif
#ifndef I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM
#define I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM
#endif
#ifndef I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM
#define I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM I2C_FASTSPEED_SCLH_TRIM
#endif
#define OMAP_I2C_STANDARD 100000
#define OMAP_I2C_FAST_MODE 400000
#define OMAP_I2C_HIGH_SPEED 3400000
/* Use the reference value of 96MHz if not explicitly set by the board */
#ifndef I2C_IP_CLK
#define I2C_IP_CLK SYSTEM_CLOCK_96
#endif
/*
* The reference minimum clock for high speed is 19.2MHz.
* The linux 2.6.30 kernel uses this value.
* The reference minimum clock for fast mode is 9.6MHz
* The reference minimum clock for standard mode is 4MHz
* In TRM, the value of 12MHz is used.
*/
#ifndef I2C_INTERNAL_SAMPLING_CLK
#define I2C_INTERNAL_SAMPLING_CLK 19200000
#endif
#define I2C_PSC_MAX 0x0f
#define I2C_PSC_MIN 0x00
#define DISP_LINE_LEN 128
#define I2C_TIMEOUT 1000
#define I2C_BUS_MAX 3
#define I2C_BASE1 (OMAP34XX_CORE_L4_IO_BASE + 0x070000)
#define I2C_DEFAULT_BASE I2C_BASE1
#define I2C_SYSS_RDONE (1 << 0) /* Internel reset monitoring */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
struct i2c {
unsigned short rev; /* 0x00 */
unsigned short res1;
unsigned short ie; /* 0x04 */
unsigned short res2;
unsigned short stat; /* 0x08 */
unsigned short res3;
unsigned short iv; /* 0x0C */
unsigned short res4;
unsigned short syss; /* 0x10 */
unsigned short res4a;
unsigned short buf; /* 0x14 */
unsigned short res5;
unsigned short cnt; /* 0x18 */
unsigned short res6;
unsigned short data; /* 0x1C */
unsigned short res7;
unsigned short sysc; /* 0x20 */
unsigned short res8;
unsigned short con; /* 0x24 */
unsigned short res9;
unsigned short oa; /* 0x28 */
unsigned short res10;
unsigned short sa; /* 0x2C */
unsigned short res11;
unsigned short psc; /* 0x30 */
unsigned short res12;
unsigned short scll; /* 0x34 */
unsigned short res13;
unsigned short sclh; /* 0x38 */
unsigned short res14;
unsigned short systest; /* 0x3c */
unsigned short res15;
};
static unsigned short wait_for_pin( void );
static void wait_for_bb( void );
static void flush_fifo( void );
void i2c_init( int speed, int slaveadd );
static int i2c_read_byte(
unsigned char devaddr,
unsigned char regoffset,
unsigned char *value
);
int i2c_write(
unsigned char chip,
unsigned int addr,
int alen,
unsigned char *buffer,
int len
);
int i2c_read(
unsigned char chip,
uint addr,
int alen,
unsigned char *buffer,
int len
);
static int imw ( unsigned char chip, unsigned long addr, unsigned char byte );
static int imd( unsigned char chip, unsigned int addr, unsigned int length );
/**
* @defgroup beagle_i2c I2C Support
*
* @ingroup beagle
*
* @brief I2C Support
*
* All writes and reads will be performed in master mode. Exclusive bus access
* will be assumed.
*
* @{
*/
/**
* @name I2C Clock Control Register (I2CCLK_CTRL)
*
* @{
*/
//#define I2CCLK_1_EN BSP_BIT32(0)
//#define I2CCLK_2_EN BSP_BIT32(1)
//#define I2CCLK_1_HIGH_DRIVE BSP_BIT32(2)
//#define I2CCLK_2_HIGH_DRIVE BSP_BIT32(3)
//#define I2CCLK_USB_HIGH_DRIVE BSP_BIT32(4)
/** @} */
/**
* @name I2C TX Data FIFO Register (I2Cn_TX)
*
* @{
*/
//#define I2C_TX_READ BSP_BIT32(0)
//#define I2C_TX_ADDR(val) BSP_FLD32(val, 1, 7)
//#define I2C_TX_START BSP_BIT32(8)
//#define I2C_TX_STOP BSP_BIT32(9)
/** @} */
/**
* @name I2C Status Register (I2Cn_STAT)
*
* @{
*/
//#define I2C_STAT_TDI BSP_BIT32(0)
//#define I2C_STAT_AFI BSP_BIT32(1)
//#define I2C_STAT_NAI BSP_BIT32(2)
//#define I2C_STAT_DRMI BSP_BIT32(3)
//#define I2C_STAT_DRSI BSP_BIT32(4)
//#define I2C_STAT_ACTIVE BSP_BIT32(5)
//#define I2C_STAT_SCL BSP_BIT32(6)
//#define I2C_STAT_SDA BSP_BIT32(7)
//#define I2C_STAT_RFF BSP_BIT32(8)
//#define I2C_STAT_RFE BSP_BIT32(9)
//#define I2C_STAT_TFF BSP_BIT32(10)
//#define I2C_STAT_TFE BSP_BIT32(11)
//#define I2C_STAT_TFFS BSP_BIT32(12)
//#define I2C_STAT_TFES BSP_BIT32(13)
/** @} */
/**
* @name I2C Control Register (I2Cn_CTRL)
*
* @{
*/
//#define I2C_CTRL_TDIE BSP_BIT32(0)
//#define I2C_CTRL_AFIE BSP_BIT32(1)
//#define I2C_CTRL_NAIE BSP_BIT32(2)
//#define I2C_CTRL_DRMIE BSP_BIT32(3)
//#define I2C_CTRL_DRSIE BSP_BIT32(4)
//#define I2C_CTRL_RFFIE BSP_BIT32(5)
//#define I2C_CTRL_RFDAIE BSP_BIT32(6)
//#define I2C_CTRL_TFFIO BSP_BIT32(7)
//#define I2C_CTRL_RESET BSP_BIT32(8)
//#define I2C_CTRL_SEVEN BSP_BIT32(9)
//#define I2C_CTRL_TFFSIE BSP_BIT32(10)
/** @} */
/**
* @brief Initializes the I2C module @a i2c.
*
* Valid @a clock_in_hz values are 100000 and 400000.
*
* @retval RTEMS_SUCCESSFUL Successful operation.
* @retval RTEMS_INVALID_ID Invalid @a i2c value.
* @retval RTEMS_INVALID_CLOCK Invalid @a clock_in_hz value.
*/
rtems_status_code beagle_i2c_init(
volatile beagle_i2c *i2c,
unsigned clock_in_hz
);
/**
* @brief Resets the I2C module @a i2c.
*/
void beagle_i2c_reset(volatile beagle_i2c *i2c);
/**
* @brief Sets the I2C module @a i2c clock.
*
* Valid @a clock_in_hz values are 100000 and 400000.
*
* @retval RTEMS_SUCCESSFUL Successful operation.
* @retval RTEMS_INVALID_CLOCK Invalid @a clock_in_hz value.
*/
rtems_status_code beagle_i2c_clock(
volatile beagle_i2c *i2c,
unsigned clock_in_hz
);
/**
* @brief Starts a write transaction on the I2C module @a i2c.
*
* The address parameter @a addr must not contain the read/write bit.
*
* The error status may be delayed to the next
* beagle_i2c_write_with_optional_stop() due to controller flaws.
*
* @retval RTEMS_SUCCESSFUL Successful operation.
* @retval RTEMS_IO_ERROR Received a NACK from the slave.
*/
rtems_status_code beagle_i2c_write_start(
volatile beagle_i2c *i2c,
unsigned addr
);
/**
* @brief Writes data via the I2C module @a i2c with optional stop.
*
* The error status may be delayed to the next
* beagle_i2c_write_with_optional_stop() due to controller flaws.
*
* @retval RTEMS_SUCCESSFUL Successful operation.
* @retval RTEMS_IO_ERROR Received a NACK from the slave.
*/
rtems_status_code beagle_i2c_write_with_optional_stop(
volatile beagle_i2c *i2c,
const uint8_t *out,
size_t n,
bool stop
);
/**
* @brief Starts a read transaction on the I2C module @a i2c.
*
* The address parameter @a addr must not contain the read/write bit.
*
* The error status may be delayed to the next
* beagle_i2c_read_with_optional_stop() due to controller flaws.
*
* @retval RTEMS_SUCCESSFUL Successful operation.
* @retval RTEMS_IO_ERROR Received a NACK from the slave.
*/
rtems_status_code beagle_i2c_read_start(
volatile beagle_i2c *i2c,
unsigned addr
);
/**
* @brief Reads data via the I2C module @a i2c with optional stop.
*
* @retval RTEMS_SUCCESSFUL Successful operation.
* @retval RTEMS_IO_ERROR Received a NACK from the slave.
* @retval RTEMS_NOT_IMPLEMENTED Stop is @a false.
*/
rtems_status_code beagle_i2c_read_with_optional_stop(
volatile beagle_i2c *i2c,
uint8_t *in,
size_t n,
bool stop
);
/**
* @brief Writes and reads data via the I2C module @a i2c.
*
* This will be one bus transaction.
*
* @retval RTEMS_SUCCESSFUL Successful operation.
* @retval RTEMS_IO_ERROR Received a NACK from the slave.
*/
rtems_status_code beagle_i2c_write_and_read(
volatile beagle_i2c *i2c,
unsigned addr,
const uint8_t *out,
size_t out_size,
uint8_t *in,
size_t in_size
);
/**
* @brief Writes data via the I2C module @a i2c.
*
* This will be one bus transaction.
*
* @retval RTEMS_SUCCESSFUL Successful operation.
* @retval RTEMS_IO_ERROR Received a NACK from the slave.
*/
static inline rtems_status_code beagle_i2c_write(
volatile beagle_i2c *i2c,
unsigned addr,
const uint8_t *out,
size_t out_size
)
{
return beagle_i2c_write_and_read(i2c, addr, out, out_size, NULL, 0);
}
/**
* @brief Reads data via the I2C module @a i2c.
*
* This will be one bus transaction.
*
* @retval RTEMS_SUCCESSFUL Successful operation.
* @retval RTEMS_IO_ERROR Received a NACK from the slave.
*/
static inline rtems_status_code beagle_i2c_read(
volatile beagle_i2c *i2c,
unsigned addr,
uint8_t *in,
size_t in_size
)
{
return beagle_i2c_write_and_read(i2c, addr, NULL, 0, in, in_size);
}
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_ARM_BEAGLE_I2C_H */

199
c/src/lib/libbsp/arm/beagle/include/irq.h Normal file
View File

@@ -0,0 +1,199 @@
/**
* @file
*
* @ingroup bsp_interrupt
*
* @brief Interrupt definitions.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#ifndef LIBBSP_ARM_BEAGLE_IRQ_H
#define LIBBSP_ARM_BEAGLE_IRQ_H
#ifndef ASM
#include <rtems.h>
#include <rtems/irq.h>
#include <rtems/irq-extension.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @addtogroup bsp_interrupt
*
* @{
*/
#define BEAGLE_IRQ_INDEX(module, subindex) ((module) + (subindex))
#define BEAGLE_IRQ_MODULE_MIC 0U
#define BEAGLE_IRQ_MODULE_SIC_1 32U
#define BEAGLE_IRQ_MODULE_SIC_2 64U
#define BEAGLE_IRQ_MODULE_COUNT 3U
/* MIC interrupts */
#define BEAGLE_IRQ_SIC_1_IRQ BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 0)
#define BEAGLE_IRQ_SIC_2_IRQ BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 1)
#define BEAGLE_IRQ_TIMER_4_OR_MCPWM BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 3)
#define BEAGLE_IRQ_TIMER_5 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 4)
#define BEAGLE_IRQ_TIMER_HS BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 5)
#define BEAGLE_IRQ_WDG BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 6)
#define BEAGLE_IRQ_UART_3 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 7)
#define BEAGLE_IRQ_UART_4 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 8)
#define BEAGLE_IRQ_UART_5 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 9)
#define BEAGLE_IRQ_UART_6 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 10)
#define BEAGLE_IRQ_NAND_FLASH BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 11)
#define BEAGLE_IRQ_SDCARD_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 13)
#define BEAGLE_IRQ_LCD BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 14)
#define BEAGLE_IRQ_SDCARD_2 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 15)
#define BEAGLE_IRQ_TIMER_0 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 16)
#define BEAGLE_IRQ_TIMER_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 17)
#define BEAGLE_IRQ_TIMER_2 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 18)
#define BEAGLE_IRQ_TIMER_3 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 19)
#define BEAGLE_IRQ_SSP_0 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 20)
#define BEAGLE_IRQ_SSP_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 21)
#define BEAGLE_IRQ_I2S_0 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 22)
#define BEAGLE_IRQ_I2S_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 23)
#define BEAGLE_IRQ_UART_7 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 24)
#define BEAGLE_IRQ_UART_2 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 25)
#define BEAGLE_IRQ_UART_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 26)
#define BEAGLE_IRQ_TIMER_MS BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 27)
#define BEAGLE_IRQ_DMA BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 28)
#define BEAGLE_IRQ_ETHERNET BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 29)
#define BEAGLE_IRQ_SIC_1_FIQ BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 30)
#define BEAGLE_IRQ_SIC_2_FIQ BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_MIC, 31)
/* SIC 1 interrupts */
#define BEAGLE_IRQ_JTAG_COMM_TX BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 1)
#define BEAGLE_IRQ_JTAG_COMM_RX BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 2)
#define BEAGLE_IRQ_GPI_28 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 4)
#define BEAGLE_IRQ_TS_P BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 6)
#define BEAGLE_IRQ_TS_IRQ_OR_ADC BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 7)
#define BEAGLE_IRQ_TS_AUX BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 8)
#define BEAGLE_IRQ_SPI_2 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 12)
#define BEAGLE_IRQ_PLL_USB BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 13)
#define BEAGLE_IRQ_PLL_HCLK BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 14)
#define BEAGLE_IRQ_PLL_397 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 17)
#define BEAGLE_IRQ_I2C_2 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 18)
#define BEAGLE_IRQ_I2C_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 19)
#define BEAGLE_IRQ_RTC BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 20)
#define BEAGLE_IRQ_KEYSCAN BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 22)
#define BEAGLE_IRQ_SPI_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 23)
#define BEAGLE_IRQ_SW BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 24)
#define BEAGLE_IRQ_USB_OTG_TIMER BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 25)
#define BEAGLE_IRQ_USB_OTG_ATX BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 26)
#define BEAGLE_IRQ_USB_HOST BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 27)
#define BEAGLE_IRQ_USB_DEV_DMA BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 28)
#define BEAGLE_IRQ_USB_DEV_LP BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 29)
#define BEAGLE_IRQ_USB_DEV_HP BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 30)
#define BEAGLE_IRQ_USB_I2C BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_1, 31)
/* SIC 2 interrupts */
#define BEAGLE_IRQ_GPIO_0 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 0)
#define BEAGLE_IRQ_GPIO_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 1)
#define BEAGLE_IRQ_GPIO_2 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 2)
#define BEAGLE_IRQ_GPIO_3 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 3)
#define BEAGLE_IRQ_GPIO_4 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 4)
#define BEAGLE_IRQ_GPIO_5 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 5)
#define BEAGLE_IRQ_SPI_2_DATAIN BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 6)
#define BEAGLE_IRQ_UART_2_HCTS BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 7)
#define BEAGLE_IRQ_GPIO_P0_P1_IRQ BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 8)
#define BEAGLE_IRQ_GPI_8 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 9)
#define BEAGLE_IRQ_GPI_9 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 10)
#define BEAGLE_IRQ_GPI_19 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 11)
#define BEAGLE_IRQ_UART_7_HCTS BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 12)
#define BEAGLE_IRQ_GPI_7 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 15)
#define BEAGLE_IRQ_SDIO BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 18)
#define BEAGLE_IRQ_UART_5_RX BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 19)
#define BEAGLE_IRQ_SPI_1_DATAIN BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 20)
#define BEAGLE_IRQ_GPI_0 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 22)
#define BEAGLE_IRQ_GPI_1 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 23)
#define BEAGLE_IRQ_GPI_2 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 24)
#define BEAGLE_IRQ_GPI_3 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 25)
#define BEAGLE_IRQ_GPI_4 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 26)
#define BEAGLE_IRQ_GPI_5 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 27)
#define BEAGLE_IRQ_GPI_6 BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 28)
#define BEAGLE_IRQ_SYSCLK BEAGLE_IRQ_INDEX(BEAGLE_IRQ_MODULE_SIC_2, 31)
#define BEAGLE_IRQ_PRIORITY_VALUE_MIN 0U
#define BEAGLE_IRQ_PRIORITY_VALUE_MAX 15U
#define BEAGLE_IRQ_PRIORITY_COUNT (BEAGLE_IRQ_PRIORITY_VALUE_MAX + 1U)
#define BEAGLE_IRQ_PRIORITY_HIGHEST BEAGLE_IRQ_PRIORITY_VALUE_MIN
#define BEAGLE_IRQ_PRIORITY_LOWEST BEAGLE_IRQ_PRIORITY_VALUE_MAX
#define BSP_INTERRUPT_VECTOR_MIN BEAGLE_IRQ_SIC_1_IRQ
#define BSP_INTERRUPT_VECTOR_MAX BEAGLE_IRQ_SYSCLK
#define BEAGLE_IRQ_COUNT (BSP_INTERRUPT_VECTOR_MAX + 1)
void beagle_irq_set_priority(rtems_vector_number vector, unsigned priority);
unsigned beagle_irq_get_priority(rtems_vector_number vector);
typedef enum {
BEAGLE_IRQ_ACTIVE_LOW_OR_FALLING_EDGE,
BEAGLE_IRQ_ACTIVE_HIGH_OR_RISING_EDGE
} beagle_irq_activation_polarity;
void beagle_irq_set_activation_polarity(
rtems_vector_number vector,
beagle_irq_activation_polarity activation_polarity
);
beagle_irq_activation_polarity beagle_irq_get_activation_polarity(
rtems_vector_number vector
);
typedef enum {
BEAGLE_IRQ_LEVEL_SENSITIVE,
BEAGLE_IRQ_EDGE_SENSITIVE
} beagle_irq_activation_type;
void beagle_irq_set_activation_type(
rtems_vector_number vector,
beagle_irq_activation_type activation_type
);
beagle_irq_activation_type beagle_irq_get_activation_type(
rtems_vector_number vector
);
void beagle_set_exception_handler(
Arm_symbolic_exception_name exception,
void (*handler)(void)
);
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
#endif /* LIBBSP_ARM_BEAGLE_IRQ_H */

397
c/src/lib/libbsp/arm/beagle/irq/irq.c Normal file
View File

@@ -0,0 +1,397 @@
/**
* @file
*
* @ingroup bsp_interrupt
*
* @brief Interrupt support.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/irq-generic.h>
#include <bsp/beagle.h>
#include <bsp/linker-symbols.h>
/*
* Mask out SIC 1 and 2 IRQ request. There is no need to mask out the FIQ,
* since a pending FIQ would be a fatal error. The default handler will be
* invoked in this case.
*/
#define BEAGLE_MIC_STATUS_MASK (~0x3U)
typedef union {
struct {
uint32_t mic;
uint32_t sic_1;
uint32_t sic_2;
} field;
uint32_t fields_table [BEAGLE_IRQ_MODULE_COUNT];
} beagle_irq_fields;
static uint8_t beagle_irq_priority_table [BEAGLE_IRQ_COUNT];
static beagle_irq_fields beagle_irq_priority_masks [BEAGLE_IRQ_PRIORITY_COUNT];
static beagle_irq_fields beagle_irq_enable;
static inline bool beagle_irq_is_valid(rtems_vector_number vector)
{
printk( "beagle_irq_is_valid" );
return vector <= BSP_INTERRUPT_VECTOR_MAX;
}
static inline bool beagle_irq_priority_is_valid(unsigned priority)
{
printk( "beagle_irq_priority_is_valid" );
return priority <= BEAGLE_IRQ_PRIORITY_LOWEST;
}
#define BEAGLE_IRQ_BIT_OPS_DEFINE \
unsigned bit = index & 0x1fU; \
unsigned module = index >> 5
#define BEAGLE_IRQ_BIT_OPS_FOR_REG_DEFINE \
BEAGLE_IRQ_BIT_OPS_DEFINE; \
unsigned module_offset = module << 14; \
volatile uint32_t *reg = (volatile uint32_t *) \
((volatile char *) &beagle.mic + module_offset + register_offset)
#define BEAGLE_IRQ_OFFSET_ER 0U
#define BEAGLE_IRQ_OFFSET_RSR 4U
#define BEAGLE_IRQ_OFFSET_SR 8U
#define BEAGLE_IRQ_OFFSET_APR 12U
#define BEAGLE_IRQ_OFFSET_ATR 16U
#define BEAGLE_IRQ_OFFSET_ITR 20U
static inline bool beagle_irq_is_bit_set_in_register(
unsigned index,
unsigned register_offset
)
{
printk( "beagle_irq_is_bit_set_in_register" );
BEAGLE_IRQ_BIT_OPS_FOR_REG_DEFINE;
return *reg & (1U << bit);
}
static inline void beagle_irq_set_bit_in_register(
unsigned index,
unsigned register_offset
)
{
printk( "beagle_irq_set_bit_in_register" );
BEAGLE_IRQ_BIT_OPS_FOR_REG_DEFINE;
*reg |= 1U << bit;
}
static inline void beagle_irq_clear_bit_in_register(
unsigned index,
unsigned register_offset
)
{
printk( "beagle_irq_clear_bit_in_register" );
BEAGLE_IRQ_BIT_OPS_FOR_REG_DEFINE;
*reg &= ~(1U << bit);
}
static inline void beagle_irq_set_bit_in_field(
unsigned index,
beagle_irq_fields *fields
)
{
printk( "beagle_irq_set_bit_in_field" );
BEAGLE_IRQ_BIT_OPS_DEFINE;
fields->fields_table [module] |= 1U << bit;
}
static inline void beagle_irq_clear_bit_in_field(
unsigned index,
beagle_irq_fields *fields
)
{
printk( "beagle_irq_clear_bit_in_field" );
BEAGLE_IRQ_BIT_OPS_DEFINE;
fields->fields_table [module] &= ~(1U << bit);
}
static inline unsigned beagle_irq_get_index(uint32_t val)
{
printk( "beagle_irq_get_index" );
ARM_SWITCH_REGISTERS;
__asm__ volatile (
ARM_SWITCH_TO_ARM
"clz %[val], %[val]\n"
"rsb %[val], %[val], #31\n"
ARM_SWITCH_BACK
: [val] "=r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT
: "[val]" (val)
);
return val;
}
void beagle_irq_set_priority(rtems_vector_number vector, unsigned priority)
{
printk( "beagle_irq_set_priority" );
if (beagle_irq_is_valid(vector)) {
rtems_interrupt_level level;
unsigned i = 0;
if (priority > BEAGLE_IRQ_PRIORITY_LOWEST) {
priority = BEAGLE_IRQ_PRIORITY_LOWEST;
}
beagle_irq_priority_table [vector] = (uint8_t) priority;
for (i = BEAGLE_IRQ_PRIORITY_HIGHEST; i <= priority; ++i) {
rtems_interrupt_disable(level);
beagle_irq_clear_bit_in_field(vector, &beagle_irq_priority_masks [i]);
rtems_interrupt_enable(level);
}
for (i = priority + 1; i <= BEAGLE_IRQ_PRIORITY_LOWEST; ++i) {
rtems_interrupt_disable(level);
beagle_irq_set_bit_in_field(vector, &beagle_irq_priority_masks [i]);
rtems_interrupt_enable(level);
}
}
}
unsigned beagle_irq_get_priority(rtems_vector_number vector)
{
printk( "beagle_irq_get_priority" );
if (beagle_irq_is_valid(vector)) {
return beagle_irq_priority_table [vector];
} else {
return BEAGLE_IRQ_PRIORITY_LOWEST;
}
}
void beagle_irq_set_activation_polarity(
rtems_vector_number vector,
beagle_irq_activation_polarity activation_polarity
)
{
printk( "beagle_irq_set_activation_polarity" );
if (beagle_irq_is_valid(vector)) {
rtems_interrupt_level level;
rtems_interrupt_disable(level);
if (activation_polarity == BEAGLE_IRQ_ACTIVE_HIGH_OR_RISING_EDGE) {
beagle_irq_set_bit_in_register(vector, BEAGLE_IRQ_OFFSET_APR);
} else {
beagle_irq_clear_bit_in_register(vector, BEAGLE_IRQ_OFFSET_APR);
}
rtems_interrupt_enable(level);
}
}
beagle_irq_activation_polarity beagle_irq_get_activation_polarity(
rtems_vector_number vector
)
{
printk( "beagle_irq_get_activation_polarity" );
if (beagle_irq_is_valid(vector)) {
if (beagle_irq_is_bit_set_in_register(vector, BEAGLE_IRQ_OFFSET_APR)) {
return BEAGLE_IRQ_ACTIVE_HIGH_OR_RISING_EDGE;
} else {
return BEAGLE_IRQ_ACTIVE_LOW_OR_FALLING_EDGE;
}
} else {
return BEAGLE_IRQ_ACTIVE_LOW_OR_FALLING_EDGE;
}
}
void beagle_irq_set_activation_type(
rtems_vector_number vector,
beagle_irq_activation_type activation_type
)
{
printk( "beagle_irq_set_activation_type" );
if (beagle_irq_is_valid(vector)) {
rtems_interrupt_level level;
rtems_interrupt_disable(level);
if (activation_type == BEAGLE_IRQ_EDGE_SENSITIVE) {
beagle_irq_set_bit_in_register(vector, BEAGLE_IRQ_OFFSET_ATR);
} else {
beagle_irq_clear_bit_in_register(vector, BEAGLE_IRQ_OFFSET_ATR);
}
rtems_interrupt_enable(level);
}
}
beagle_irq_activation_type beagle_irq_get_activation_type(
rtems_vector_number vector
)
{
printk( "beagle_irq_get_activation_type" );
if (beagle_irq_is_valid(vector)) {
if (beagle_irq_is_bit_set_in_register(vector, BEAGLE_IRQ_OFFSET_ATR)) {
return BEAGLE_IRQ_EDGE_SENSITIVE;
} else {
return BEAGLE_IRQ_LEVEL_SENSITIVE;
}
} else {
return BEAGLE_IRQ_LEVEL_SENSITIVE;
}
}
void bsp_interrupt_dispatch(void)
{
printk( "bsp_interrupt_dispatch" );
uint32_t status = beagle.mic.sr & BEAGLE_MIC_STATUS_MASK;
uint32_t er_mic = beagle.mic.er;
uint32_t er_sic_1 = beagle.sic_1.er;
uint32_t er_sic_2 = beagle.sic_2.er;
uint32_t psr = 0;
beagle_irq_fields *masks = NULL;
rtems_vector_number vector = 0;
unsigned priority = 0;
if (status != 0) {
vector = beagle_irq_get_index(status);
} else {
status = beagle.sic_1.sr;
if (status != 0) {
vector = beagle_irq_get_index(status) + BEAGLE_IRQ_MODULE_SIC_1;
} else {
status = beagle.sic_2.sr;
if (status != 0) {
vector = beagle_irq_get_index(status) + BEAGLE_IRQ_MODULE_SIC_2;
} else {
return;
}
}
}
priority = beagle_irq_priority_table [vector];
masks = &beagle_irq_priority_masks [priority];
beagle.mic.er = er_mic & masks->field.mic;
beagle.sic_1.er = er_sic_1 & masks->field.sic_1;
beagle.sic_2.er = er_sic_2 & masks->field.sic_2;
#if 0
psr = arm_status_irq_enable();
#endif
bsp_interrupt_handler_dispatch(vector);
#if 0
arm_status_restore(psr);
#endif
beagle.mic.er = er_mic & beagle_irq_enable.field.mic;
beagle.sic_1.er = er_sic_1 & beagle_irq_enable.field.sic_1;
beagle.sic_2.er = er_sic_2 & beagle_irq_enable.field.sic_2;
}
rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
{
printk( "bsp_interrupt_vector_enable" );
rtems_interrupt_level level;
rtems_interrupt_disable(level);
beagle_irq_set_bit_in_register(vector, BEAGLE_IRQ_OFFSET_ER);
beagle_irq_set_bit_in_field(vector, &beagle_irq_enable);
rtems_interrupt_enable(level);
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
{
printk( "bsp_interrupt_vector_disable" );
rtems_interrupt_level level;
rtems_interrupt_disable(level);
beagle_irq_clear_bit_in_field(vector, &beagle_irq_enable);
beagle_irq_clear_bit_in_register(vector, BEAGLE_IRQ_OFFSET_ER);
rtems_interrupt_enable(level);
return RTEMS_SUCCESSFUL;
}
void beagle_set_exception_handler(
Arm_symbolic_exception_name exception,
void (*handler)(void)
)
{
printk( "beagle_set_exception_handler" );
if ((unsigned) exception < MAX_EXCEPTIONS) {
uint32_t *table = (uint32_t *) bsp_vector_table_begin + MAX_EXCEPTIONS;
table [exception] = (uint32_t) handler;
#ifndef BEAGLE_DISABLE_MMU
rtems_cache_flush_multiple_data_lines(table, 64);
rtems_cache_invalidate_multiple_instruction_lines(NULL, 64);
#endif
}
}
rtems_status_code bsp_interrupt_facility_initialize(void)
{
printk( "bsp_interrupt_facility_initialize" );
size_t i = 0;
/* Set default priority */
for (i = 0; i < BEAGLE_IRQ_COUNT; ++i) {
beagle_irq_priority_table [i] = BEAGLE_IRQ_PRIORITY_LOWEST;
}
/* Enable SIC 1 and 2 at all priorities */
for (i = 0; i < BEAGLE_IRQ_PRIORITY_COUNT; ++i) {
beagle_irq_priority_masks [i].field.mic = 0xc0000003;
}
/* Disable all interrupts except SIC 1 and 2 */
beagle_irq_enable.field.sic_2 = 0x0;
beagle_irq_enable.field.sic_1 = 0x0;
beagle_irq_enable.field.mic = 0xc0000003;
beagle.sic_1.er = 0x0;
beagle.sic_2.er = 0x0;
beagle.mic.er = 0xc0000003;
/* Set interrupt types to IRQ */
beagle.mic.itr = 0x0;
beagle.sic_1.itr = 0x0;
beagle.sic_2.itr = 0x0;
/* Set interrupt activation polarities */
beagle.mic.apr = 0x3ff0efe0;
beagle.sic_1.apr = 0xfbd27184;
beagle.sic_2.apr = 0x801810c0;
/* Set interrupt activation types */
beagle.mic.atr = 0x0;
beagle.sic_1.atr = 0x26000;
beagle.sic_2.atr = 0x0;
#if 0
beagle_set_exception_handler(ARM_EXCEPTION_IRQ, arm_exc_interrupt);
#endif
return RTEMS_SUCCESSFUL;
}

5
c/src/lib/libbsp/arm/beagle/make/custom/beagle.cfg Normal file
View File

@@ -0,0 +1,5 @@
#
# Config file for BeagleBoard
#
include $(RTEMS_ROOT)/make/custom/beagle.inc

11
c/src/lib/libbsp/arm/beagle/make/custom/beagle.inc Normal file
View File

@@ -0,0 +1,11 @@
#
# Config file for BeagleBoard.
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU = arm
CPU_CFLAGS = -mcpu=cortex-a8
CFLAGS_OPTIMIZE_V ?= -O2 -g

62
c/src/lib/libbsp/arm/beagle/misc/boot.c Normal file
View File

@@ -0,0 +1,62 @@
/**
* @file
*
* @ingroup beagle_boot
*
* @brief Boot support implementation.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#include <string.h>
#include <bsp/boot.h>
void beagle_setup_boot_block(
beagle_boot_block *boot_block,
uint8_t icr,
uint8_t page_count
)
{
memset(boot_block, 0, sizeof(*boot_block));
++page_count;
boot_block->field.d0 = icr;
boot_block->field.d2 = icr;
boot_block->field.d4 = page_count;
boot_block->field.d6 = page_count;
boot_block->field.d8 = page_count;
boot_block->field.d10 = page_count;
icr = (uint8_t) ~((unsigned) icr);
page_count = (uint8_t) ~((unsigned) page_count);
boot_block->field.d1 = icr;
boot_block->field.d3 = icr;
boot_block->field.d5 = page_count;
boot_block->field.d7 = page_count;
boot_block->field.d9 = page_count;
boot_block->field.d11 = page_count;
boot_block->field.d12 = 0xaa;
}
void beagle_set_boot_block_bad(
beagle_boot_block *boot_block
)
{
boot_block->field.d12 = 0;
}

450
c/src/lib/libbsp/arm/beagle/misc/i2c.c Normal file
View File

@@ -0,0 +1,450 @@
/**
* @file
*
* @ingroup beagle_i2c
*
* @brief I2C support implementation.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#include <rtems.h>
#include <bsp.h>
#include <bsp/i2c.h>
static struct i2c *i2c_base = (struct i2c *)I2C_DEFAULT_BASE;
static unsigned short wait_for_pin( void ) {
unsigned short status;
int timeout = I2C_TIMEOUT;
do {
udelay( 1000 );
status = readw( &i2c_base->stat );
} while( !( status &
( I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY |
I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK |
I2C_STAT_AL ) ) && timeout-- );
if( timeout <= 0 ) {
printk( "timed out in wait_for_pin: I2C_STAT = %x\n",
readw( &i2c_base->stat ) );
writew( 0xFFFF, &i2c_base->stat ); /* clear current interrupts...*/
status = 0;
}
return status;
}
static void wait_for_bb( void ) {
int timeout = I2C_TIMEOUT;
unsigned short status;
writew( 0xFFFF, &i2c_base->stat ); /* clear current interrupts...*/
while( ( status = readw( &i2c_base->stat ) & I2C_STAT_BB ) && timeout-- ) {
writew( status, &i2c_base->stat );
udelay( 1000 );
}
if( timeout <= 0 ) {
printk( "timed out in wait_for_bb: I2C_STAT = %x\n",
readw( &i2c_base->stat ) );
}
writew( 0xFFFF, &i2c_base->stat ); /* clear delayed stuff*/
}
static void flush_fifo( void ) {
unsigned short status;
/* note: if you try and read data when its not there or ready
* you get a bus error
*/
while( 1 ) {
status = readw( &i2c_base->stat );
if( status == I2C_STAT_RRDY ) {
readw( &i2c_base->data );
writew( I2C_STAT_RRDY, &i2c_base->stat );
udelay( 1000 );
} else {
break;
}
}
}
void i2c_init( int speed, int slaveadd ) {
int psc, fsscll, fssclh;
int hsscll = 0, hssclh = 0;
unsigned int scll, sclh;
int timeout = I2C_TIMEOUT;
// Only handle standard, fast and high speeds
if( ( speed != OMAP_I2C_STANDARD ) &&
( speed != OMAP_I2C_FAST_MODE ) &&
( speed != OMAP_I2C_HIGH_SPEED ) ) {
printk( "Error : I2C unsupported speed %d\n", speed );
return;
}
psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK;
psc -= 1;
if( psc < I2C_PSC_MIN ) {
printk( "Error : I2C unsupported prescalar %d\n", psc );
return;
}
if( speed == OMAP_I2C_HIGH_SPEED ) {
// High speed
// For first phase of HS mode
fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK / ( 2 * OMAP_I2C_FAST_MODE );
fsscll -= I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM;
fssclh -= I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM;
if( ( ( fsscll < 0 ) || ( fssclh < 0 ) ) || ( ( fsscll > 255 ) ||
( fssclh > 255 ) ) ) {
printk( "Error : I2C initializing first phase clock\n" );
return;
}
// For second phase of HS mode
hsscll = hssclh = I2C_INTERNAL_SAMPLING_CLK / ( 2 * speed );
hsscll -= I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM;
hssclh -= I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM;
if( ( ( fsscll < 0 ) || ( fssclh < 0 ) ) || ( ( fsscll > 255 ) ||
( fssclh > 255 ) ) ) {
printk( "Error : I2C initializing second phase clock\n" );
return;
}
scll = ( unsigned int ) hsscll << 8 | ( unsigned int ) fsscll;
sclh = ( unsigned int ) hssclh << 8 | ( unsigned int ) fssclh;
} else {
// Standard and fast speed
fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK / ( 2 * speed );
fsscll -= I2C_FASTSPEED_SCLL_TRIM;
fssclh -= I2C_FASTSPEED_SCLH_TRIM;
if( ( ( fsscll < 0 ) || ( fssclh < 0 ) ) || ( ( fsscll > 255 ) ||
( fssclh > 255 ) ) ) {
printk( "Error : I2C initializing clock\n" );
return;
}
scll = ( unsigned int ) fsscll;
sclh = ( unsigned int ) fssclh;
}
if( readw( &i2c_base->con ) & I2C_CON_EN ) {
writew( 0, &i2c_base->con );
udelay( 50000 );
}
writew( 0x2, &i2c_base->sysc ); /* for ES2 after soft reset */
udelay( 1000 );
writew( I2C_CON_EN, &i2c_base->con );
while( !( readw( &i2c_base->syss ) & I2C_SYSS_RDONE ) && timeout-- ) {
if (timeout <= 0) {
printk( "ERROR: Timeout in soft-reset\n" );
return;
}
udelay( 1000 );
}
writew( 0, &i2c_base->con );
writew( psc, &i2c_base->psc );
writew( scll, &i2c_base->scll );
writew( sclh, &i2c_base->sclh );
/* own address */
writew( slaveadd, &i2c_base->oa );
writew( I2C_CON_EN, &i2c_base->con );
/* have to enable intrrupts or OMAP i2c module doesn't work */
writew( I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE | I2C_IE_NACK_IE |
I2C_IE_AL_IE, &i2c_base->ie );
udelay( 1000 );
flush_fifo();
writew( 0xFFFF, &i2c_base->stat );
writew( 0, &i2c_base->cnt );
//if( gd->flags & GD_FLG_RELOC ) bus_initialized[ current_bus ] = 1;
}
static int i2c_read_byte(
unsigned char devaddr,
unsigned char regoffset,
unsigned char *value
)
{
int i2c_error = 0;
unsigned short status;
/* wait until bus not busy */
wait_for_bb();
/* one byte only */
writew(1, &i2c_base->cnt);
/* set slave address */
writew(devaddr, &i2c_base->sa);
/* no stop bit needed here */
writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT |
I2C_CON_TRX, &i2c_base->con);
/* send register offset */
while (1) {
status = wait_for_pin();
if (status == 0 || status & I2C_STAT_NACK) {
i2c_error = 1;
goto read_exit;
}
if (status & I2C_STAT_XRDY) {
/* Important: have to use byte access */
writeb(regoffset, &i2c_base->data);
writew(I2C_STAT_XRDY, &i2c_base->stat);
}
if (status & I2C_STAT_ARDY) {
writew(I2C_STAT_ARDY, &i2c_base->stat);
break;
}
}
/* set slave address */
writew(devaddr, &i2c_base->sa);
/* read one byte from slave */
writew(1, &i2c_base->cnt);
/* need stop bit here */
writew(I2C_CON_EN | I2C_CON_MST |
I2C_CON_STT | I2C_CON_STP,
&i2c_base->con);
/* receive data */
while (1) {
status = wait_for_pin();
if (status == 0 || status & I2C_STAT_NACK) {
i2c_error = 1;
goto read_exit;
}
if (status & I2C_STAT_RRDY) {
*value = readw(&i2c_base->data);
writew(I2C_STAT_RRDY, &i2c_base->stat);
}
if (status & I2C_STAT_ARDY) {
writew(I2C_STAT_ARDY, &i2c_base->stat);
break;
}
}
read_exit:
flush_fifo();
writew(0xFFFF, &i2c_base->stat);
writew(0, &i2c_base->cnt);
return i2c_error;
}
int i2c_write(
unsigned char chip,
unsigned int addr,
int alen,
unsigned char *buffer,
int len
)
{
int i;
unsigned short status;
int i2c_error = 0;
if (alen > 1) {
printk("I2C write: addr len %d not supported\n", alen);
return 1;
}
if (addr + len > 256) {
printk("I2C write: address 0x%x + 0x%x out of range\n",
addr, len);
return 1;
}
/* wait until bus not busy */
wait_for_bb();
/* start address phase - will write regoffset + len bytes data */
writew(alen + len, &i2c_base->cnt);
/* set slave address */
writew(chip, &i2c_base->sa);
/* stop bit needed here */
writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
I2C_CON_STP, &i2c_base->con);
/* Send address byte */
status = wait_for_pin();
if (status == 0 || status & I2C_STAT_NACK) {
i2c_error = 1;
printk("error waiting for i2c address ACK (status=0x%x)\n",
status);
goto write_exit;
}
if (status & I2C_STAT_XRDY) {
writeb(addr & 0xFF, &i2c_base->data);
writew(I2C_STAT_XRDY, &i2c_base->stat);
} else {
i2c_error = 1;
printk("i2c bus not ready for transmit (status=0x%x)\n",
status);
goto write_exit;
}
/* address phase is over, now write data */
for (i = 0; i < len; i++) {
status = wait_for_pin();
if (status == 0 || status & I2C_STAT_NACK) {
i2c_error = 1;
printk("i2c error waiting for data ACK (status=0x%x)\n",
status);
goto write_exit;
}
if (status & I2C_STAT_XRDY) {
writeb(buffer[i], &i2c_base->data);
writew(I2C_STAT_XRDY, &i2c_base->stat);
} else {
i2c_error = 1;
printk("i2c bus not ready for Tx (i=%d)\n", i);
goto write_exit;
}
}
write_exit:
flush_fifo();
writew(0xFFFF, &i2c_base->stat);
return i2c_error;
}
int i2c_read(
unsigned char chip,
uint addr,
int alen,
unsigned char *buffer,
int len
)
{
int i;
if (alen > 1) {
printk("I2C read: addr len %d not supported\n", alen);
return 1;
}
if (addr + len > 256) {
printk("I2C read: address out of range\n");
return 1;
}
for (i = 0; i < len; i++) {
if (i2c_read_byte(chip, addr + i, &buffer[i])) {
printk("I2C read: I/O error\n");
i2c_init( CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE );
return 1;
}
}
return 0;
}
/* Write (fill) memory
*
* Syntax:
* i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
*/
static int imw ( unsigned char chip, unsigned long addr, unsigned char byte )
{
unsigned int alen;
int count;
alen = 1;
count = 1;
while (count-- > 0) {
if (i2c_write(chip, addr++, alen, &byte, 1) != 0)
printk("Error writing the chip.\n");
/*
* Wait for the write to complete. The write can take
* up to 10mSec (we allow a little more time).
*/
}
return (0);
}
/*
* Syntax:
* i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
*/
static int imd( unsigned char chip, unsigned int addr, unsigned int length )
{
int j, nbytes, linebytes;
unsigned int alen = 0;
if (alen > 3) return 0;
/*
* Print the lines.
*
* We buffer all read data, so we can make sure data is read only
* once.
*/
nbytes = length;
do {
unsigned char linebuf[DISP_LINE_LEN];
unsigned char *cp;
linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
if (i2c_read(chip, addr, alen, linebuf, linebytes) != 0)
printk ("Error reading the chip.\n");
else {
printk("%04x:", addr);
cp = linebuf;
for (j=0; j<linebytes; j++) {
printk(" %02x", *cp++);
addr++;
}
printk (" ");
cp = linebuf;
for (j=0; j<linebytes; j++) {
if ((*cp < 0x20) || (*cp > 0x7e))
printk (".");
else
printk("%c", *cp);
cp++;
}
printk ("\n");
}
nbytes -= linebytes;
} while (nbytes > 0);
return 0;
}

32
c/src/lib/libbsp/arm/beagle/misc/restart.c Normal file
View File

@@ -0,0 +1,32 @@
/**
* @file
*
* @ingroup beagle
*
* @brief Restart implementation.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#include <rtems.h>
#include <libcpu/arm-cp15.h>
#include <bsp.h>
void bsp_restart(void *addr)
{
BEAGLE_DO_RESTART(addr);
}

140
c/src/lib/libbsp/arm/beagle/misc/system-clocks.c Normal file
View File

@@ -0,0 +1,140 @@
/**
* @file
*
* @ingroup beagle
*
* @brief System clocks.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#include <bsp.h>
#include <bsp/beagle.h>
uint32_t beagle_sysclk(void)
{
uint32_t sysclk_ctrl = BEAGLE_SYSCLK_CTRL;
return (sysclk_ctrl & 0x1) == 0 ?
BEAGLE_OSCILLATOR_MAIN
: (397 * BEAGLE_OSCILLATOR_RTC);
}
uint32_t beagle_hclkpll_clk(void)
{
uint32_t sysclk = beagle_sysclk();
uint32_t hclkpll_ctrl = BEAGLE_HCLKPLL_CTRL;
uint32_t m = HCLK_PLL_M_GET(hclkpll_ctrl) + 1;
uint32_t n = HCLK_PLL_N_GET(hclkpll_ctrl) + 1;
uint32_t p = 1U << HCLK_PLL_P_GET(hclkpll_ctrl);
uint32_t hclkpll_clk = 0;
if ((hclkpll_ctrl & HCLK_PLL_BYPASS) != 0) {
if ((hclkpll_ctrl & HCLK_PLL_DIRECT) != 0) {
hclkpll_clk = sysclk;
} else {
hclkpll_clk = sysclk / (2 * p);
}
} else {
if ((hclkpll_ctrl & HCLK_PLL_DIRECT) != 0) {
hclkpll_clk = (m * sysclk) / n;
} else {
if ((hclkpll_ctrl & HCLK_PLL_FBD_FCLKOUT) != 0) {
hclkpll_clk = m * (sysclk / n);
} else {
hclkpll_clk = (m / (2 * p)) * (sysclk / n);
}
}
}
return hclkpll_clk;
}
uint32_t beagle_periph_clk(void)
{
uint32_t pwr_ctrl = BEAGLE_PWR_CTRL;
uint32_t periph_clk = 0;
if ((pwr_ctrl & PWR_NORMAL_RUN_MODE) != 0) {
uint32_t hclkdiv_ctrl = BEAGLE_HCLKDIV_CTRL;
uint32_t div = HCLK_DIV_PERIPH_CLK_GET(hclkdiv_ctrl) + 1;
periph_clk = beagle_hclkpll_clk() / div;
} else {
periph_clk = beagle_sysclk();
}
return periph_clk;
}
uint32_t beagle_hclk(void)
{
uint32_t pwr_ctrl = BEAGLE_PWR_CTRL;
uint32_t hclk = 0;
if ((pwr_ctrl & PWR_HCLK_USES_PERIPH_CLK) != 0) {
hclk = beagle_periph_clk();
} else {
if ((pwr_ctrl & PWR_NORMAL_RUN_MODE) != 0) {
uint32_t hclkdiv_ctrl = BEAGLE_HCLKDIV_CTRL;
uint32_t div = 1U << HCLK_DIV_HCLK_GET(hclkdiv_ctrl);
hclk = beagle_hclkpll_clk() / div;
} else {
hclk = beagle_sysclk();
}
}
return hclk;
}
uint32_t beagle_arm_clk(void)
{
uint32_t pwr_ctrl = BEAGLE_PWR_CTRL;
uint32_t arm_clk = 0;
if ((pwr_ctrl & PWR_HCLK_USES_PERIPH_CLK) != 0) {
arm_clk = beagle_periph_clk();
} else {
if ((pwr_ctrl & PWR_NORMAL_RUN_MODE) != 0) {
arm_clk = beagle_hclkpll_clk();
} else {
arm_clk = beagle_sysclk();
}
}
return arm_clk;
}
uint32_t beagle_dram_clk(void)
{
uint32_t hclkdiv_ctrl = BEAGLE_HCLKDIV_CTRL;
uint32_t div = HCLK_DIV_DDRAM_CLK_GET(hclkdiv_ctrl);
uint32_t dram_clk = 0;
if (div != 0) {
uint32_t pwr_ctrl = BEAGLE_PWR_CTRL;
if ((pwr_ctrl & PWR_NORMAL_RUN_MODE) != 0) {
dram_clk = beagle_hclkpll_clk();
} else {
dram_clk = beagle_sysclk();
}
dram_clk /= div;
}
return dram_clk;
}

46
c/src/lib/libbsp/arm/beagle/misc/timer.c Normal file
View File

@@ -0,0 +1,46 @@
/**
* @file
*
* @ingroup beagle
*
* @brief Benchmark timer support.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#include <rtems.h>
#include <rtems/btimer.h>
#include <rtems/timerdrv.h>
#include <bsp.h>
static uint32_t benchmark_timer_base;
void benchmark_timer_initialize(void)
{
benchmark_timer_base = beagleboard_timer();
}
uint32_t benchmark_timer_read(void)
{
return beagleboard_timer() - benchmark_timer_base;
}
void benchmark_timer_disable_subtracting_average_overhead(
bool find_average_overhead
)
{
/* VOID */
}

127
c/src/lib/libbsp/arm/beagle/preinstall.am Normal file
View File

@@ -0,0 +1,127 @@
## Automatically generated by ampolish3 - Do not edit
if AMPOLISH3
$(srcdir)/preinstall.am: Makefile.am
$(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
endif
PREINSTALL_DIRS =
DISTCLEANFILES += $(PREINSTALL_DIRS)
all-local: $(TMPINSTALL_FILES)
TMPINSTALL_FILES =
CLEANFILES = $(TMPINSTALL_FILES)
all-am: $(PREINSTALL_FILES)
PREINSTALL_FILES =
CLEANFILES += $(PREINSTALL_FILES)
$(PROJECT_LIB)/$(dirstamp):
@$(MKDIR_P) $(PROJECT_LIB)
@: > $(PROJECT_LIB)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
$(PROJECT_INCLUDE)/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)
@: > $(PROJECT_INCLUDE)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
$(PROJECT_INCLUDE)/bsp/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(PROJECT_INCLUDE)/libcpu/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/libcpu
@: > $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
$(PROJECT_INCLUDE)/coverhd.h: ../../shared/include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h
$(PROJECT_INCLUDE)/bsp/utility.h: ../../shared/include/utility.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/utility.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/utility.h
$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h
$(PROJECT_INCLUDE)/bsp/stackalloc.h: ../../shared/include/stackalloc.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/stackalloc.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/stackalloc.h
$(PROJECT_INCLUDE)/bsp/uart-output-char.h: ../../shared/include/uart-output-char.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/uart-output-char.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/uart-output-char.h
$(PROJECT_INCLUDE)/bsp/tod.h: ../../shared/tod.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/tod.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/tod.h
$(PROJECT_INCLUDE)/bsp/start.h: ../shared/include/start.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/start.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/start.h
$(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
$(PROJECT_INCLUDE)/bsp/beagle.h: include/beagle.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/beagle.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/beagle.h
$(PROJECT_INCLUDE)/bsp/beagle-clock-config.h: include/beagle-clock-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/beagle-clock-config.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/beagle-clock-config.h
$(PROJECT_INCLUDE)/bsp/beagle-timer.h: include/beagle-timer.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/beagle-timer.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/beagle-timer.h
$(PROJECT_INCLUDE)/bsp/boot.h: include/boot.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/boot.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/boot.h
$(PROJECT_INCLUDE)/bsp/i2c.h: include/i2c.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/i2c.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/i2c.h
$(PROJECT_INCLUDE)/libcpu/arm-cp15.h: ../../../libcpu/arm/shared/include/arm-cp15.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/arm-cp15.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/arm-cp15.h
$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds
$(PROJECT_LIB)/linkcmds.beagle: startup/linkcmds.beagle $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.beagle
TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.beagle

138
c/src/lib/libbsp/arm/beagle/rtc/rtc-config.c Normal file
View File

@@ -0,0 +1,138 @@
/**
* @file
*
* @ingroup beagle
*
* @brief RTC configuration.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#include <libchip/rtc.h>
#include <bsp.h>
#include <bsp/beagle.h>
#define BEAGLE_RTC_COUNT 1U
#define BEAGLE_RTC_COUNTER_DELTA 0xfffffffeU
#define BEAGLE_RTC_KEY 0xb5c13f27U
#define BEAGLE_RTC_CTRL_FORCE_ONSW (1U << 7)
#define BEAGLE_RTC_CTRL_STOP (1U << 6)
#define BEAGLE_RTC_CTRL_RESET (1U << 4)
#define BEAGLE_RTC_CTRL_MATCH_1_ONSW (1U << 3)
#define BEAGLE_RTC_CTRL_MATCH_0_ONSW (1U << 2)
#define BEAGLE_RTC_CTRL_MATCH_1_INTR (1U << 1)
#define BEAGLE_RTC_CTRL_MATCH_0_INTR (1U << 0)
static void beagle_rtc_set( uint32_t val ) {
unsigned i = beagle_arm_clk() / BEAGLE_OSCILLATOR_RTC;
//beagle.rtc.ctrl |= BEAGLE_RTC_CTRL_STOP;
//beagle.rtc.ucount = val;
//beagle.rtc.dcount = BEAGLE_RTC_COUNTER_DELTA - val;
//beagle.rtc.ctrl &= ~BEAGLE_RTC_CTRL_STOP;
/* It needs some time before we can read the values back */
while( i != 0 ) {
__asm__ volatile( "nop" );
--i;
}
}
static void beagle_rtc_reset( void ) {
//beagle.rtc.ctrl = BEAGLE_RTC_CTRL_RESET;
//beagle.rtc.ctrl = 0;
//beagle.rtc.key = BEAGLE_RTC_KEY;
beagle_rtc_set( 0 );
}
static void beagle_rtc_initialize( int minor ) {
uint32_t up_first = 0;
uint32_t up_second = 0;
uint32_t down_first = 0;
uint32_t down_second = 0;
//if( beagle.rtc.key != BEAGLE_RTC_KEY ) {
// beagle_rtc_reset();
//}
do {
//up_first = beagle.rtc.ucount;
//down_first = beagle.rtc.dcount;
//up_second = beagle.rtc.ucount;
//down_second = beagle.rtc.dcount;
} while( up_first != up_second || down_first != down_second );
if( up_first + down_first != BEAGLE_RTC_COUNTER_DELTA ) {
beagle_rtc_reset();
}
}
static int beagle_rtc_get_time( int minor, rtems_time_of_day *tod ) {
struct timeval now = {
//.tv_sec = beagle.rtc.ucount,
.tv_usec = 0
};
struct tm time;
gmtime_r( &now.tv_sec, &time );
tod->year = time.tm_year + 1900;
tod->month = time.tm_mon + 1;
tod->day = time.tm_mday;
tod->hour = time.tm_hour;
tod->minute = time.tm_min;
tod->second = time.tm_sec;
tod->ticks = 0;
return RTEMS_SUCCESSFUL;
}
static int beagle_rtc_set_time( int minor, const rtems_time_of_day *tod ) {
beagle_rtc_set( _TOD_To_seconds( tod ) );
return 0;
}
static bool beagle_rtc_probe( int minor ) {
return true;
}
const rtc_fns beagle_rtc_ops = {
.deviceInitialize = beagle_rtc_initialize,
.deviceGetTime = beagle_rtc_get_time,
.deviceSetTime = beagle_rtc_set_time
};
size_t RTC_Count = BEAGLE_RTC_COUNT;
rtems_device_minor_number RTC_Minor = 0;
rtc_tbl RTC_Table [BEAGLE_RTC_COUNT] = {
{
.sDeviceName = "/dev/rtc",
.deviceType = RTC_CUSTOM,
.pDeviceFns = &beagle_rtc_ops,
.deviceProbe = beagle_rtc_probe,
.pDeviceParams = NULL,
.ulCtrlPort1 = 0,
.ulDataPort = 0,
.getRegister = NULL,
.setRegister = NULL
}
};

63
c/src/lib/libbsp/arm/beagle/simscripts/qemu-beagleboard.in Normal file
View File

@@ -0,0 +1,63 @@
#
# ARM/BeagleBoard Qemu Support
#
bspUsesGDBSimulator="no"
# bspGeneratesGDBCommands="yes"
# bspSupportsGDBServerMode="yes"
runBSP=NOT_OVERRIDDEN
if [ ! -r ${runBSP} ] ; then
runBSP=qemu-system-arm
fi
bspNeedsDos2Unix="yes"
bspGeneratesDeviceTree="yes"
bspInputDevice=qemu-gumstix.cmds
bspTreeFile=qemu-gumstix.cmds
bspRedirectInput=yes
runARGS()
{
# qemu-system-arm -M connex -m 289 -nographic -monitor null -pflash connex-flash.img <cmds >log
UBOOT=${HOME}/qemu/u-boot-connex-400-r1604.bin
FLASH=connex-flash.img
( dd of=${FLASH} bs=128k count=128 if=/dev/zero ;
dd of=${FLASH} bs=128k conv=notrunc if=${UBOOT} ;
dd of=${FLASH} bs=1k conv=notrunc seek=4096 if=${1} ) >/dev/null 2>&1
if [ ${coverage} = yes ] ; then
rm -f trace ${1}.tra
COVERAGE_ARG="-trace ${1}.tra"
fi
echo "-M connex -m 289 -nographic -monitor null \
-pflash ${FLASH} ${COVERAGE_ARG}"
}
checkBSPFaults()
{
return 0
}
bspLimit()
{
testname=$1
case ${testname} in
*stackchk*)limit=5 ;;
*fatal*) limit=1 ;;
*minimum*) limit=1 ;;
*psxtime*) limit=180 ;;
*) limit=60 ;;
esac
echo ${limit}
}
### Generate the commands we boot with
bspGenerateDeviceTree()
{
cat >qemu-gumstix.cmds <<EOF
bootelf 0x400000
EOF
}

48
c/src/lib/libbsp/arm/beagle/startup/bspreset.c Normal file
View File

@@ -0,0 +1,48 @@
/**
* @file
*
* @ingroup beagle
*
* @brief Reset code.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#include <stdbool.h>
#include <bspopts.h>
#include <bsp/bootcard.h>
#include <bsp/beagle.h>
static void watchdog_reset(void)
{
#ifdef BEAGLE_ENABLE_WATCHDOG_RESET
//BEAGLE_TIMCLK_CTRL |= TIMCLK_CTRL_WDT;
//beagle.wdt.mctrl |= WDTTIM_MCTRL_M_RES1 | WDTTIM_MCTRL_M_RES2;
//beagle.wdt.emr = WDTTIM_EMR_MATCH_CTRL_SET(beagle.wdt.emr, 0x2);
//beagle.wdt.ctrl |= WDTTIM_CTRL_COUNT_ENAB;
//beagle.wdt.match0 = 1;
//beagle.wdt.counter = 0;
#endif
}
void bsp_reset( void)
{
watchdog_reset();
while (true) {
/* Do nothing */
}
}

33
c/src/lib/libbsp/arm/beagle/startup/bspstart.c Normal file
View File

@@ -0,0 +1,33 @@
/**
* @file
*
* @ingroup beagle
*
* @brief Startup code.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#include <bsp.h>
#include <bsp/bootcard.h>
#include <bsp/irq-generic.h>
#include <bsp/irq.h>
#include <bsp/linker-symbols.h>
#include <bsp/beagle.h>
void bsp_start(void)
{
bsp_interrupt_initialize();
}

366
c/src/lib/libbsp/arm/beagle/startup/bspstarthooks.c Normal file
View File

@@ -0,0 +1,366 @@
/**
* @file
*
* @ingroup beagle
*
* @brief Startup code.
*/
/*
* Copyright (c) 2012 Claas Ziemke. All rights reserved.
*
* Claas Ziemke
* Kernerstrasse 11
* 70182 Stuttgart
* Germany
* <claas.ziemke@gmx.net>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#include <bsp.h>
#include <bsp/start.h>
#include <bsp/beagle.h>
#include <bsp/linker-symbols.h>
#include <bsp/uart-output-char.h>
#include <libcpu/arm-cp15.h>
#ifdef BEAGLE_DISABLE_READ_WRITE_DATA_CACHE
#define BEAGLE_MMU_READ_WRITE_DATA BEAGLE_MMU_READ_WRITE
#else
#define BEAGLE_MMU_READ_WRITE_DATA BEAGLE_MMU_READ_WRITE_CACHED
#endif
#ifdef BEAGLE_DISABLE_READ_ONLY_PROTECTION
#define BEAGLE_MMU_READ_ONLY_DATA BEAGLE_MMU_READ_WRITE_CACHED
#define BEAGLE_MMU_CODE BEAGLE_MMU_READ_WRITE_CACHED
#else
#define BEAGLE_MMU_READ_ONLY_DATA BEAGLE_MMU_READ_ONLY_CACHED
#define BEAGLE_MMU_CODE BEAGLE_MMU_READ_ONLY_CACHED
#endif
//LINKER_SYMBOL(beagle_translation_table_base);
static BSP_START_TEXT_SECTION void clear_bss(void)
{
const int *end = (const int *) bsp_section_bss_end;
int *out = (int *) bsp_section_bss_begin;
/* Clear BSS */
while (out != end) {
*out = 0;
++out;
}
}
/*#ifndef BEAGLE_DISABLE_MMU
typedef struct {
uint32_t begin;
uint32_t end;
uint32_t flags;
} beagle_mmu_config;
static const BSP_START_DATA_SECTION beagle_mmu_config
beagle_mmu_config_table [] = {
{
.begin = (uint32_t) bsp_section_fast_text_begin,
.end = (uint32_t) bsp_section_fast_text_end,
.flags = BEAGLE_MMU_CODE
}, {
.begin = (uint32_t) bsp_section_fast_data_begin,
.end = (uint32_t) bsp_section_fast_data_end,
.flags = BEAGLE_MMU_READ_WRITE_DATA
#ifdef BEAGLE_SCRATCH_AREA_SIZE
}, {
.begin = (uint32_t) &beagle_scratch_area [0],
.end = (uint32_t) &beagle_scratch_area [BEAGLE_SCRATCH_AREA_SIZE],
.flags = BEAGLE_MMU_READ_ONLY_DATA
#endif
}, {
.begin = (uint32_t) bsp_section_start_begin,
.end = (uint32_t) bsp_section_start_end,
.flags = BEAGLE_MMU_CODE
}, {
.begin = (uint32_t) bsp_section_vector_begin,
.end = (uint32_t) bsp_section_vector_end,
.flags = BEAGLE_MMU_READ_WRITE_CACHED
}, {
.begin = (uint32_t) bsp_section_text_begin,
.end = (uint32_t) bsp_section_text_end,
.flags = BEAGLE_MMU_CODE
}, {
.begin = (uint32_t) bsp_section_rodata_begin,
.end = (uint32_t) bsp_section_rodata_end,
.flags = BEAGLE_MMU_READ_ONLY_DATA
}, {
.begin = (uint32_t) bsp_section_data_begin,
.end = (uint32_t) bsp_section_data_end,
.flags = BEAGLE_MMU_READ_WRITE_DATA
}, {
.begin = (uint32_t) bsp_section_bss_begin,
.end = (uint32_t) bsp_section_bss_end,
.flags = BEAGLE_MMU_READ_WRITE_DATA
}, {
.begin = (uint32_t) bsp_section_work_begin,
.end = (uint32_t) bsp_section_work_end,
.flags = BEAGLE_MMU_READ_WRITE_DATA
}, {
.begin = (uint32_t) bsp_section_stack_begin,
.end = (uint32_t) bsp_section_stack_end,
.flags = BEAGLE_MMU_READ_WRITE_DATA
}, {
.begin = 0x0U,
.end = 0x100000U,
.flags = BEAGLE_MMU_READ_ONLY_CACHED
}, {
.begin = 0x20000000U,
.end = 0x200c0000U,
.flags = BEAGLE_MMU_READ_WRITE
}, {
.begin = 0x30000000U,
.end = 0x32000000U,
.flags = BEAGLE_MMU_READ_WRITE
}, {
.begin = 0x40000000U,
.end = 0x40100000U,
.flags = BEAGLE_MMU_READ_WRITE
}, {
.begin = (uint32_t) beagle_magic_zero_begin,
.end = (uint32_t) beagle_magic_zero_end,
.flags = BEAGLE_MMU_READ_WRITE_DATA
}
};
static BSP_START_TEXT_SECTION void set_translation_table_entries(
uint32_t *ttb,
const beagle_mmu_config *config
)
{
uint32_t i = ARM_MMU_SECT_GET_INDEX(config->begin);
uint32_t iend =
ARM_MMU_SECT_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(config->end));
if (config->begin != config->end) {
while (i < iend) {
ttb [i] = (i << ARM_MMU_SECT_BASE_SHIFT) | config->flags;
++i;
}
}
}
static BSP_START_TEXT_SECTION void
setup_translation_table_and_enable_mmu(uint32_t ctrl)
{
uint32_t const dac =
ARM_CP15_DAC_DOMAIN(BEAGLE_MMU_CLIENT_DOMAIN, ARM_CP15_DAC_CLIENT);
uint32_t *const ttb = (uint32_t *) beagle_translation_table_base;
size_t const config_entry_count =
sizeof(beagle_mmu_config_table) / sizeof(beagle_mmu_config_table [0]);
size_t i = 0;
arm_cp15_set_domain_access_control(dac);
arm_cp15_set_translation_table_base(ttb);
// Initialize translation table with invalid entries
for (i = 0; i < ARM_MMU_TRANSLATION_TABLE_ENTRY_COUNT; ++i) {
ttb [i] = 0;
}
for (i = 0; i < config_entry_count; ++i) {
set_translation_table_entries(ttb, &beagle_mmu_config_table [i]);
}
// Enable MMU and cache
ctrl |= ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M;
arm_cp15_set_control(ctrl);
}
#endif*/
/*static BSP_START_TEXT_SECTION void setup_mmu_and_cache(void)
{
uint32_t ctrl = 0;
// Disable MMU and cache, basic settings
ctrl = arm_cp15_get_control();
ctrl &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_R | ARM_CP15_CTRL_C
| ARM_CP15_CTRL_V | ARM_CP15_CTRL_M);
ctrl |= ARM_CP15_CTRL_S | ARM_CP15_CTRL_A;
arm_cp15_set_control(ctrl);
arm_cp15_cache_invalidate();
arm_cp15_tlb_invalidate();
#ifndef BEAGLE_DISABLE_MMU
//setup_translation_table_and_enable_mmu(ctrl);
#endif
}*/
/*BSP_START_TEXT_SECTION bool beagle_start_pll_setup(
uint32_t hclkpll_ctrl,
uint32_t hclkdiv_ctrl,
bool force
)
{
uint32_t pwr_ctrl = BEAGLE_PWR_CTRL;
bool settings_ok =
((BEAGLE_HCLKPLL_CTRL ^ hclkpll_ctrl) & BSP_MSK32(1, 16)) == 0
&& ((BEAGLE_HCLKDIV_CTRL ^ hclkdiv_ctrl) & BSP_MSK32(0, 8)) == 0;
if ((pwr_ctrl & PWR_NORMAL_RUN_MODE) == 0 || (!settings_ok && force)) {
// Disable HCLK PLL output
BEAGLE_PWR_CTRL = pwr_ctrl & ~PWR_NORMAL_RUN_MODE;
// Configure HCLK PLL
BEAGLE_HCLKPLL_CTRL = hclkpll_ctrl;
while ((BEAGLE_HCLKPLL_CTRL & HCLK_PLL_LOCK) == 0) {
// Wait
}
// Setup HCLK divider
BEAGLE_HCLKDIV_CTRL = hclkdiv_ctrl;
// Enable HCLK PLL output
BEAGLE_PWR_CTRL = pwr_ctrl | PWR_NORMAL_RUN_MODE;
}
return settings_ok;
}*/
#if BEAGLE_OSCILLATOR_MAIN != 13000000U
#error "unexpected main oscillator frequency"
#endif
/*static BSP_START_TEXT_SECTION void setup_pll(void)
{
uint32_t hclkpll_ctrl = BEAGLE_HCLKPLL_CTRL_INIT_VALUE;
uint32_t hclkdiv_ctrl = BEAGLE_HCLKDIV_CTRL_INIT_VALUE;
beagle_start_pll_setup(hclkpll_ctrl, hclkdiv_ctrl, false);
}*/
BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
{
//setup_pll();
//setup_mmu_and_cache();
}
/*static BSP_START_TEXT_SECTION void stop_dma_activities(void)
{
#ifdef BEAGLE_STOP_GPDMA
BEAGLE_DO_STOP_GPDMA;
#endif
#ifdef BEAGLE_STOP_ETHERNET
BEAGLE_DO_STOP_ETHERNET;
#endif
#ifdef BEAGLE_STOP_USB
BEAGLE_DO_STOP_USB;
#endif
}*/
static BSP_START_TEXT_SECTION void setup_uarts(void)
{
uint32_t uartclk_ctrl = 0;
#ifdef BEAGLE_CONFIG_U3CLK
uartclk_ctrl |= 1U << 0;
BEAGLE_U3CLK = BEAGLE_CONFIG_U3CLK;
#endif
#ifdef BEAGLE_CONFIG_U4CLK
uartclk_ctrl |= 1U << 1;
BEAGLE_U4CLK = BEAGLE_CONFIG_U4CLK;
#endif
#ifdef BEAGLE_CONFIG_U5CLK
uartclk_ctrl |= 1U << 2;
BEAGLE_U5CLK = BEAGLE_CONFIG_U5CLK;
#endif
#ifdef BEAGLE_CONFIG_U6CLK
uartclk_ctrl |= 1U << 3;
BEAGLE_U6CLK = BEAGLE_CONFIG_U6CLK;
#endif
#ifdef BEAGLE_CONFIG_UART_CLKMODE
BEAGLE_UART_CLKMODE = BEAGLE_CONFIG_UART_CLKMODE;
#endif
BEAGLE_UARTCLK_CTRL = uartclk_ctrl;
BEAGLE_UART_CTRL = 0x0;
BEAGLE_UART_LOOP = 0x0;
#ifdef BEAGLE_CONFIG_U5CLK
// Clock is already set in BEAGLE_U5CLK
BSP_CONSOLE_UART_INIT(0x01);
#endif
}
/*static BSP_START_TEXT_SECTION void setup_timer(void)
{
volatile beagle_timer *timer = BEAGLE_STANDARD_TIMER;
BEAGLE_TIMCLK_CTRL1 = (1U << 2) | (1U << 3);
timer->tcr = BEAGLE_TIMER_TCR_RST;
timer->ctcr = 0x0;
timer->pr = 0x0;
timer->ir = 0xff;
timer->mcr = 0x0;
timer->ccr = 0x0;
timer->tcr = BEAGLE_TIMER_TCR_EN;
}*/
BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
{
//stop_dma_activities();
setup_uarts();
//setup_timer();
// Copy .text section
arm_cp15_instruction_cache_invalidate();
bsp_start_memcpy(
(int *) bsp_section_text_begin,
(const int *) bsp_section_text_load_begin,
(size_t) bsp_section_text_size
);
// Copy .rodata section
arm_cp15_instruction_cache_invalidate();
bsp_start_memcpy(
(int *) bsp_section_rodata_begin,
(const int *) bsp_section_rodata_load_begin,
(size_t) bsp_section_rodata_size
);
// Copy .data section
arm_cp15_instruction_cache_invalidate();
bsp_start_memcpy(
(int *) bsp_section_data_begin,
(const int *) bsp_section_data_load_begin,
(size_t) bsp_section_data_size
);
// Copy .fast_text section
arm_cp15_instruction_cache_invalidate();
bsp_start_memcpy(
(int *) bsp_section_fast_text_begin,
(const int *) bsp_section_fast_text_load_begin,
(size_t) bsp_section_fast_text_size
);
// Copy .fast_data section
arm_cp15_instruction_cache_invalidate();
bsp_start_memcpy(
(int *) bsp_section_fast_data_begin,
(const int *) bsp_section_fast_data_load_begin,
(size_t) bsp_section_fast_data_size
);
// Clear .bss section
clear_bss();
// At this point we can use objects outside the .start section
}

54
c/src/lib/libbsp/arm/beagle/startup/linkcmds.beagle Normal file
View File

@@ -0,0 +1,54 @@
/**
* @file
*
* @ingroup beagle_linker
*
* @brief Memory map.
*/
/**
* @defgroup beagle_linker BeagleBoard Application Memory Map
*
* @ingroup bsp_linker
*
* @brief BeagleBoard application memory map.
*
*/
MEMORY {
RAM : ORIGIN = 0x80000000, LENGTH = 32M
NIRVANA : ORIGIN = 0, LENGTH = 0
}
REGION_ALIAS ("REGION_START", RAM);
REGION_ALIAS ("REGION_VECTOR", RAM);
REGION_ALIAS ("REGION_TEXT", RAM);
REGION_ALIAS ("REGION_TEXT_LOAD", RAM);
REGION_ALIAS ("REGION_RODATA", RAM);
REGION_ALIAS ("REGION_RODATA_LOAD", RAM);
REGION_ALIAS ("REGION_DATA", RAM);
REGION_ALIAS ("REGION_DATA_LOAD", RAM);
REGION_ALIAS ("REGION_FAST_TEXT", RAM);
REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
REGION_ALIAS ("REGION_FAST_DATA", RAM);
REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
REGION_ALIAS ("REGION_BSS", RAM);
REGION_ALIAS ("REGION_WORK", RAM);
REGION_ALIAS ("REGION_STACK", RAM);
//beagle_scratch_area = ORIGIN (RAM_SCRATCH);
bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 4096;
bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024;
bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
beagle = 0x20020000;
beagle_magic_zero_begin = 0x05000000;
beagle_magic_zero_end = 0x07000000;
beagle_magic_zero_size = beagle_magic_zero_end - beagle_magic_zero_end;
INCLUDE linkcmds.armv4
HeapSize = 1024 * 1024;