2001-07-03 Joel Sherrill <joel@OARcorp.com>

* cpu.c: Fixed typo.

c/src/exec/score/cpu/mips/ChangeLog

@@ -1,3 +1,7 @@
+2001-07-03	Joel Sherrill <joel@OARcorp.com>
+
+	* cpu.c: Fixed typo.
+
 2000-05-24	Joel Sherrill <joel@OARcorp.com>
 
 	* rtems/score/mips.h: Added constants for MIPS exception numbers.

c/src/exec/score/cpu/mips/cpu.c

@@ -153,7 +153,7 @@ void _CPU_ISR_install_raw_handler(
    *  table used by the CPU to dispatch interrupt handlers.
    *
    *  Because all interrupts are vectored through the same exception handler
-   *  this is not necessary on thi sport.
+   *  this is not necessary on this port.
    */
 }