bsp/sparc: Ensure that data cache snooping is enabled

Check that data cache snooping exists and is enabled on all cores.
This commit is contained in:
Daniel Cederman
2014-09-10 13:39:53 +02:00
committed by Sebastian Huber
parent cf4f962cc0
commit 77a2226a16
3 changed files with 20 additions and 2 deletions

View File

@@ -52,6 +52,8 @@ typedef enum {
LEON3_FATAL_NO_IRQMP_CONTROLLER = BSP_FATAL_CODE_BLOCK(2),
LEON3_FATAL_CONSOLE_REGISTER_DEV,
LEON3_FATAL_CLOCK_INITIALIZATION,
LEON3_FATAL_INVALID_CACHE_CONFIG_MAIN_PROCESSOR,
LEON3_FATAL_INVALID_CACHE_CONFIG_SECONDARY_PROCESSOR,
/* LPC24XX fatal codes */
LPC24XX_FATAL_PL111_SET_UP = BSP_FATAL_CODE_BLOCK(3),

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@@ -90,6 +90,7 @@ extern "C" {
* The following defines the bits in the LEON Cache Control Register.
*/
#define LEON3_REG_CACHE_CTRL_FI 0x00200000 /* Flush instruction cache */
#define LEON3_REG_CACHE_CTRL_DS 0x00800000 /* Data cache snooping */
/* LEON3 Interrupt Controller */
extern volatile struct irqmp_regs *LEON3_IrqCtrl_Regs;
@@ -359,6 +360,11 @@ static inline uint32_t leon3_get_cache_control_register(void)
return leon3_get_system_register(0x0);
}
static inline bool leon3_data_cache_snooping_enabled(void)
{
return leon3_get_cache_control_register() & LEON3_REG_CACHE_CTRL_DS;
}
static inline uint32_t leon3_get_inst_cache_config_register(void)
{
return leon3_get_system_register(0x8);

View File

@@ -15,6 +15,7 @@
#include <bsp.h>
#include <bsp/bootcard.h>
#include <bsp/fatal.h>
#include <cache_.h>
#include <leon.h>
#include <rtems/bspIo.h>
@@ -44,7 +45,15 @@ void bsp_start_on_secondary_processor()
{
uint32_t cpu_index_self = _CPU_SMP_Get_current_processor();
leon3_set_cache_control_register(0x80000F);
/*
* If data cache snooping is not enabled we terminate using BSP_fatal_exit()
* instead of bsp_fatal(). This is done since the latter function tries to
* acquire a ticket lock, an operation which requires data cache snooping to
* be enabled.
*/
if ( !leon3_data_cache_snooping_enabled() )
BSP_fatal_exit( LEON3_FATAL_INVALID_CACHE_CONFIG_SECONDARY_PROCESSOR );
/* Unmask IPI interrupts at Interrupt controller for this CPU */
LEON3_IrqCtrl_Regs->mask[cpu_index_self] |= 1U << LEON3_mp_irq;
@@ -53,7 +62,8 @@ void bsp_start_on_secondary_processor()
uint32_t _CPU_SMP_Initialize( void )
{
leon3_set_cache_control_register(0x80000F);
if ( !leon3_data_cache_snooping_enabled() )
bsp_fatal( LEON3_FATAL_INVALID_CACHE_CONFIG_MAIN_PROCESSOR );
if ( rtems_configuration_get_maximum_processors() > 1 ) {
LEON_Unmask_interrupt(LEON3_mp_irq);