bsps/zynqmp: Added I2C support for ZynqMP

Added I2C drivers for ZynqMP and updated build system accordingly.

spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml

@@ -27,6 +27,10 @@ links:
   uid: optramlen
 - role: build-dependency
   uid: optramori
+- role: build-dependency
+  uid: optclki2c0
+- role: build-dependency
+  uid: optclki2c1
 - role: build-dependency
   uid: optclkuart
 - role: build-dependency

spec/build/bsps/aarch64/xilinx-zynqmp/grp_zu3eg.yml

@@ -11,6 +11,8 @@ links:
   uid: grp
 - role: build-dependency
   uid: tstzu3eg
+- role : build-dependency
+  uid: objcadencei2c
 type: build
 use-after: []
 use-before: []

spec/build/bsps/aarch64/xilinx-zynqmp/objcadencei2c.yml

@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2021 On-Line Applications Research (OAR)
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}/bsp
+  source:
+  - bsps/include/dev/i2c/cadence-i2c-regs.h
+  - bsps/include/dev/i2c/cadence-i2c.h
+  - bsps/aarch64/xilinx-zynqmp/include/bsp/i2c.h
+links: []
+source:
+- bsps/shared/dev/i2c/cadence-i2c.c
+type: build

spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml

@@ -0,0 +1,31 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights: |
+  Copyright (C) 2021 On-Line Applications Research (OAR)
+  Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 111111111
+default-by-family: []
+default-by-variant:
+- value: 111111111
+  variants:
+  - aarch64/xilinx_zynqmp_ilp32_qemu.*
+- value: 111111111
+  variants:
+  - aarch64/xilinx_zynqmp_ilp32_zu3eg.*
+- value: 111111111
+  variants:
+  - aarch64/xilinx_zynqmp_lp64_qemu.*
+- value: 111111111
+  variants:
+  - aarch64/xilinx_zynqmp_lp64_zu3eg.*
+description: |
+  ZynqMP i2c0 clock frequency in Hz. This is the frequency after the signal
+  has been processed using the values passed to the I2C0_REF_CTRL register.
+enabled-by: true
+format: '{}'
+links: []
+name: ZYNQMP_CLOCK_I2C0
+type: build

spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml

@@ -0,0 +1,31 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights: |
+  Copyright (C) 2021 On-Line Applications Research (OAR)
+  Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 111111111
+default-by-family: []
+default-by-variant:
+- value: 111111111
+  variants:
+  - aarch64/xilinx_zynqmp_ilp32_qemu.*
+- value: 111111111
+  variants:
+  - aarch64/xilinx_zynqmp_ilp32_zu3eg.*
+- value: 111111111
+  variants:
+  - aarch64/xilinx_zynqmp_lp64_qemu.*
+- value: 111111111
+  variants:
+  - aarch64/xilinx_zynqmp_lp64_zu3eg.*
+description: |
+  ZynqMP i2c1 clock frequency in Hz. This is the frequency after the signal
+  has been processed using the values passed to the I2C1_REF_CTRL register.
+enabled-by: true
+format: '{}'
+links: []
+name: ZYNQMP_CLOCK_I2C1
+type: build