bsps: Move clock drivers to bsps

This patch is a part of the BSP source reorganization. Update #3285.
2018-04-19 06:35:52 +02:00
parent 5c5b021f51
commit 7632906fc2
142 changed files with 140 additions and 140 deletions
--- a/bsps/lm32/shared/clock/ckinit.c
+++ b/bsps/lm32/shared/clock/ckinit.c
@@ -0,0 +1,78 @@
+/*
+ *  Clock device driver for Lattice Mico32 (lm32).
+ */
+
+/*
+ *  COPYRIGHT (c) 1989-2009.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ *
+ *  Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
+ *  Micro-Research Finland Oy
+ */
+
+#include <bsp.h>
+#include "../include/system_conf.h"
+#include "clock.h"
+#include "bspopts.h"
+
+#if LM32_ON_SIMULATOR
+#define CLOCK_DRIVER_USE_FAST_IDLE 1
+#endif
+
+static inline int clockread(unsigned int reg)
+{
+  return *((int*)(TIMER0_BASE_ADDRESS + reg));
+}
+
+static inline void clockwrite(unsigned int reg, int value)
+{
+  *((int*)(TIMER0_BASE_ADDRESS + reg)) = value;
+}
+
+/*
+ *  The interrupt vector number associated with the clock tick device
+ *  driver.
+ */
+#define CLOCK_VECTOR    ( TIMER0_IRQ )
+#define CLOCK_IRQMASK   ( 1 << CLOCK_VECTOR )
+
+#define Clock_driver_support_at_tick() \
+  do { \
+    /* Clear overflow flag */ \
+    clockwrite(LM32_CLOCK_SR, 0); \
+    lm32_interrupt_ack(CLOCK_IRQMASK); \
+  } while (0)
+
+#define Clock_driver_support_install_isr(_new ) \
+  set_vector( _new, CLOCK_VECTOR, 1 )
+
+static void Clock_driver_support_initialize_hardware(void)
+{
+  /* Set clock period */
+  clockwrite(LM32_CLOCK_PERIOD,
+	     (CPU_FREQUENCY /
+	      (1000000 / rtems_configuration_get_microseconds_per_tick())));
+
+  /* Enable clock interrupts and start in continuous mode */
+  clockwrite(LM32_CLOCK_CR, LM32_CLOCK_CR_ITO |
+	     LM32_CLOCK_CR_CONT |
+	     LM32_CLOCK_CR_START);
+
+  lm32_interrupt_unmask(CLOCK_IRQMASK);
+}
+
+#define Clock_driver_support_shutdown_hardware() \
+  do { \
+    /* Disable clock interrupts and stop */ \
+    lm32_interrupt_unmask(CLOCK_IRQMASK); \
+    clockwrite(LM32_CLOCK_CR, LM32_CLOCK_CR_STOP); \
+  } while (0)
+
+#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
+
+#include "../../../shared/dev/clock/clockimpl.h"
+
--- a/bsps/lm32/shared/clock/clock.h
+++ b/bsps/lm32/shared/clock/clock.h
@@ -0,0 +1,55 @@
+/**
+ * @file
+ * @ingroup lm32_clock
+ * @brief LatticeMico32 Timer (Clock) definitions
+ */
+
+/*
+ *  This file contains definitions for LatticeMico32 Timer (Clock)
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ *
+ *  Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
+ *  Micro-Research Finland Oy
+ */
+
+/**
+ * @defgroup lm32_clock LM32 Clock
+ * @ingroup lm32_shared
+ * @brief LatticeMico32 Timer (Clock) definitions.
+ * @{
+ */
+
+#ifndef _BSPCLOCK_H
+#define _BSPCLOCK_H
+
+/** @brief Status Register */
+
+#define LM32_CLOCK_SR       (0x0000)
+#define LM32_CLOCK_SR_TO    (0x0001)
+#define LM32_CLOCK_SR_RUN   (0x0002)
+
+/** @brief Control Register */
+
+#define LM32_CLOCK_CR       (0x0004)
+#define LM32_CLOCK_CR_ITO   (0x0001)
+#define LM32_CLOCK_CR_CONT  (0x0002)
+#define LM32_CLOCK_CR_START (0x0004)
+#define LM32_CLOCK_CR_STOP  (0x0008)
+
+/** @brief Period Register */
+
+#define LM32_CLOCK_PERIOD   (0x0008)
+
+/** @brief Snapshot Register */
+
+#define LM32_CLOCK_SNAPSHOT (0x000C)
+
+#endif /* _BSPCLOCK_H */
+
+/** @} */