bsps/xqspipsu: Add support for reading ECC

This adds a helper function to read the ECC status for an ECC unit in
SPI-attached NOR memory.

bsps/include/dev/spi/xqspipsu-flash-helper.h

@@ -79,3 +79,32 @@ int QspiPsu_NOR_Read(
   u32 ByteCount,
   u8 **ReadBfrPtr
 );
+
+/*****************************************************************************/
+/**
+ *
+ * This function performs a read of the ECC Status Register for a given address.
+ *
+ * @param	QspiPsuPtr is a pointer to the QSPIPSU driver component to use.
+ * @param	Address contains the address of the ECC unit for which the ECCSR
+ *		needs to be read. The ECC unit contains 16 bytes of user data
+ *		and all bytes in an ECC unit will return the same ECCSR.
+ * @param	ReadBfrPtr is a pointer to a single byte to which the ECCSR will
+ * 		be written.
+ *
+ * @return	XST_SUCCESS if successful, else XST_FAILURE.
+ *
+ * @note	Only the three least significant bits of the returned byte are
+ * 		meaningful. If all bits are 0, ECC is enabled for this unit and
+ * 		no errors have been encountered.
+ * 		Bit 0 is 1: ECC is disabled for the requested unit.
+ * 		Bit 1 is 1: A single bit error has been corrected in user data.
+ * 		Bit 2 is 1: A single bit error has been found in the ECC data
+ * 		            and may indicate user data corruption.
+ *
+ ******************************************************************************/
+int QspiPsu_NOR_Read_Ecc(
+  XQspiPsu *QspiPsuPtr,
+  u32 Address,
+  u8 *ReadBfrPtr
+);

bsps/include/dev/spi/xqspipsu_flash_config.h

@@ -79,6 +79,7 @@ extern "C" {
 
 #define BANK_REG_RD		0x16
 #define BANK_REG_WR		0x17
+#define READ_ECCSR		0x18
 /* Bank register is called Extended Address Register in Micron */
 #define EXTADD_REG_RD		0xC8
 #define EXTADD_REG_WR		0xC5