forked from Imagelibrary/rtems
preliminary Raspberry Pi Model 2 support
This patch adds a BSP variant for the Raspberry Pi 2. You can build both variants by configuring with the option --enable-rtemsbsp="raspberrypi2 raspberrypi" For the current BSP, the only change was the peripheral register base address and the compiler options. The raspberrypi/make/custom rules were re-factored: raspberrypi.inc -- Common rules raspberrypi.cfg -- Raspberry Pi 1 specific rule/optons raspberrypi2.cfg -- Raspberry Pi 2 specific rule/options I tested hello, ticker, unlimited, and paranoia on both the Pi (Model A+) and Pi 2.
This commit is contained in:
Alan Cudmore
committed by
Joel Sherrill
Joel Sherrill
parent
dc5e5f4448
commit
71260b4a09
@@ -24,6 +24,14 @@ AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
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RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[])
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RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start])
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# Is this a Raspberry Pi 2?
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RTEMS_BSPOPTS_SET([BSP_IS_RPI2],[raspberrypi2],[1])
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RTEMS_BSPOPTS_SET([BSP_IS_RPI2],[*],[0])
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RTEMS_BSPOPTS_HELP([BSP_IS_RPI2],[Set if the BSP variant is Raspberry Pi 2.])
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AM_CONDITIONAL(RTEMS_RPI2,[test "$BSP_IS_RPI2" = "1"])
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RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
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RTEMS_BSP_LINKCMDS
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@@ -44,6 +44,20 @@
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/** @} */
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/**
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* @name Peripheral Base Register Address
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*
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* @{
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*/
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#if (BSP_IS_RPI2 == 1)
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#define RPI_PERIPHERAL_BASE 0x3F000000
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#else
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#define RPI_PERIPHERAL_BASE 0x20000000
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#endif
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#define RPI_PERIPHERAL_SIZE 0x01000000
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/**
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* @name Internal ARM Timer Registers
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*
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@@ -52,7 +66,7 @@
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#define BCM2835_CLOCK_FREQ 250000000
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#define BCM2835_TIMER_BASE (0x2000B400)
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#define BCM2835_TIMER_BASE (RPI_PERIPHERAL_BASE + 0xB400)
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#define BCM2835_TIMER_LOD (BCM2835_TIMER_BASE+0x00)
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#define BCM2835_TIMER_VAL (BCM2835_TIMER_BASE+0x04)
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@@ -74,7 +88,7 @@
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* @{
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*/
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#define BCM2835_GPIO_REGS_BASE (0x20200000)
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#define BCM2835_GPIO_REGS_BASE (RPI_PERIPHERAL_BASE + 0x200000)
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#define BCM2835_GPIO_GPFSEL1 (BCM2835_GPIO_REGS_BASE+0x04)
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#define BCM2835_GPIO_GPSET0 (BCM2835_GPIO_REGS_BASE+0x1C)
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@@ -90,7 +104,7 @@
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* @{
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*/
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#define BCM2835_AUX_BASE (0x20215000)
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#define BCM2835_AUX_BASE (RPI_PERIPHERAL_BASE + 0x215000)
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#define AUX_ENABLES (BCM2835_AUX_BASE+0x04)
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#define AUX_MU_IO_REG (BCM2835_AUX_BASE+0x40)
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@@ -115,7 +129,7 @@
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*/
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#define BCM2835_UART0_BASE (0x20201000)
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#define BCM2835_UART0_BASE (RPI_PERIPHERAL_BASE + 0x201000)
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#define BCM2835_UART0_DR (BCM2835_UART0_BASE+0x00)
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#define BCM2835_UART0_RSRECR (BCM2835_UART0_BASE+0x04)
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@@ -155,7 +169,7 @@
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* @{
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*/
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#define BCM2835_BASE_INTC (0x2000B200)
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#define BCM2835_BASE_INTC (RPI_PERIPHERAL_BASE + 0xB200)
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#define BCM2835_IRQ_BASIC (BCM2835_BASE_INTC + 0x00)
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#define BCM2835_IRQ_PENDING1 (BCM2835_BASE_INTC + 0x04)
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@@ -182,7 +196,7 @@
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* it's own RTOS. 1 and 3 are available for use in
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* RTEMS.
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*/
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#define BCM2835_GPU_TIMER_BASE (0x20003000)
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#define BCM2835_GPU_TIMER_BASE (RPI_PERIPHERAL_BASE + 0x3000)
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#define BCM2835_GPU_TIMER_CS (BCM2835_TIMER_BASE+0x00)
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#define BCM2835_GPU_TIMER_CLO (BCM2835_TIMER_BASE+0x04)
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@@ -1,20 +1,7 @@
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#
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# Config file for RASPBERRYPI
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#
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include $(RTEMS_ROOT)/make/custom/default.cfg
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RTEMS_CPU = arm
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include $(RTEMS_ROOT)/make/custom/raspberrypi.inc
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CPU_CFLAGS = -mcpu=arm1176jzf-s
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CFLAGS_OPTIMIZE_V = -O2 -g
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# This defines the operations performed on the linked executable.
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# is currently required.
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define bsp-post-link
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$(OBJCOPY) -O binary --strip-all \
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$(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT)
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$(SIZE) $(basename $@)$(EXEEXT)
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endef
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17
c/src/lib/libbsp/arm/raspberrypi/make/custom/raspberrypi.inc
Normal file
17
c/src/lib/libbsp/arm/raspberrypi/make/custom/raspberrypi.inc
Normal file
@@ -0,0 +1,17 @@
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#
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# Config file for Raspberry Pi variants.
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#
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include $(RTEMS_ROOT)/make/custom/default.cfg
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RTEMS_CPU = arm
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CFLAGS_OPTIMIZE_V ?= -O2 -g
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# This defines the operations performed on the linked executable.
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# is currently required.
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define bsp-post-link
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$(OBJCOPY) -O binary --strip-all \
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$(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT)
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$(SIZE) $(basename $@)$(EXEEXT)
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endef
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@@ -0,0 +1,6 @@
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#
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# Config file for RASPBERRYPI 2
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#
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include $(RTEMS_ROOT)/make/custom/raspberrypi.inc
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CPU_CFLAGS = -march=armv7-a -mtune=cortex-a7
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@@ -20,6 +20,7 @@
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* http://www.rtems.org/license/LICENSE.
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*/
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#include <bsp.h>
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#include <bsp/arm-cp15-start.h>
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const arm_cp15_start_section_config arm_cp15_start_mmu_config_table[] = {
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@@ -64,8 +65,8 @@ const arm_cp15_start_section_config arm_cp15_start_mmu_config_table[] = {
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.end = (uint32_t) bsp_section_stack_end,
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.flags = ARMV7_MMU_DATA_READ_WRITE_CACHED
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}, {
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.begin = 0x20000000,
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.end = 0x21000000,
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.begin = RPI_PERIPHERAL_BASE,
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.end = RPI_PERIPHERAL_BASE + RPI_PERIPHERAL_SIZE,
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.flags = ARMV7_MMU_DEVICE
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}
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};
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