forked from Imagelibrary/rtems
Patch rtems-rc-19991011-3.diff from Ralf Corsepius.
This commit is contained in:
@@ -148,31 +148,6 @@ static inline unsigned int sh_swap_u16(
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#define CPU_swap_u32( value ) sh_swap_u32( value )
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#define CPU_swap_u16( value ) sh_swap_u16( value )
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/*
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* Simple spin delay in microsecond units for device drivers.
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* This is very dependent on the clock speed of the target.
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*
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* Since we don't have a real time clock, this is a very rough
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* approximation, assuming that each cycle of the delay loop takes
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* approx. 4 machine cycles.
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*
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* e.g.: MHZ = 20 => 5e-8 secs per instruction
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* => 4 * 5e-8 secs per delay loop
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*/
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#define sh_delay( microseconds ) \
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{ register unsigned int _delay = (microseconds) * (MHZ / 4 ); \
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asm volatile ( \
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"0: add #-1,%0\n \
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nop\n \
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cmp/pl %0\n \
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bt 0b\
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nop" \
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:: "r" (_delay) ); \
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}
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#define CPU_delay( microseconds ) sh_delay( microseconds )
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extern unsigned int sh_set_irq_priority(
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unsigned int irq,
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unsigned int prio );
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@@ -68,8 +68,39 @@ extern "C" {
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#define Lower_tm27_intr()
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/* Constants */
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#ifndef MHZ
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#error Missing MHZ
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#endif
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#define MHZ 20
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/*
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* Simple spin delay in microsecond units for device drivers.
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* This is very dependent on the clock speed of the target.
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*
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* Since we don't have a real time clock, this is a very rough
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* approximation, assuming that each cycle of the delay loop takes
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* approx. 4 machine cycles.
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*
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* e.g.: MHZ = 20 => 5e-8 secs per instruction
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* => 4 * 5e-8 secs per delay loop
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*/
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#define delay( microseconds ) \
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{ register unsigned int _delay = (microseconds) * (MHZ / 4 ); \
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asm volatile ( \
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"0: add #-1,%0\n \
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nop\n \
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cmp/pl %0\n \
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bt 0b\
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nop" \
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:: "r" (_delay) ); \
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}
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/*
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* For backward compatibility only.
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* Do not rely on them being present in future
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*/
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#define CPU_delay( microseconds ) delay( microseconds )
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#define sh_deley( microseconds ) delay( microseconds )
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/*
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* Defined in the linker script 'linkcmds'
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@@ -47,7 +47,7 @@ $(INSTALLDIRS):
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#
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DEFINES +=
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CPPFLAGS +=
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CPPFLAGS += $(BSP_CPPFLAGS)
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CFLAGS +=
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LD_PATHS +=
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@@ -40,7 +40,7 @@ INSTALL_CHANGE = @INSTALL_CHANGE@
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#
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DEFINES +=
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CPPFLAGS +=
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CPPFLAGS += -DMHZ=$(MHZ)
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CFLAGS += $(CFLAGS_OS_V)
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LD_PATHS +=
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@@ -40,7 +40,7 @@ INSTALL_CHANGE = @INSTALL_CHANGE@
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#
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DEFINES +=
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CPPFLAGS +=
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CPPFLAGS += -DMHZ=$(MHZ)
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CFLAGS +=
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LD_PATHS +=
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@@ -148,31 +148,6 @@ static inline unsigned int sh_swap_u16(
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#define CPU_swap_u32( value ) sh_swap_u32( value )
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#define CPU_swap_u16( value ) sh_swap_u16( value )
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/*
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* Simple spin delay in microsecond units for device drivers.
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* This is very dependent on the clock speed of the target.
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*
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* Since we don't have a real time clock, this is a very rough
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* approximation, assuming that each cycle of the delay loop takes
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* approx. 4 machine cycles.
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*
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* e.g.: MHZ = 20 => 5e-8 secs per instruction
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* => 4 * 5e-8 secs per delay loop
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*/
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#define sh_delay( microseconds ) \
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{ register unsigned int _delay = (microseconds) * (MHZ / 4 ); \
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asm volatile ( \
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"0: add #-1,%0\n \
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nop\n \
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cmp/pl %0\n \
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bt 0b\
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nop" \
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:: "r" (_delay) ); \
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}
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#define CPU_delay( microseconds ) sh_delay( microseconds )
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extern unsigned int sh_set_irq_priority(
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unsigned int irq,
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unsigned int prio );
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@@ -8,7 +8,7 @@
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# $Id$
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#
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MHZ:=20
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MHZ=20
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include $(RTEMS_ROOT)/make/custom/default.cfg
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@@ -18,11 +18,18 @@ RTEMS_CPU_MODEL=sh7032
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# This is the actual bsp directory used during the build process.
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RTEMS_BSP_FAMILY=gensh1
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# BSP specific preprocessor flags.
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# These should only be used in BSP dependent directories.
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BSP_CPPFLAGS=-DMHZ=$(MHZ)
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#
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# This contains the compiler options necessary to select the CPU model
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# and (hopefully) optimize for it.
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#
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CPU_CFLAGS=-m1
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# HACK: We have to append BSP_CPPFLAGS to CPU_CFLAGS, because
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# per BSP and per CPU CPPFLAGS are not (yet?) supported
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CPU_CFLAGS=-m1 $(BSP_CPPFLAGS)
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# CPU_CFLAGS=-m1
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# debug flags: typically none, but we use -O1 as it produces better code
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CFLAGS_DEBUG_V = -O1
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@@ -31,6 +38,8 @@ CFLAGS_DEBUG_V = -O1
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# -O4 is ok for RTEMS
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CFLAGS_OPTIMIZE_V = -O4
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CPPFLAGS+=$(BSP_CPPFLAGS)
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# This section makes the target dependent options file.
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# NDEBUG (C library)
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