forked from Imagelibrary/rtems
bsp/genmcf548x: Enable FPU in BSP startup code
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@@ -70,8 +70,10 @@ extern char WorkAreaBase [];
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#define m68k_set_acr3(_acr3) __asm__ volatile ("movec %0,#0x0007" : : "d" (_acr3))
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/*
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* Set initial cacr mode, mainly enables branch/intruction/data cache and
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* switch off FPU.
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* Set initial CACR mode, mainly enables branch/instruction/data cache. The
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* FPU must be switched on in the BSP startup code since the
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* _Thread_Start_multitasking() will restore the floating-point context of the
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* initialization task if necessary.
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*/
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static const uint32_t BSP_CACR_INIT = MCF548X_CACR_DEC /* enable data cache */
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| MCF548X_CACR_BEC /* enable branch cache */
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@@ -80,8 +82,7 @@ static const uint32_t BSP_CACR_INIT = MCF548X_CACR_DEC /* enable data cache */
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/* set data cache mode to write-through */
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| MCF548X_CACR_DESB /* enable data store buffer */
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| MCF548X_CACR_DDSP /* data access only in supv. mode */
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| MCF548X_CACR_IDSP /* instr. access only in supv. mode */
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| MCF548X_CACR_DF; /* disable FPU */
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| MCF548X_CACR_IDSP; /* instr. access only in supv. mode */
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/*
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* CACR maintenance functions
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@@ -273,15 +274,6 @@ void bsp_start( void )
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/* Initialize CACR shadow register */
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_CPU_cacr_shadow = BSP_CACR_INIT;
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/* Switch on FPU in CACR shadow register if necessary */
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if ((Configuration_POSIX_API.number_of_initialization_threads > 0) ||
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((Configuration_RTEMS_API.number_of_initialization_tasks > 0) &&
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(Configuration_RTEMS_API.User_initialization_tasks_table
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->attribute_set & RTEMS_FLOATING_POINT) != 0)
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) {
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_CPU_cacr_shadow &= ~MCF548X_CACR_DF;
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}
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/*
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* Load the shadow variable of CACR with initial mode and write it to the
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* CACR. Interrupts are still disabled, so there is no need for surrounding
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