diff --git a/bsps/arm/tms570/start/hwinit-lc4357-hdk.c b/bsps/arm/tms570/start/hwinit-lc4357-hdk.c
index 7c01b8306f..22c068035b 100644
--- a/bsps/arm/tms570/start/hwinit-lc4357-hdk.c
+++ b/bsps/arm/tms570/start/hwinit-lc4357-hdk.c
@@ -127,6 +127,10 @@ void tms570_pinmux_init( void )
     tms570_pin_config_prepare();
     TMS570_PINMUX[174] = (TMS570_PINMUX[174] & ~(UINT32_C(0x3) << 8)) | (UINT32_C(0x2) << 8); // emif output-enable bit8= 0, bit9= 1
     tms570_pin_config_complete();
+
+    /* Set ECLK pin to GPIO input */
+    TMS570_SYS1.SYSPC1 = 0;
+    TMS570_SYS1.SYSPC2 = 0;
 }
 
 void tms570_emif_sdram_init( void )
diff --git a/bsps/arm/tms570/start/hwinit-ls3137-hdk.c b/bsps/arm/tms570/start/hwinit-ls3137-hdk.c
index 1f2bbd96f2..4d3e9a0295 100644
--- a/bsps/arm/tms570/start/hwinit-ls3137-hdk.c
+++ b/bsps/arm/tms570/start/hwinit-ls3137-hdk.c
@@ -238,6 +238,29 @@ void tms570_pinmux_init( void )
 {
   tms570_bsp_pinmmr_config( tms570_pinmmr_init_data, 0,
     RTEMS_ARRAY_SIZE( tms570_pinmmr_init_data ) );
+
+  /** - set ECLK pins functional mode */
+  TMS570_SYS1.SYSPC1 = 0U;
+
+  /** - set ECLK pins default output value */
+  TMS570_SYS1.SYSPC4 = 0U;
+
+  /** - set ECLK pins output direction */
+  TMS570_SYS1.SYSPC2 = 1U;
+
+  /** - set ECLK pins open drain enable */
+  TMS570_SYS1.SYSPC7 = 0U;
+
+  /** - set ECLK pins pullup/pulldown enable */
+  TMS570_SYS1.SYSPC8 = 0U;
+
+  /** - set ECLK pins pullup/pulldown select */
+  TMS570_SYS1.SYSPC9 = 1U;
+
+  /** - Setup ECLK */
+  TMS570_SYS1.ECPCNTL = TMS570_SYS1_ECPCNTL_ECPSSEL * 0 |
+                        TMS570_SYS1_ECPCNTL_ECPCOS * 0 |
+                        TMS570_SYS1_ECPCNTL_ECPDIV( 8 - 1 );
 }
 
 void tms570_emif_sdram_init(void)
diff --git a/bsps/arm/tms570/start/init_system.c b/bsps/arm/tms570/start/init_system.c
index 4d2c2ef29f..afb38a23bc 100644
--- a/bsps/arm/tms570/start/init_system.c
+++ b/bsps/arm/tms570/start/init_system.c
@@ -201,29 +201,6 @@ void tms570_system_hw_init( void )
 
   /** - Wait for PLLs to start up and map clock domains to desired clock sources */
   tms570_map_clock_init();
-
-  /** - set ECLK pins functional mode */
-  TMS570_SYS1.SYSPC1 = 0U;
-
-  /** - set ECLK pins default output value */
-  TMS570_SYS1.SYSPC4 = 0U;
-
-  /** - set ECLK pins output direction */
-  TMS570_SYS1.SYSPC2 = 1U;
-
-  /** - set ECLK pins open drain enable */
-  TMS570_SYS1.SYSPC7 = 0U;
-
-  /** - set ECLK pins pullup/pulldown enable */
-  TMS570_SYS1.SYSPC8 = 0U;
-
-  /** - set ECLK pins pullup/pulldown select */
-  TMS570_SYS1.SYSPC9 = 1U;
-
-  /** - Setup ECLK */
-  TMS570_SYS1.ECPCNTL = TMS570_SYS1_ECPCNTL_ECPSSEL * 0 |
-                        TMS570_SYS1_ECPCNTL_ECPCOS * 0 |
-                        TMS570_SYS1_ECPCNTL_ECPDIV( 8 - 1 );
 }
 
 #if 0