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2008-12-04 Jukka Pietarinen <jukka.pietarinen@mrf.fi>

Browse Source 
* ChangeLog, Makefile.am, cpu.c, cpu_asm.S, preinstall.am, rtems/asm.h,
	rtems/score/cpu.h, rtems/score/cpu_asm.h, rtems/score/lm32.h,
	rtems/score/types.h: New files.
This commit is contained in:
Joel Sherrill
2008-12-04 22:53:15 +00:00
parent f6c6e17da4
commit 6b4d0b8e9a
10 changed files with 2122 additions and 0 deletions
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6
cpukit/score/cpu/lm32/ChangeLog Normal file
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2008-12-04 Jukka Pietarinen <jukka.pietarinen@mrf.fi>
* ChangeLog, Makefile.am, cpu.c, cpu_asm.S, preinstall.am, rtems/asm.h,
rtems/score/cpu.h, rtems/score/cpu_asm.h, rtems/score/lm32.h,
rtems/score/types.h: New files.

19
cpukit/score/cpu/lm32/Makefile.am Normal file
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##
## $Id$
##
include $(top_srcdir)/automake/compile.am
include_rtemsdir = $(includedir)/rtems
include_rtems_HEADERS = rtems/asm.h
include_rtems_scoredir = $(includedir)/rtems/score
include_rtems_score_HEADERS = rtems/score/cpu.h rtems/score/lm32.h \
rtems/score/cpu_asm.h rtems/score/types.h
noinst_LIBRARIES = libscorecpu.a
libscorecpu_a_SOURCES = cpu.c cpu_asm.S
libscorecpu_a_CPPFLAGS = $(AM_CPPFLAGS)
include $(srcdir)/preinstall.am
include $(top_srcdir)/automake/local.am

184
cpukit/score/cpu/lm32/cpu.c Normal file
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/*
* Lattice Mico32 (lm32) CPU Dependent Source
*
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*
* Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
* Micro-Research Finland Oy
*/
#include <rtems/system.h>
#include <rtems/score/isr.h>
#include <rtems/score/wkspace.h>
/* _CPU_Initialize
*
* This routine performs processor dependent initialization.
*
* INPUT PARAMETERS:
* thread_dispatch - address of disptaching routine
*
* LM32 Specific Information:
*
* XXX document implementation including references if appropriate
*/
void _CPU_Initialize(
void (*thread_dispatch) /* ignored on this CPU */
)
{
/*
* The thread_dispatch argument is the address of the entry point
* for the routine called at the end of an ISR once it has been
* decided a context switch is necessary. On some compilation
* systems it is difficult to call a high-level language routine
* from assembly. This allows us to trick these systems.
*
* If you encounter this problem save the entry point in a CPU
* dependent variable.
*/
#if 0
_CPU_Thread_dispatch_pointer = thread_dispatch;
#endif
/*
* If there is not an easy way to initialize the FP context
* during Context_Initialize, then it is usually easier to
* save an "uninitialized" FP context here and copy it to
* the task's during Context_Initialize.
*/
/* FP context initialization support goes here */
}
/*PAGE
*
* _CPU_ISR_Get_level
*
* LM32 Specific Information:
*
* XXX document implementation including references if appropriate
*/
uint32_t _CPU_ISR_Get_level( void )
{
/*
* This routine returns the current interrupt level.
*/
return 0;
}
/*PAGE
*
* _CPU_ISR_install_raw_handler
*
* LM32 Specific Information:
*
* XXX document implementation including references if appropriate
*/
void _CPU_ISR_install_raw_handler(
uint32_t vector,
proc_ptr new_handler,
proc_ptr *old_handler
)
{
/*
* This is where we install the interrupt handler into the "raw" interrupt
* table used by the CPU to dispatch interrupt handlers.
*/
}
/*PAGE
*
* _CPU_ISR_install_vector
*
* This kernel routine installs the RTEMS handler for the
* specified vector.
*
* Input parameters:
* vector - interrupt vector number
* old_handler - former ISR for this vector number
* new_handler - replacement ISR for this vector number
*
* Output parameters: NONE
*
*
* LM32 Specific Information:
*
* XXX document implementation including references if appropriate
*/
void _CPU_ISR_install_vector(
uint32_t vector,
proc_ptr new_handler,
proc_ptr *old_handler
)
{
*old_handler = _ISR_Vector_table[ vector ];
/*
* If the interrupt vector table is a table of pointer to isr entry
* points, then we need to install the appropriate RTEMS interrupt
* handler for this vector number.
*/
_CPU_ISR_install_raw_handler( vector, new_handler, old_handler );
/*
* We put the actual user ISR address in '_ISR_vector_table'. This will
* be used by the _ISR_Handler so the user gets control.
*/
_ISR_Vector_table[ vector ] = new_handler;
}
/*PAGE
*
* _CPU_Install_interrupt_stack
*
* LM32 Specific Information:
*
* XXX document implementation including references if appropriate
*/
void _CPU_Install_interrupt_stack( void )
{
}
/*PAGE
*
* _CPU_Thread_Idle_body
*
* NOTES:
*
* 1. This is the same as the regular CPU independent algorithm.
*
* 2. If you implement this using a "halt", "idle", or "shutdown"
* instruction, then don't forget to put it in an infinite loop.
*
* 3. Be warned. Some processors with onboard DMA have been known
* to stop the DMA if the CPU were put in IDLE mode. This might
* also be a problem with other on-chip peripherals. So use this
* hook with caution.
*
* LM32 Specific Information:
*
* XXX document implementation including references if appropriate
*/
void *_CPU_Thread_Idle_body( uint32_t ignored )
{
for( ; ; )
/* insert your "halt" instruction here */ ;
}

201
cpukit/score/cpu/lm32/cpu_asm.S Normal file
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/*
* $Id$
*
* This file contains all assembly code for the
* LM32 implementation of RTEMS.
*
* Derived from no_cpu/cpu_asm.S, copyright (c) 1989-1999,
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
* Micro-Research Finland Oy
*/
#include <rtems/asm.h>
#include <rtems/score/cpu_asm.h>
#define MICO32_FULL_CONTEXT_SAVE_RESTORE
/* void _CPU_Context_switch(run_context, heir_context)
*
* This routine performs a normal non-FP context switch.
*
* LM32 Specific Information:
*
* XXX document implementation including references if appropriate
*/
.globl _CPU_Context_switch
_CPU_Context_switch:
sw (r1+0), r9
sw (r1+4), r10
sw (r1+8), r11
sw (r1+12), r12
sw (r1+16), r13
sw (r1+20), r14
sw (r1+24), r15
sw (r1+28), r16
sw (r1+32), r17
sw (r1+36), r18
sw (r1+40), r19
sw (r1+44), r20
sw (r1+48), r21
sw (r1+52), r22
sw (r1+56), r23
sw (r1+60), r24
sw (r1+64), r25
sw (r1+68), gp
sw (r1+72), fp
sw (r1+76), sp
sw (r1+80), ra
/*
* _CPU_Context_restore
*
* This routine is generally used only to restart self in an
* efficient manner. It may simply be a label in _CPU_Context_switch.
*
* NOTE: May be unnecessary to reload some registers.
*
* LM32 Specific Information:
*
* XXX document implementation including references if appropriate
*/
.globl _CPU_Context_restore
_CPU_Context_restore:
lw r9, (r2+0)
lw r10, (r2+4)
lw r11, (r2+8)
lw r12, (r2+12)
lw r13, (r2+16)
lw r14, (r2+20)
lw r15, (r2+24)
lw r16, (r2+28)
lw r17, (r2+32)
lw r18, (r2+36)
lw r19, (r2+40)
lw r20, (r2+44)
lw r21, (r2+48)
lw r22, (r2+52)
lw r23, (r2+56)
lw r24, (r2+60)
lw r25, (r2+64)
lw gp, (r2+68)
lw fp, (r2+72)
lw ra, (r2+80)
/* Stack pointer must be restored last, in case it has been updated */
lw sp, (r2+76)
nop
ret
/* void __ISR_Handler()
*
* This routine provides the RTEMS interrupt management.
*
* LM32 Specific Information:
*
* XXX document implementation including references if appropriate
*/
.globl _ISR_Handler
_ISR_Handler:
addi sp, sp, -128
sw (sp+4), r1
sw (sp+8), r2
sw (sp+12), r3
sw (sp+16), r4
sw (sp+20), r5
sw (sp+24), r6
sw (sp+28), r7
sw (sp+32), r8
sw (sp+36), r9
sw (sp+40), r10
#ifdef MICO32_FULL_CONTEXT_SAVE_RESTORE
sw (sp+44), r11
sw (sp+48), r12
sw (sp+52), r13
sw (sp+56), r14
sw (sp+60), r15
sw (sp+64), r16
sw (sp+68), r17
sw (sp+72), r18
sw (sp+76), r19
sw (sp+80), r20
sw (sp+84), r21
sw (sp+88), r22
sw (sp+92), r23
sw (sp+96), r24
sw (sp+100), r25
sw (sp+104), r26
sw (sp+108), r27
#endif
sw (sp+116), ra
sw (sp+120), ea
sw (sp+124), ba
/* Scan through (IP & IM) bits starting from LSB until irq found */
rcsr r2,IP
rcsr r3,IM
and r4,r2,r3
or r1,r0,r0
ori r5,r0,1
find_irq:
and r6,r4,r5
bne r6,r0,found_irq
sli r5,r5,1
addi r1,r1,1
bne r5,r0,find_irq
/* If we end up here there was no interrupt - this should never
happen! */
bi exit_isr
found_irq:
.extern _ISR_Vector_table
sli r1,r1,2
mvhi r7,hi(_ISR_Vector_table)
ori r7,r7,lo(_ISR_Vector_table)
lw r6,(r7+0)
add r6,r6,r1
lw r5,(r6+0)
call r5
exit_isr:
lw r1, (sp+4)
lw r2, (sp+8)
lw r3, (sp+12)
lw r4, (sp+16)
lw r5, (sp+20)
lw r6, (sp+24)
lw r7, (sp+28)
lw r8, (sp+32)
lw r9, (sp+36)
lw r10, (sp+40)
#ifdef MICO32_FULL_CONTEXT_SAVE_RESTORE
lw r11, (sp+44)
lw r12, (sp+48)
lw r13, (sp+52)
lw r14, (sp+56)
lw r15, (sp+60)
lw r16, (sp+64)
lw r17, (sp+68)
lw r18, (sp+72)
lw r19, (sp+76)
lw r20, (sp+80)
lw r21, (sp+84)
lw r22, (sp+88)
lw r23, (sp+92)
lw r24, (sp+96)
lw r25, (sp+100)
lw r26, (sp+104)
lw r27, (sp+108)
#endif
lw ra, (sp+116)
lw ea, (sp+120)
lw ba, (sp+124)
addi sp, sp, 128
nop
eret

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cpukit/score/cpu/lm32/preinstall.am Normal file
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## Automatically generated by ampolish3 - Do not edit
if AMPOLISH3
$(srcdir)/preinstall.am: Makefile.am
$(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
endif
PREINSTALL_DIRS =
DISTCLEANFILES = $(PREINSTALL_DIRS)
all-am: $(PREINSTALL_FILES)
PREINSTALL_FILES =
CLEANFILES = $(PREINSTALL_FILES)
$(PROJECT_INCLUDE)/rtems/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/rtems
@: > $(PROJECT_INCLUDE)/rtems/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/rtems/$(dirstamp)
$(PROJECT_INCLUDE)/rtems/asm.h: rtems/asm.h $(PROJECT_INCLUDE)/rtems/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/asm.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/asm.h
$(PROJECT_INCLUDE)/rtems/score/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/rtems/score
@: > $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
$(PROJECT_INCLUDE)/rtems/score/cpu.h: rtems/score/cpu.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/cpu.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/cpu.h
$(PROJECT_INCLUDE)/rtems/score/lm32.h: rtems/score/lm32.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/lm32.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/lm32.h
$(PROJECT_INCLUDE)/rtems/score/cpu_asm.h: rtems/score/cpu_asm.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/cpu_asm.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/cpu_asm.h
$(PROJECT_INCLUDE)/rtems/score/types.h: rtems/score/types.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/types.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/types.h

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/**
* @file rtems/asm.h
*
* This include file attempts to address the problems
* caused by incompatible flavors of assemblers and
* toolsets. It primarily addresses variations in the
* use of leading underscores on symbols and the requirement
* that register names be preceded by a %.
*/
/*
* NOTE: The spacing in the use of these macros
* is critical to them working as advertised.
*
* COPYRIGHT:
*
* This file is based on similar code found in newlib available
* from ftp.cygnus.com. The file which was used had no copyright
* notice. This file is freely distributable as long as the source
* of the file is noted. This file is:
*
* COPYRIGHT (c) 1994-2006.
* On-Line Applications Research Corporation (OAR).
*
* $Id$
*/
#ifndef _RTEMS_ASM_H
#define _RTEMS_ASM_H
/*
* Indicate we are in an assembly file and get the basic CPU definitions.
*/
#ifndef ASM
#define ASM
#endif
#include <rtems/score/cpuopts.h>
#include <rtems/score/lm32.h>
#ifndef __USER_LABEL_PREFIX__
/**
* Recent versions of GNU cpp define variables which indicate the
* need for underscores and percents. If not using GNU cpp or
* the version does not support this, then you will obviously
* have to define these as appropriate.
*
* This symbol is prefixed to all C program symbols.
*/
#define __USER_LABEL_PREFIX__ _
#endif
#ifndef __REGISTER_PREFIX__
/**
* Recent versions of GNU cpp define variables which indicate the
* need for underscores and percents. If not using GNU cpp or
* the version does not support this, then you will obviously
* have to define these as appropriate.
*
* This symbol is prefixed to all register names.
*/
#define __REGISTER_PREFIX__
#endif
#include <rtems/concat.h>
/** Use the right prefix for global labels. */
#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
/** Use the right prefix for registers. */
#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
/*
* define macros for all of the registers on this CPU
*
* EXAMPLE: #define d0 REG (d0)
*/
/*
* Define macros to handle section beginning and ends.
*/
/** This macro is used to denote the beginning of a code declaration. */
#define BEGIN_CODE_DCL .text
/** This macro is used to denote the end of a code declaration. */
#define END_CODE_DCL
/** This macro is used to denote the beginning of a data declaration section. */
#define BEGIN_DATA_DCL .data
/** This macro is used to denote the end of a data declaration section. */
#define END_DATA_DCL
/** This macro is used to denote the beginning of a code section. */
#define BEGIN_CODE .text
/** This macro is used to denote the end of a code section. */
#define END_CODE
/** This macro is used to denote the beginning of a data section. */
#define BEGIN_DATA
/** This macro is used to denote the end of a data section. */
#define END_DATA
/** This macro is used to denote the beginning of the
* unitialized data section.
*/
#define BEGIN_BSS
/** This macro is used to denote the end of the unitialized data section. */
#define END_BSS
/** This macro is used to denote the end of the assembly file. */
#define END
/**
* This macro is used to declare a public global symbol.
*
* @note This must be tailored for a particular flavor of the C compiler.
* They may need to put underscores in front of the symbols.
*/
#define PUBLIC(sym) .globl SYM (sym)
/**
* This macro is used to prototype a public global symbol.
*
* @note This must be tailored for a particular flavor of the C compiler.
* They may need to put underscores in front of the symbols.
*/
#define EXTERN(sym) .globl SYM (sym)
#endif

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cpukit/score/cpu/lm32/rtems/score/cpu.h Normal file
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74
cpukit/score/cpu/lm32/rtems/score/cpu_asm.h Normal file
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/**
* @file rtems/score/cpu_asm.h
*/
/*
* Very loose template for an include file for the cpu_asm.? file
* if it is implemented as a ".S" file (preprocessed by cpp) instead
* of a ".s" file (preprocessed by gm4 or gasp).
*
* COPYRIGHT (c) 1989-2008.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*
*/
#ifndef _RTEMS_SCORE_CPU_ASM_H
#define _RTEMS_SCORE_CPU_ASM_H
/* pull in the generated offsets */
/*
#include <rtems/score/offsets.h>
*/
/*
* Hardware General Registers
*/
/* put something here */
/*
* Hardware Floating Point Registers
*/
/* put something here */
/*
* Hardware Control Registers
*/
/* put something here */
/*
* Calling Convention
*/
/* put something here */
/*
* Temporary registers
*/
/* put something here */
/*
* Floating Point Registers - SW Conventions
*/
/* put something here */
/*
* Temporary floating point registers
*/
/* put something here */
#endif
/* end of file */

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cpukit/score/cpu/lm32/rtems/score/lm32.h Normal file
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/* lm32.h
*
* This file sets up basic CPU dependency settings based on
* compiler settings. For example, it can determine if
* floating point is available. This particular implementation
* is specified to the NO CPU port.
*
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*
* Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
* Micro-Research Finland Oy
*/
#ifndef _RTEMS_SCORE_LM32_H
#define _RTEMS_SCORE_LM32_H
#ifdef __cplusplus
extern "C" {
#endif
/*
* This file contains the information required to build
* RTEMS for a particular member of the NO CPU family.
* It does this by setting variables to indicate which
* implementation dependent features are present in a particular
* member of the family.
*
* This is a good place to list all the known CPU models
* that this port supports and which RTEMS CPU model they correspond
* to.
*/
#if defined(rtems_multilib)
/*
* Figure out all CPU Model Feature Flags based upon compiler
* predefines.
*/
#define CPU_MODEL_NAME "rtems_multilib"
#define LM32_HAS_FPU 0
#elif defined(__lm32__)
#define CPU_MODEL_NAME "lm32"
#define LM32_HAS_FPU 0
#else
#error "Unsupported CPU Model"
#endif
/*
* Define the name of the CPU family.
*/
#define CPU_NAME "LM32"
#ifdef __cplusplus
}
#endif
#define lm32_disable_interrupts( _level ) \
do { register uint32_t ie; \
asm volatile ("rcsr %0,ie":"=r"(ie)); \
_level = ie; \
ie &= (~0x0001); \
asm volatile ("wcsr ie,%0"::"r"(ie)); \
} while (0)
#define lm32_enable_interrupts( _level ) \
asm volatile ("wcsr ie,%0"::"r"(_level));
#define lm32_flash_interrupts( _level ) \
do { register uint32_t ie; \
asm volatile ("wcsr ie,%0"::"r"(_level)); \
ie = _level & (~0x0001); \
asm volatile ("wcsr ie,%0"::"r"(ie)); \
} while (0)
#define lm32_interrupt_unmask( _mask ) \
do { register uint32_t im; \
asm volatile ("rcsr %0,im":"=r"(im)); \
im |= _mask; \
asm volatile ("wcsr im,%0"::"r"(im)); \
} while (0)
#define lm32_interrupt_mask( _mask ) \
do { register uint32_t im; \
asm volatile ("rcsr %0,im":"=r"(im)); \
im &= ~_mask; \
asm volatile ("wcsr im,%0"::"r"(im)); \
} while (0)
#define lm32_interrupt_ack( _mask ) \
do { register uint32_t ip = _mask; \
asm volatile ("wcsr ip,%0"::"r"(ip)); \
} while (0)
#endif /* _RTEMS_SCORE_LM32_H */

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/**
* @file rtems/score/types.h
*/
/*
* This include file contains type definitions pertaining to the
* Lattice lm32 processor family.
*
* COPYRIGHT (c) 1989-2006.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*
* Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
* Micro-Research Finland Oy
*/
#ifndef _RTEMS_SCORE_TYPES_H
#define _RTEMS_SCORE_TYPES_H
#ifndef ASM
#include <stdbool.h>
#include <rtems/stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/*
* This section defines the basic types for this processor.
*/
/** This defines the type for a priority bit map entry. */
typedef uint16_t Priority_Bit_map_control;
/** This defines the return type for an ISR entry point. */
typedef void lm32_isr;
/** This defines the prototype for an ISR entry point. */
typedef lm32_isr ( *lm32_isr_entry )( void );
#ifdef RTEMS_DEPRECATED_TYPES
typedef bool boolean; /* Boolean value */
typedef float single_precision; /* single precision float */
typedef double double_precision; /* double precision float */
#endif
#ifdef __cplusplus
}
#endif
#endif /* !ASM */
#endif